| a45fa436 | 21-Mar-2014 |
Stephen Warren <swarren@nvidia.com> |
ARM: tegra: reduce public pinmux API
Remove a few unused functions from the pinmux header. They aren't
currently used, and removing them prevents any new usage from appearing.
This will ease moving
ARM: tegra: reduce public pinmux API
Remove a few unused functions from the pinmux header. They aren't
currently used, and removing them prevents any new usage from appearing.
This will ease moving to just pinmux_config_table() and
padgrp_config_table() in the future.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
show more ...
|
| e2969957 | 21-Mar-2014 |
Stephen Warren <swarren@nvidia.com> |
ARM: tegra: pinctrl: remove duplication
Much of arch/arm/cpu/tegra*-common/pinmux.c is identical. Remove the
duplication by creating pinmux-common.c for all the identical code.
This leaves:
* arch/
ARM: tegra: pinctrl: remove duplication
Much of arch/arm/cpu/tegra*-common/pinmux.c is identical. Remove the
duplication by creating pinmux-common.c for all the identical code.
This leaves:
* arch/arm/include/asm/arch-tegra*/pinmux.h defining only the names of
the various pins/pin groups, drive groups, and mux functions.
* arch/arm/cpu/tegra*-common/pinmux.c containing only the lookup table
stating which pin groups support which mux functions.
The code in pinmux-common.c is semantically identical to that in the
various original pinmux.c, but had some consistency and cleanup fixes
applied during migration.
I removed the definition of struct pmux_tri_ctlr, since this is different
between SoCs (especially Tegra20 vs all others), and it's much simpler to
deal with this via the new REG/MUX_REG/... defines. spl.c, warmboot.c,
and warmboot_avp.c needed updates due to this, since they previously
hijacked this struct to encode the location of some non-pinmux registers.
Now, that code simply calculates these register addresses directly using
simple and obvious math. I like this method better irrespective of the
pinmux code cleanup anyway.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
show more ...
|
| 19ed7b4e | 21-Mar-2014 |
Stephen Warren <swarren@nvidia.com> |
ARM: tegra: use apb_misc.h in more places
Tegra's "APB misc" register region contains various miscellaneous
registers and the Tegra pinmux registers. Some code that touches the
misc registers curren
ARM: tegra: use apb_misc.h in more places
Tegra's "APB misc" register region contains various miscellaneous
registers and the Tegra pinmux registers. Some code that touches the
misc registers currently uses struct pmux_tri_ctlr, which is intended to
be a definition of pinmux registers, rather than struct apb_misc_pp_ctrl,
which is intended to be a definition of the miscellaneous registers.
Convert all such code to use struct apb_misc_pp_ctrl, since struct
pmux_tri_ctlr goes away in the next patch.
This requires adding a missing field definition to struct
apb_misc_pp_ctrl, and moving the header into a more common location.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
show more ...
|
| 07bbd48b | 21-Mar-2014 |
Stephen Warren <swarren@nvidia.com> |
ARM: tegra: prototype pinmux_init() in board.h
pinmux_init() is a board-level function, not a pinmux driver function.
Move the prototype to a board header rather than the driver header.
Signed-off-
ARM: tegra: prototype pinmux_init() in board.h
pinmux_init() is a board-level function, not a pinmux driver function.
Move the prototype to a board header rather than the driver header.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
show more ...
|
| 6ac1e542 | 21-Mar-2014 |
Stephen Warren <swarren@nvidia.com> |
ARM: tegra: pinctrl: make pmux_func values consistent on Tegra20
For consistency with other SoCs, modify Tegra20's enum pmux_func to:
* Remove PMUX_FUNC values that aren't real
* Use the same PMUX_
ARM: tegra: pinctrl: make pmux_func values consistent on Tegra20
For consistency with other SoCs, modify Tegra20's enum pmux_func to:
* Remove PMUX_FUNC values that aren't real
* Use the same PMUX_FUNC_RSVD[1-4] values, and ensure (RSVD1 & 3)==0;
this will be assumed by pinmux_set_func() in a future patch.
Unfortunately, PMUX_FUNC_RSVD is still used in the pin macros. Use a
private define inside the driver to prevent this from causing compilaton
errors. This will be cleaned up when the pin tables are re-written in a
later patch in this series.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
show more ...
|
| dd45948d | 21-Mar-2014 |
Stephen Warren <swarren@nvidia.com> |
ARM: tegra: pinctrl: remove vddio
This field isn't used anywhere, so remove it. Note that PIN() macros are
left unchanged for now, to avoid many diffs to them; later commits will
completely rewrite
ARM: tegra: pinctrl: remove vddio
This field isn't used anywhere, so remove it. Note that PIN() macros are
left unchanged for now, to avoid many diffs to them; later commits will
completely rewrite them just one time.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
show more ...
|
| 0d2c0d57 | 21-Mar-2014 |
Stephen Warren <swarren@nvidia.com> |
ARM: tegra: pinctrl: remove func_safe
This field isn't used anywhere, so remove it. Note that PIN() macros are
left unchanged for now, to avoid many diffs to them; later commits will
completely rewr
ARM: tegra: pinctrl: remove func_safe
This field isn't used anywhere, so remove it. Note that PIN() macros are
left unchanged for now, to avoid many diffs to them; later commits will
completely rewrite them just one time.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
show more ...
|
| e688a99c | 04-Apr-2014 |
Eric Benard <eric@eukrea.com> |
imx-common/video: add detect_hdmi
this function is used by several board together with board_video_skip
to detect if hdmi is plugged is order to select the display to use.
So move it in imx-common t
imx-common/video: add detect_hdmi
this function is used by several board together with board_video_skip
to detect if hdmi is plugged is order to select the display to use.
So move it in imx-common to share it.
Signed-off-by: Eric Bénard <eric@eukrea.com>
show more ...
|
| 93ad66ce | 04-Apr-2014 |
Eric Benard <eric@eukrea.com> |
imx-common: add board_video_skip
this function is shared by several boards and thus can be factorized
Signed-off-by: Eric Bénard <eric@eukrea.com>
Acked-by: Eric Nelson <eric.nelson@boundarydevices
imx-common: add board_video_skip
this function is shared by several boards and thus can be factorized
Signed-off-by: Eric Bénard <eric@eukrea.com>
Acked-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
show more ...
|
| 519fdde9 | 08-Apr-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master'
Conflicts:
arch/arm/cpu/arm926ejs/mxs/Makefile
include/configs/trats.h
include/configs/trats2.h
include/mmc.h |
| c71645ad | 14-Mar-2014 |
David Feng <fenghua@phytium.com.cn> |
arm64 patch: gicv3 support
This patch add gicv3 support to uboot armv8 platform.
Changes for v2:
- rename arm/cpu/armv8/gic.S with arm/lib/gic_64.S
- move smp_kick_all_cpus() from gic.S to star
arm64 patch: gicv3 support
This patch add gicv3 support to uboot armv8 platform.
Changes for v2:
- rename arm/cpu/armv8/gic.S with arm/lib/gic_64.S
- move smp_kick_all_cpus() from gic.S to start.S, it would be
implementation dependent.
- Each core initialize it's own ReDistributor instead of master
initializeing all ReDistributors. This is advised by arnab.basu
<arnab.basu@freescale.com>.
Signed-off-by: David Feng <fenghua@phytium.com.cn>
show more ...
|
| 6c81a93d | 11-Mar-2014 |
Marcel Ziswiler <marcel@ziswiler.com> |
arm: vf610: add enet1 support
This patch contains several changes required for second Ethernet
(enet1/RMII1) port on vf610
- ANADIG PLL5 control definitions required for Ethernet RMII1 clock
- Secon
arm: vf610: add enet1 support
This patch contains several changes required for second Ethernet
(enet1/RMII1) port on vf610
- ANADIG PLL5 control definitions required for Ethernet RMII1 clock
- Secondary Ethernet (enet1) MAC RMII1 base address definition
- RMII1 iomux definitions
- VF610_PAD_PTA6__RMII0_CLKOUT iomux definition required for
internal (e.g. crystal-less) Ethernet clocking.
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
[stefan@agner.ch: regrouped patch]
Signed-off-by: Stefan Agner <stefan@agner.ch>
show more ...
|
| c7098965 | 11-Mar-2014 |
Marcel Ziswiler <marcel@ziswiler.com> |
arm: vf610: add uart0 clock/iomux definitions
Add CCM_CCGR0_UART0_CTRL_MASK clock definition and add TX/RX iomux
definitions for UART0 (aka. SCI0).
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.c
arm: vf610: add uart0 clock/iomux definitions
Add CCM_CCGR0_UART0_CTRL_MASK clock definition and add TX/RX iomux
definitions for UART0 (aka. SCI0).
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
[stefan@agner.ch: regrouped patch]
Signed-off-by: Stefan Agner <stefan@agner.ch>
show more ...
|
| 25839c01 | 11-Mar-2014 |
Marcel Ziswiler <marcel@ziswiler.com> |
arm: vf610: fix anadig register struct
The anadig_reg structure started at the wrong offset (fixed by adding
reserved_0x000[4]), was missing some reserved field required for
alignment purpose (reser
arm: vf610: fix anadig register struct
The anadig_reg structure started at the wrong offset (fixed by adding
reserved_0x000[4]), was missing some reserved field required for
alignment purpose (reserved_0x094[3] between pll4_denom and pll6_ctrl)
and further contained a too short reserved field causing further miss-
alignment (reserved_0x0C4[7]). Also, rename all the reserved fields
and using a memory offset based scheme for.
Discovered and tested by temporarily putting the following debug
instrumentation into board_init():
struct anadig_reg *anadig = (struct anadig_reg *)ANADIG_BASE_ADDR;
printf("&anadig->pll3_ctrl=0x%p\n", &anadig->pll3_ctrl);
printf("&anadig->pll5_ctrl=0x%p\n", &anadig->pll5_ctrl);
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
[stefan@agner.ch: regrouped patch]
Signed-off-by: Stefan Agner <stefan@agner.ch>
show more ...
|
| 1e6ad55c | 26-Feb-2014 |
York Sun <yorksun@freescale.com> |
armv8/cache: Change cache invalidate and flush function
When SoC first boots up, we should invalidate the cache but not flush it.
We can use the same function for invalid and flush mostly, with a wr
armv8/cache: Change cache invalidate and flush function
When SoC first boots up, we should invalidate the cache but not flush it.
We can use the same function for invalid and flush mostly, with a wrapper.
Invalidating large cache can ben slow on emulator, so we postpone doing
so until I-cache is enabled, and before enabling D-cache.
Signed-off-by: York Sun <yorksun@freescale.com>
CC: David Feng <fenghua@phytium.com.cn>
show more ...
|
| ddfeb0aa | 05-Mar-2014 |
Chin Liang See <clsee@altera.com> |
socfpga: Adding Clock Manager driver
Clock Manager driver will be called to reconfigure all the
clocks setting based on user input. The input are passed to
Preloader through handoff files
Signed-of
socfpga: Adding Clock Manager driver
Clock Manager driver will be called to reconfigure all the
clocks setting based on user input. The input are passed to
Preloader through handoff files
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
CC: Pavel Machek <pavel@denx.de>
Cc: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Pavel Machek <pavel@denx.de>
show more ...
|
| 680d8f03 | 25-Mar-2014 |
Przemyslaw Marczak <p.marczak@samsung.com> |
cpu: exynos4: add ace sha base address
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com> |
| 463bb19e | 19-Mar-2014 |
Marek Vasut <marex@denx.de> |
spl: Fix guardian macros in spl.h
Fix the macros guarding the spl.h header for various platforms. Due to
a typo and a propagation of it, the macros went out-of-sync with their
ifdef check, so fix th
spl: Fix guardian macros in spl.h
Fix the macros guarding the spl.h header for various platforms. Due to
a typo and a propagation of it, the macros went out-of-sync with their
ifdef check, so fix this.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@ti.com>
show more ...
|
| ab6423ca | 25-Mar-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master'
Trivial merge conflict, needed to manually remove
local_info as per commit 41364f0f.
Conflicts:
board/samsung/common/board.c |
| 93bfd616 | 11-Mar-2014 |
Pantelis Antoniou <panto@antoniou-consulting.com> |
mmc: Split mmc struct, rework mmc initialization (v2)
The way that struct mmc was implemented was a bit of a mess;
configuration and internal state all jumbled up in a single structure.
On top of t
mmc: Split mmc struct, rework mmc initialization (v2)
The way that struct mmc was implemented was a bit of a mess;
configuration and internal state all jumbled up in a single structure.
On top of that the way initialization is done with mmc_register leads
to a lot of duplicated code in drivers.
Typically the initialization got something like this in every driver.
struct mmc *mmc = malloc(sizeof(struct mmc));
memset(mmc, 0, sizeof(struct mmc);
/* fill in fields of mmc struct */
/* store private data pointer */
mmc_register(mmc);
By using the new mmc_create call one just passes an mmc config struct
and an optional private data pointer like this:
struct mmc = mmc_create(&cfg, priv);
All in tree drivers have been updated to the new form, and expect
mmc_register to go away before long.
Changes since v1:
* Use calloc instead of manually calling memset.
* Mark mmc_register as deprecated.
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
show more ...
|
| 4ab3fc5e | 11-Mar-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
kirkwood: kwbimage: refactor CONFIG_SYS_KWD_CONFIG
Pull out "$(SRCTREE)/" from CONFIG_SYS_KWD_CONFIG
and push it into the top Makefile.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc
kirkwood: kwbimage: refactor CONFIG_SYS_KWD_CONFIG
Pull out "$(SRCTREE)/" from CONFIG_SYS_KWD_CONFIG
and push it into the top Makefile.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Michael Walle <michael@walle.cc>
Cc: Simon Guinot <simon.guinot@sequanux.org>
Cc: Dave Purdy <david.c.purdy@gmail.com>
Cc: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Cc: Luka Perkov <luka@openwrt.org>
Cc: Valentin Longchamp <valentin.longchamp@keymile.com>
Cc: Jason Cooper <u-boot@lakedaemon.net>
Cc: Siddarth Gore <gores@marvell.com>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Eric Cooper <ecc@cmu.edu>
Cc: Suriyan Ramasami <suriyan.r@gmail.com>
show more ...
|
| 8e5e1e6a | 07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
arm:exynos: add common DTS file for exynos 4
This patch adds common dtsi file and config header for all
Exynos 4 based boards.
Patch additionaly adds board specific (weak) functions for
board_early
arm:exynos: add common DTS file for exynos 4
This patch adds common dtsi file and config header for all
Exynos 4 based boards.
Patch additionaly adds board specific (weak) functions for
board_early_init_f and board_power_init functions.
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
show more ...
|
| 3577fe8b | 07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
drivers:mmc:sdhci: enable support for DT
This patch enables support for device tree for sdhci driver.
Non DT case is still supported.
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off
drivers:mmc:sdhci: enable support for DT
This patch enables support for device tree for sdhci driver.
Non DT case is still supported.
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
show more ...
|
| de461c52 | 07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
video:mipidsim:fdt: Add DT support for mipi dsim driver
This patch enables parsing mipi data from device tree.
Non device tree case is still supported.
Signed-off-by: Piotr Wilczek <p.wilczek@samsu
video:mipidsim:fdt: Add DT support for mipi dsim driver
This patch enables parsing mipi data from device tree.
Non device tree case is still supported.
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
show more ...
|
| 5495dae7 | 10-Mar-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm |