| b0e6ef46 | 10-Dec-2014 |
Simon Glass <sjg@chromium.org> |
dm: i2c: tegra: Convert to driver model
This converts all Tegra boards over to use driver model for I2C. The driver
is adjusted to use driver model and the following obsolete CONFIGs are
removed:
dm: i2c: tegra: Convert to driver model
This converts all Tegra boards over to use driver model for I2C. The driver
is adjusted to use driver model and the following obsolete CONFIGs are
removed:
- CONFIG_SYS_I2C_INIT_BOARD
- CONFIG_I2C_MULTI_BUS
- CONFIG_SYS_MAX_I2C_BUS
- CONFIG_SYS_I2C_SPEED
- CONFIG_SYS_I2C
This has been tested on:
- trimslice (no I2C)
- beaver
- Jetson-TK1
It has not been tested on Tegra 114 as I don't have that board.
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
show more ...
|
| a6c7b461 | 04-Dec-2014 |
Allen Martin <amartin@nvidia.com> |
ARM: tegra: Add support for nyan-big board
Nyan-big is a Tegra124 clamshell board that is very similar to venice2, but
it has a different panel, the sdcard cd and wp sense are flipped, and it has
a
ARM: tegra: Add support for nyan-big board
Nyan-big is a Tegra124 clamshell board that is very similar to venice2, but
it has a different panel, the sdcard cd and wp sense are flipped, and it has
a different revision of the AS3722 PMIC.
This is the Acer Chromebook 13 CB5-311-T7NN (13.3-inch HD, NVIDIA
Tegra K1, 2GB). The display is not currently supported, so it should
boot on other nyan-based Chromebooks also, but only the device tree for
nyan-big is provided here.
The device tree file is from Linux but with features removed which are
unlikely to be supported in U-Boot soon (regulators, pinmux). Also the
addresses are updated to 32-bit.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
(rebase, change to 'nyan-big', fix pinmux that resets nyan-big)
show more ...
|
| 290e6e92 | 21-Nov-2014 |
Xiubo Li <Li.Xiubo@freescale.com> |
ls1021a: adding a secondary core boot address and kick functions
Define the board specific smp_set_cpu_boot_addr() function to set
the start address for secondary cores in the LS1021A specific manne
ls1021a: adding a secondary core boot address and kick functions
Define the board specific smp_set_cpu_boot_addr() function to set
the start address for secondary cores in the LS1021A specific manner.
Define the board specific smp_kick_all_cpus() functioin to boot a
secondary core. Here the BRR contains control bits for enabling boot
for each core. On exiting HRESET or PORESET, the RCW BOOT_HO field
optionally allows for logical core 0 to be released for booting or to
remain in boot holdoff. All other cores remain in boot holdoff until
their corresponding bit is set.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
show more ...
|
| 73a1cb27 | 21-Nov-2014 |
Xiubo Li <Li.Xiubo@freescale.com> |
ARM: HYP/non-sec: Fix the ARCH Timer frequency setting.
For some SoCs, the system clock frequency may not equal to the
ARCH Timer's frequency.
This patch uses the CONFIG_TIMER_CLK_FREQ instead of
C
ARM: HYP/non-sec: Fix the ARCH Timer frequency setting.
For some SoCs, the system clock frequency may not equal to the
ARCH Timer's frequency.
This patch uses the CONFIG_TIMER_CLK_FREQ instead of
CONFIG_SYS_CLK_FREQ, then the system clock macro and arch timer
macor could be set separately and without interfering each other.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
show more ...
|
| b8e5c7f9 | 21-Nov-2014 |
Xiubo Li <Li.Xiubo@freescale.com> |
ARM: HYP/non-sec: add the pen address BE mode support.
For some SoCs, the pen address register maybe in BE mode and the
CPUs are in LE mode.
This patch adds BE mode support for smp pen address.
Si
ARM: HYP/non-sec: add the pen address BE mode support.
For some SoCs, the pen address register maybe in BE mode and the
CPUs are in LE mode.
This patch adds BE mode support for smp pen address.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
show more ...
|
| 86949c2b | 03-Dec-2014 |
Alison Wang <b18965@freescale.com> |
arm: ls102xa: Add SD boot support for LS1021AQDS board
This patch adds SD boot support for LS1021AQDS board. SPL
framework is used. PBL initialize the internal RAM and copy
SPL to it, then SPL initi
arm: ls102xa: Add SD boot support for LS1021AQDS board
This patch adds SD boot support for LS1021AQDS board. SPL
framework is used. PBL initialize the internal RAM and copy
SPL to it, then SPL initialize DDR using SPD and copy u-boot
from SD card to DDR, finally SPL transfer control to u-boot.
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Jason Jin <jason.jin@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
show more ...
|
| 14d54dec | 03-Dec-2014 |
Alison Wang <b18965@freescale.com> |
arm: spl: Add I2C linker list in generic .lds
On LS1, DDR is initialized by reading SPD through I2C interface
in SPL code. For I2C, ll_entry_count() is called, and it returns
the number of elements
arm: spl: Add I2C linker list in generic .lds
On LS1, DDR is initialized by reading SPD through I2C interface
in SPL code. For I2C, ll_entry_count() is called, and it returns
the number of elements of a linker-generated array placed into
subsection of .u_boot_list section specified by _list argument.
So add I2C linker list in the generic .lds to fix the issue about
using I2C in SPL.
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
show more ...
|
| 306fa012 | 22-Oct-2014 |
chenhui zhao <chenhui.zhao@freescale.com> |
arm: ls102xa: clear EPU registers for deep sleep
After wakeup from deep sleep, Clear EPU registers as early as possible
to prevent from possible issue. It's also safe to clear at normal boot.
Signe
arm: ls102xa: clear EPU registers for deep sleep
After wakeup from deep sleep, Clear EPU registers as early as possible
to prevent from possible issue. It's also safe to clear at normal boot.
Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
show more ...
|
| b699b01e | 21-Oct-2014 |
Tang Yuantian <Yuantian.Tang@freescale.com> |
arm: ls102xa: fixed a bus frequency setting error
The bus frequency in SOC node should be clock frequency of platform.
That is not true if it is devided by 2.
Signed-off-by: Tang Yuantian <Yuantian
arm: ls102xa: fixed a bus frequency setting error
The bus frequency in SOC node should be clock frequency of platform.
That is not true if it is devided by 2.
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
show more ...
|
| 9b416a9f | 10-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://www.denx.de/git/u-boot-imx |
| 2ce4eaf4 | 18-Nov-2014 |
Vikas Manocha <vikas.manocha@st.com> |
stv0991: enable ethernet support
Signed-off-by: Vikas Manocha <vikas.manocha@st.com> |
| 9fa32b12 | 18-Nov-2014 |
Vikas Manocha <vikas.manocha@st.com> |
stv0991: Add basic stv0991 architecture support
stv0991 architecture support added. It contains the support for
following blocks
- Timer
- uart
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
[
stv0991: Add basic stv0991 architecture support
stv0991 architecture support added. It contains the support for
following blocks
- Timer
- uart
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
[trini: Add arch/arm/cpu/armv7/Makefile hunk]
Signed-off-by: Tom Rini <trini@ti.com>
show more ...
|
| 98d2d5e8 | 08-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-ti |
| 7a3620b2 | 05-Dec-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
ARM: UniPhier: detect the number of flash banks at run-time
Some UniPhier boards are equipped with an expansion slot that
some optional SRAM/NOR-flash cards can be attached to. So, run-time
detecti
ARM: UniPhier: detect the number of flash banks at run-time
Some UniPhier boards are equipped with an expansion slot that
some optional SRAM/NOR-flash cards can be attached to. So, run-time
detection of the number of flash banks would be more user-friendly.
Until this commit, UniPhier boards have achieved this by (ab)using
board_flash_wp_on() because the boot failed if flash_size got zero.
Fortunately, this problem was solved by commit 70879a92561a (flash:
do not fail even if flash_size is zero).
Now it is possible to throw away such a tricky workaround. This
commit also enables CONFIG_SYS_MAX_FLASH_BANKS_DETECT for further
refactoring.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
show more ...
|
| dc7246e7 | 05-Dec-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
ARM: UniPhier: extend register area of init page table for PH1-sLD3
0x20000000-0x2fffffff: assigned to ARM mpcore (sLD3 only)
0xf0000000-0xffffffff: assigned to Denali NAND controller (sLD3 only)
S
ARM: UniPhier: extend register area of init page table for PH1-sLD3
0x20000000-0x2fffffff: assigned to ARM mpcore (sLD3 only)
0xf0000000-0xffffffff: assigned to Denali NAND controller (sLD3 only)
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
show more ...
|
| f5d0b9b2 | 05-Dec-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
ARM: UniPhier: merge UniPhier config headers into a single file
Some configurations have been moved to Kconfig and the difference
among the config headers of UniPhier SoC variants is getting smaller
ARM: UniPhier: merge UniPhier config headers into a single file
Some configurations have been moved to Kconfig and the difference
among the config headers of UniPhier SoC variants is getting smaller
and smaller. Now is a good time to merge them into a single file.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
show more ...
|
| 3201455d | 05-Dec-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
ARM: UniPhier: move support card select to Kconfig
There are two kinds of expansion boards which are often used for
the UniPhier platform and they are only exclusively selectable.
It can be better d
ARM: UniPhier: move support card select to Kconfig
There are two kinds of expansion boards which are often used for
the UniPhier platform and they are only exclusively selectable.
It can be better described by the "choice" menu of Kconfig.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
show more ...
|
| 84b3584f | 05-Dec-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
ARM: UniPhier: move CONFIG_UNIPHIER_SMP to Kconfig
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> |
| b115678b | 05-Dec-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
ARM: UniPhier: use boot_is_swapped() macro for readability
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> |
| 9248a78f | 28-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
ARM: UniPhier: remove Denali NAND controller fixup code
This ugly work-around code is unnecessary since commit f09eb52b3ffc
(mtd: denali: set some registers after nand_scan_ident()).
Signed-off-by:
ARM: UniPhier: remove Denali NAND controller fixup code
This ugly work-around code is unnecessary since commit f09eb52b3ffc
(mtd: denali: set some registers after nand_scan_ident()).
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
show more ...
|
| b9b5cf0e | 26-Nov-2014 |
Dinh Nguyen <dinguyen@opensource.altera.com> |
socfpga: correctly increment freeze_controller_base address
Correctly increment the base address of the freeze controller. And since
SYSMGR_FRZCTRL_VIOCTRL_SHIFT is not needed, remove it from the in
socfpga: correctly increment freeze_controller_base address
Correctly increment the base address of the freeze controller. And since
SYSMGR_FRZCTRL_VIOCTRL_SHIFT is not needed, remove it from the include file.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Vince Bridgers <vbridger@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
show more ...
|
| c877eaa8 | 16-Nov-2014 |
Stefan Roese <sr@denx.de> |
arm: socfpga: Use only one clrbits_le32 call to deassert SPI reset bits
As suggested by Pavel, lets combine the two calls into one.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chin Liang See <clse
arm: socfpga: Use only one clrbits_le32 call to deassert SPI reset bits
As suggested by Pavel, lets combine the two calls into one.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
show more ...
|
| e49631af | 12-Nov-2014 |
Stefan Roese <sr@denx.de> |
arm: am33xx: Handle NAND+I2C boot-device the same way as NAND
Re-map NAND&I2C boot-device to the "normal" NAND boot-device.
Otherwise the SPL boot IF can't handle this device correctly.
Somehow boot
arm: am33xx: Handle NAND+I2C boot-device the same way as NAND
Re-map NAND&I2C boot-device to the "normal" NAND boot-device.
Otherwise the SPL boot IF can't handle this device correctly.
Somehow booting with Hynix 4GBit NAND H27U4G8 on Siemens
Draco leads to this boot-device passed to SPL from the BootROM.
With this change, Draco boots just fine into main U-Boot.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Roger Meier <r.meier@siemens.com>
Cc: Samuel Egli <samuel.egli@siemens.com>
show more ...
|
| 1e4ad74b | 10-Nov-2014 |
Felipe Balbi <balbi@ti.com> |
beagle_x15: add board support for Beagle x15
BeagleBoard-X15 is the next generation Open Source
Hardware BeagleBoard based on TI's AM5728 SoC
featuring dual core 1.5GHZ A15 processor. The
platform f
beagle_x15: add board support for Beagle x15
BeagleBoard-X15 is the next generation Open Source
Hardware BeagleBoard based on TI's AM5728 SoC
featuring dual core 1.5GHZ A15 processor. The
platform features 2GB DDR3L (w/dual 32bit busses),
eSATA, 3 USB3.0 ports, integrated HDMI (1920x108@60),
separate LCD port, video In port, 4GB eMMC, uSD,
Analog audio in/out, dual 1G Ethernet.
For more information, refer to:
http://www.elinux.org/Beagleboard:BeagleBoard-X15
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
show more ...
|
| d11ac4b5 | 06-Nov-2014 |
Felipe Balbi <balbi@ti.com> |
arm: omap: add support for am57xx devices
just add a few ifdefs around because this
device is very similar to dra7xxx.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-by: Tom Rini <trini@ti.com> |