ARM: fixed relocation using proper alignment

Using u-boot-2017.05 on i.MX6UL we ran into following problem:
Initially U-Boot could be started normally.
If we added one random command in configuratio

ARM: fixed relocation using proper alignment

Using u-boot-2017.05 on i.MX6UL we ran into following problem:
Initially U-Boot could be started normally.
If we added one random command in configuration, the newly generated
image hung at startup (last output was DRAM: 256 MiB).

We tracked this down to a data abort within relocation (relocated_code).

relocated_code in arch/arm/lib/relocate.S copies 8 bytes per loop
iteration until the source pointer is equal to __image_copy_end.
In a good case __image_copy_end was aligned to 8 bytes, so the loop
stopped as suggested, but in an errornous case __image_copy_end was
not aligned to 8 bytes, so the loop ran out of bounds and caused a
data abort exception.

This patches solves the issue by aligning __image_copy_end to 8 byte
using the linker script related to arm.

I don't know if it's the correct way to solve this, so some review would
be very appreciated.

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sunxi: psci: Move entry address setting to separate function

Currently we set the entry address in the psci_cpu_on function.
However R40 has a different register for this. This resulted in
an #ifdef

sunxi: psci: Move entry address setting to separate function

Currently we set the entry address in the psci_cpu_on function.
However R40 has a different register for this. This resulted in
an #ifdef / #else block in psci_cpu_on, which we avoided having
in the first place.

Move this part into a separate function, defined differently for
the R40 as opposed to the other single cluster platforms.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

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arm: arm720t: Support CONFIG_SKIP_LOWLEVEL_INIT_ONLY

This option allows skipping the call to lowlevel() while still performing
CP15 init. Support this on ARM720T so it can be used with Tegra.

Signe

arm: arm720t: Support CONFIG_SKIP_LOWLEVEL_INIT_ONLY

This option allows skipping the call to lowlevel() while still performing
CP15 init. Support this on ARM720T so it can be used with Tegra.

Signed-off-by: Simon Glass <sjg@chromium.org>

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armv7m: Fix larger builds

The branch instruction only has an 11-bit relative target address, which
is sometimes not enough.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>

arm64: Add NOLOAD attribute NOLOAD to .bss sections

Mark explicitly bss sections to not be loaded at
run time.
The similar patch was done in past by:
"Fix linker scripts: add NOLOAD atribute to .bss

arm64: Add NOLOAD attribute NOLOAD to .bss sections

Mark explicitly bss sections to not be loaded at
run time.
The similar patch was done in past by:
"Fix linker scripts: add NOLOAD atribute to .bss/.sbss sections"
(sha1: 64134f011254123618798ff77c42ba196b2ec485)

The problem is related to latest toolchain added to Xilinx
v2017.1 design tools where jtag loader is trying to access
ununitialized memory.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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ARMv8: Add support for poweroff via PSCI

Add support for calling poweroff in case of psci is wired.
Based on the same solution as is used for reset.

Signed-off-by: Michal Simek <michal.simek@xilinx

ARMv8: Add support for poweroff via PSCI

Add support for calling poweroff in case of psci is wired.
Based on the same solution as is used for reset.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Move all logic in to fwcall.c as other ARMs implement poweroff
via PMIC]
Signed-off-by: Tom Rini <trini@konsulko.com>

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common: ep93xx: Move arch-specific declarations out of common

These declarations should not be in common. Remove those that are not
needed and move the others to an arch-specific location.

Signed-o

common: ep93xx: Move arch-specific declarations out of common

These declarations should not be in common. Remove those that are not
needed and move the others to an arch-specific location.

Signed-off-by: Simon Glass <sjg@chromium.org>

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common: freescale: Move arch-specific declarations

The declarations should not be in common.h. Move them to the arch-specific
headers.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Fixup th

common: freescale: Move arch-specific declarations

The declarations should not be in common.h. Move them to the arch-specific
headers.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Fixup thinko defined(FSL_LSCH3) -> defined(CONFIG_FSL_LSCH3)]
Signed-off-by: Tom Rini <trini@konsulko.com>

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samsung: Drop more references fo s3c24x0

This is dead code now. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>

samsung: Drop s3c24x0 arch-specific code

This is not used anymore. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>

armv7: Mark the default lowlevel_init function as weak

Rather than have a long and if check in the Makefile, mark the default
lowlevel_init function as weak (as we do on armv8) so that SoCs can
over

armv7: Mark the default lowlevel_init function as weak

Rather than have a long and if check in the Makefile, mark the default
lowlevel_init function as weak (as we do on armv8) so that SoCs can
override it if needed, and it will still be discarded if unused.
Provide a weak s_init as well to allow for this to link and be
discarded.

Signed-off-by: Tom Rini <trini@konsulko.com>

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Merge git://git.denx.de/u-boot-fsl-qoriq

armv8: layerscape: Enabling loading PPA during SPL stage

Loading PPA in SPL puts the rest of U-Boot (including RAM version
loaded later) in EL2 with MMU and cache enabled. Once PPA is loaded,
PSCI i

armv8: layerscape: Enabling loading PPA during SPL stage

Loading PPA in SPL puts the rest of U-Boot (including RAM version
loaded later) in EL2 with MMU and cache enabled. Once PPA is loaded,
PSCI is available.

Signed-off-by: York Sun <york.sun@nxp.com>

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armv8: layerscape: Make U-Boot EL2 safe

When U-Boot boots from EL2, skip some lowlevel init code requiring
EL3, including CCI-400/CCN-504, trust zone, GIC, etc. These
initialization tasks are carrie

armv8: layerscape: Make U-Boot EL2 safe

When U-Boot boots from EL2, skip some lowlevel init code requiring
EL3, including CCI-400/CCN-504, trust zone, GIC, etc. These
initialization tasks are carried out before U-Boot runs. This applies
to the RAM version image used for SPL boot if PPA is loaded first.

Signed-off-by: York Sun <york.sun@nxp.com>

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armv8: ls2080aqds: Add support for SD boot

Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp

armv8: ls2080aqds: Add support for SD boot

Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

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armv8: ls2080a: Reorganise NAND_BOOT code in config flag

Add CONFIG_NAND_BOOT config flag to organise
NAND_BOOT specific code in config flag like
-nand-boot specfic errata errata_rcw_src()
-CONFIG_S

armv8: ls2080a: Reorganise NAND_BOOT code in config flag

Add CONFIG_NAND_BOOT config flag to organise
NAND_BOOT specific code in config flag like
-nand-boot specfic errata errata_rcw_src()
-CONFIG_SYS_NAND_U_BOOT_DST,etc

Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

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fdt: Rename a few functions in fdt_support

These two functions have an of_ prefix which conflicts with naming used
in of_addr. Rename them:

fdt_read_number
fdt_support_bus_default_count_cells

fdt: Rename a few functions in fdt_support

These two functions have an of_ prefix which conflicts with naming used
in of_addr. Rename them:

fdt_read_number
fdt_support_bus_default_count_cells

Signed-off-by: Simon Glass <sjg@chromium.org>

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mx25: Add function to set PER clocks

Introduce the imx_set_perclk() function to make it possible to set the
PER clocks.

Signed-off-by: Benoît Thébaudeau <benoit@wsystem.com>
Reviewed-by: Fabio Este

mx25: Add function to set PER clocks

Introduce the imx_set_perclk() function to make it possible to set the
PER clocks.

Signed-off-by: Benoît Thébaudeau <benoit@wsystem.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>

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mx25: Fix imx_get_perclk()

imx_get_perclk() used the AHB clock as the clock source for all PER
clocks, but the USB PLL output can also be a PER clock source if the
corresponding PER CLK MUX bit is s

mx25: Fix imx_get_perclk()

imx_get_perclk() used the AHB clock as the clock source for all PER
clocks, but the USB PLL output can also be a PER clock source if the
corresponding PER CLK MUX bit is set in CCM.MCR.

Signed-off-by: Benoît Thébaudeau <benoit@wsystem.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>

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pico-imx7d: Add initial support

Add the initial support for pico-imx7d board based on Wig Cheng's
source code.

Add support for eMMC, USB gadget, I2C, PMIC and Ethernet.

For more information about

pico-imx7d: Add initial support

Add the initial support for pico-imx7d board based on Wig Cheng's
source code.

Add support for eMMC, USB gadget, I2C, PMIC and Ethernet.

For more information about this board, please visit:
http://www.technexion.org/products/pico/pico-som/pico-imx7-emmc

Signed-off-by: Vanessa Maegima <vanessa.maegima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>

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Merge git://git.denx.de/u-boot-fsl-qoriq

armv8: ls2080ardb, ls2080aqds: Adjust memory map for NOR-boot

This patch adjusts memory map for images on LS2080ARDB and
LS2080AQDS NOR flash as below

Image Flash Offset
RCW+PBI 0x00000000
Bo

armv8: ls2080ardb, ls2080aqds: Adjust memory map for NOR-boot

This patch adjusts memory map for images on LS2080ARDB and
LS2080AQDS NOR flash as below

Image Flash Offset
RCW+PBI 0x00000000
Boot firmware (U-Boot) 0x00100000
Boot firmware Environment 0x00300000
PPA firmware 0x00400000
PHY firmware 0x00980000
DPAA2 MC 0x00A00000
DPAA2 DPL 0x00D00000
DPAA2 DPC 0x00E00000
Kernel.itb 0x01000000

Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

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armv8: layerscape: Adjust memory mapping for Flash/SD card on LS1043A

This patch is to adjust the memory mapping for FLash/SD card on
LS1043AQDS and LS1043ARDB, such as PPA firmware load address, FM

armv8: layerscape: Adjust memory mapping for Flash/SD card on LS1043A

This patch is to adjust the memory mapping for FLash/SD card on
LS1043AQDS and LS1043ARDB, such as PPA firmware load address, FMAN
firmware load address, QE firmware load address, U-Boot start address
on serial flash and environment address.

Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

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armv8: ls2080ardb: Add LS2081ARDB board support

LS2081ARDB board is similar to LS2080ARDB board with few differences
It hosts LS2081A SoC
Default boot source is QSPI-boot
It does not have IFC int

armv8: ls2080ardb: Add LS2081ARDB board support

LS2081ARDB board is similar to LS2080ARDB board with few differences
It hosts LS2081A SoC
Default boot source is QSPI-boot
It does not have IFC interface
RTC and QSPI flash device are different
It provides QIXIS access via I2C

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

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armv8: fsl-layerscape: Add NXP LS2081A, LS2041A SoC support

The QorIQ LS2081A SoC has eight 64-bit ARM v8 Cortex A72 cores and
is built on layerscape architecture. It is 40-pin derivative of
LS2084A

armv8: fsl-layerscape: Add NXP LS2081A, LS2041A SoC support

The QorIQ LS2081A SoC has eight 64-bit ARM v8 Cortex A72 cores and
is built on layerscape architecture. It is 40-pin derivative of
LS2084A (non-AIOP personality of LS2088A). So feature-wise it is
same as LS2084A. LS2041A is a 4-core personality of LS2081A.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

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