imx: mx31 use new formula for get_cpu_revUse new formula for get_cpu_rev, since we need to use this formulato do runtime check for all i.MXes.Signed-off-by: Peng Fan <Peng.Fan@freescale.com>Cc:
imx: mx31 use new formula for get_cpu_revUse new formula for get_cpu_rev, since we need to use this formulato do runtime check for all i.MXes.Signed-off-by: Peng Fan <Peng.Fan@freescale.com>Cc: Stefano Babic <sbabic@denx.de>Reviewed-by: Stefano Babic <sbabic@denx.de>
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mx31: Fix boot hang by avoiding vector relocationSince commit 3ff46cc42b9d73d0 ("arm: relocate the exception vectors") mx31does not boot anymore.Add a specific relocate_vectors macro that skips
mx31: Fix boot hang by avoiding vector relocationSince commit 3ff46cc42b9d73d0 ("arm: relocate the exception vectors") mx31does not boot anymore.Add a specific relocate_vectors macro that skips the vector relocation, as thei.MX31 SoC does not provide RAM at the high vectors address (0xFFFF0000), and(0x00000000) maps to ROM.This allows mx31 to boot again.Cc: Anatolij Gustschin <agust@denx.de>Cc: Magnus Lilja <lilja.magnus@gmail.com>Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
arm: mx31: use common timer functionsThis patch moves mx31 to the common timer functions added in commit 8dfafdd - Introduce common timer functions <Rob Herring>The (removed) mx31 timer code (
arm: mx31: use common timer functionsThis patch moves mx31 to the common timer functions added in commit 8dfafdd - Introduce common timer functions <Rob Herring>The (removed) mx31 timer code (specifically __udelay()) could deadlock atthe 32-bit boundary of get_ticks(). get_ticks() returned a 32-bit valuecast up to a 64-bit value. If get_ticks() + tmo in __udelay() crossedthe 32-bit boundary, the while condition became unconditionally true andlocks the processor. Rather than patch the specific mx31 issues, simplymove everything over to the common code.Signed-off-by: Andrew Ruder <andrew.ruder@elecsyscorp.com>Cc: Marek Vasut <marex@denx.de>Cc: Linus Walleij <linus.walleij@linaro.org>Cc: Wolfgang Denk <wd@denx.de>Cc: Fabio Estevam <fabio.estevam@freescale.com>Cc: Helmut Raiger <helmut.raiger@hale.at>
ARM: convert makefiles to Kbuild styleSigned-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Add GPL-2.0+ SPDX-License-Identifier to source filesSigned-off-by: Wolfgang Denk <wd@denx.de>[trini: Fixup common/cmd_io.c]Signed-off-by: Tom Rini <trini@ti.com>
arm: Move lastinc to arch_global_dataMove this field into arch_global_data and tidy up.Signed-off-by: Simon Glass <sjg@chromium.org>
arm: Move tbl to arch_global_dataMove this field into arch_global_data and tidy up.Signed-off-by: Simon Glass <sjg@chromium.org>
mx31/mx35/mx51/mx53/mx6: add watchdogUse a common watchdog driver for all these cpus.Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>Acked-by: Stefano Babic <sbabic@denx.de>
imx: Use MXC_I2C_CLK in imx i2c driveri2c didn't work on imx25 due to missing MXC_IPG_PERCLK. Now usingMXC_I2C_CLK on all imx systems using i2c.Signed-off-by: Matthias Weisser <weisserm@arcor.de
imx: Use MXC_I2C_CLK in imx i2c driveri2c didn't work on imx25 due to missing MXC_IPG_PERCLK. Now usingMXC_I2C_CLK on all imx systems using i2c.Signed-off-by: Matthias Weisser <weisserm@arcor.de>Acked-by: Stefano Babic <sbabic@denx.de>
mx31: Define default SoC input clock frequenciesDefine default SoC input clock frequencies for i.MX31 in order to get rid ofduplicated definitions.Signed-off-by: Benoît Thébaudeau <benoit.thebau
mx31: Define default SoC input clock frequenciesDefine default SoC input clock frequencies for i.MX31 in order to get rid ofduplicated definitions.Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>Cc: Stefano Babic <sbabic@denx.de>Cc: Fabio Estevam <fabio.estevam@freescale.com>Cc: Wolfgang Denk <wd@denx.de>Cc: Helmut Raiger <helmut.raiger@hale.at>
Fix mx31_decode_pllThe MFN bit-field of the PLL registers represents a signed value. See thereference manual.Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>Cc: Stefano Babic <
Fix mx31_decode_pllThe MFN bit-field of the PLL registers represents a signed value. See thereference manual.Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>Cc: Stefano Babic <sbabic@denx.de>
mx31: add "ARM11P power gating" to get_reset_causeAdd missing reset reason 7 to get_reset_cause().Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
MX31: add missing get_tbclk()Signed-off-by: Stefano Babic <sbabic@denx.de>CC: Helmut Raiger <helmut.raiger@hale.at>
mmc: access mxcmmc from mx31 boardsThis patch modifies mxcmmc.c to be usednot only by i.MX27 but also by i.MX31 boards.Both use the same SD controller, but have differentclock set-ups.The i.MX2
mmc: access mxcmmc from mx31 boardsThis patch modifies mxcmmc.c to be usednot only by i.MX27 but also by i.MX31 boards.Both use the same SD controller, but have differentclock set-ups.The i.MX27 imx_get_XXXclock functions are made static togeneric.c and a public mxc_get_clock() functionis provided. Pins, base address and prototypes foran i.MX31 specific board_init_mmc() are provided.Some of the i.MX27 clock getters are unused and markedas such to avoid warnings (./MAKEALL -s mx27), butthe code was left in for future use.Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>Acked-by: Stefano Babic <sbabic@denx.de>
MX: serial_mxc: cleanup removing nasty #ifdefThe serial driver for iMX SOCs is continuosly changed if anew SOC or not yet used port is used. CONFIG_SYS_<SOC>_<UART Port>defines were used only to
MX: serial_mxc: cleanup removing nasty #ifdefThe serial driver for iMX SOCs is continuosly changed if anew SOC or not yet used port is used. CONFIG_SYS_<SOC>_<UART Port>defines were used only to find the base address for the selected UART.Instead of that, move the base address to the board configurationfile and drop all #ifdef from driver.Signed-off-by: Stefano Babic <sbabic@denx.de>CC: Marek Vasut <marek.vasut@gmail.com>CC: Wolfgang Denk <wd@denx.de>CC: Fabio Estevam <fabio.estevam@freescale.com>CC: Helmut Raiger <helmut.raiger@hale.at>CC: John Rigby <jcrigby@gmail.com>CC: Matthias Weisser <weisserm@arcor.de>CC: Jason Liu <jason.hui@linaro.org>Acked-by: Jason Liu <jason.hui@linaro.org>
mx31: Fix checkpatch warnings in generic.cFix checkpatch warnings in generic.c.Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>Acked-by: Stefano Babic <sbabic@denx.de>
mx31: Use proper IO accessor for GPR registerUse proper IO accessor for GPR register.Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>Acked-by: Stefano Babic <sbabic@denx.de>
mx31: Remove duplicate definition for GPR registerGPR register definition is already available at imx-regs.h, so remove the duplication.Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
mx31: Remove duplicate definition for GPR registerGPR register definition is already available at imx-regs.h, so remove the duplication.Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>Acked-by: Stefano Babic <sbabic@denx.de>
mx31: define pins and init for UART2 and CSPI3Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>Acked-by: Stefano Babic <sbabic@denx.de>
mx31: Introduce mx31_set_gpr functionIntroduce mx31_set_gpr function for setting the GPR (General Purpose Register) on MX31.This function can be useful for setting a group of pins into tied to so
mx31: Introduce mx31_set_gpr functionIntroduce mx31_set_gpr function for setting the GPR (General Purpose Register) on MX31.This function can be useful for setting a group of pins into tied to some specific peripherals.Reuse this function from the linux kernel.Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
imx: fix coding styleFix checkpatch warning and errors in several i.MX related files.While at it also address a checkpatch warning at arch/arm/cpu/armv7/mx5/soc.cregarding the usage of extern in
imx: fix coding styleFix checkpatch warning and errors in several i.MX related files.While at it also address a checkpatch warning at arch/arm/cpu/armv7/mx5/soc.cregarding the usage of extern in a C file.Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
mx31: provide readable WEIM CS accessorsetup_weimcs() and some macros are added to support the setupfor i.MX31 WEIM chip selects. As a compromise between verbosityand readability an ASCII-art'ish
mx31: provide readable WEIM CS accessorsetup_weimcs() and some macros are added to support the setupfor i.MX31 WEIM chip selects. As a compromise between verbosityand readability an ASCII-art'ish bit comment is used instead ofbitfields.All i.MX31 boards have been patched to use this approach using ahelper program to verify the changes.Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>Acked-by: Stefano Babic <sbabic@denx.de>
mx31: make HSP clock for mx3fb driver availableThis additionally updates mx31/generic.c by- replacing __REG() macro accesses with readl() and writel()- providing macros for PDR0 and PLL bit acces
mx31: make HSP clock for mx3fb driver availableThis additionally updates mx31/generic.c by- replacing __REG() macro accesses with readl() and writel()- providing macros for PDR0 and PLL bit accessesSigned-off-by: Helmut Raiger <helmut.raiger@hale.at>Acked-by: Marek Vasut <marek.vasut@gmail.com>Cc: Stefano Babic <sbabic@denx.de>Acked-by: Stefano Babic <sbabic@denx.de>Signed-off-by: Anatolij Gustschin <agust@denx.de>
MX31: Disable watchdog during low-power modesTurn on the watchdog WDZST bit so that watchdog timer does not count during low power modes.Prior to applying this patch mx31pdk board got watchdog re
MX31: Disable watchdog during low-power modesTurn on the watchdog WDZST bit so that watchdog timer does not count during low power modes.Prior to applying this patch mx31pdk board got watchdog resets because when it booted in the Linux promptand there was no activity, the system entered into idle mode while watchdog timer was still active.Fix this by disabling watchdog timer during idle mode.Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
MX31: Improve readability for reset causeCurrently the reset cause is printed like:CPU: Freescale i.MX31 rev 2.0 at 531 MHz.Reset cause: PORImprove readability by adding a new line like it is
MX31: Improve readability for reset causeCurrently the reset cause is printed like:CPU: Freescale i.MX31 rev 2.0 at 531 MHz.Reset cause: PORImprove readability by adding a new line like it is done on other i.MX boards.Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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