xref: /rk3399_rockchip-uboot/include/configs/pb1x00.h (revision fe021777c7fd0171c00a73d2114c2e795519ad4e)
1 /*
2  * (C) Copyright 2003
3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 /*
9  * This file contains the configuration parameters for the dbau1x00 board.
10  */
11 
12 #ifndef __CONFIG_H
13 #define __CONFIG_H
14 
15 #define CONFIG_PB1X00		1
16 #define CONFIG_SOC_AU1X00	1  /* alchemy series cpu */
17 
18 #define CONFIG_SYS_GENERIC_BOARD
19 #define CONFIG_DISPLAY_BOARDINFO
20 
21 #ifdef CONFIG_PB1000
22 #define CONFIG_SOC_AU1000	1
23 #else
24 #ifdef CONFIG_PB1100
25 #define CONFIG_SOC_AU1100	1
26 #else
27 #ifdef CONFIG_PB1500
28 #define CONFIG_SOC_AU1500	1
29 #else
30 #error "No valid board set"
31 #endif
32 #endif
33 #endif
34 
35 #define CONFIG_ETHADDR		DE:AD:BE:EF:01:01    /* Ethernet address */
36 
37 #define CONFIG_BOOTDELAY	2	/* autoboot after 2 seconds	*/
38 
39 #define CONFIG_BAUDRATE		115200
40 
41 #define	CONFIG_TIMESTAMP		/* Print image info with timestamp */
42 #undef	CONFIG_BOOTARGS
43 
44 #define	CONFIG_EXTRA_ENV_SETTINGS					\
45 	"addmisc=setenv bootargs ${bootargs} "				\
46 		"console=ttyS0,${baudrate} "				\
47 		"panic=1\0"						\
48 	"bootfile=/vmlinux.img\0"				\
49 	"load=tftp 80500000 ${u-boot}\0"				\
50 	""
51 /* Boot from NFS root */
52 #define CONFIG_BOOTCOMMAND	"bootp; setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; bootm"
53 
54 /*
55  * Miscellaneous configurable options
56  */
57 #define	CONFIG_SYS_LONGHELP				/* undef to save memory      */
58 #define	CONFIG_SYS_PROMPT		"Pb1x00 # "	/* Monitor Command Prompt    */
59 #define	CONFIG_SYS_CBSIZE		256		/* Console I/O Buffer Size   */
60 #define	CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)  /* Print Buffer Size */
61 #define	CONFIG_SYS_MAXARGS		16		/* max number of command args*/
62 
63 #define CONFIG_SYS_MALLOC_LEN		128*1024
64 
65 #define CONFIG_SYS_BOOTPARAMS_LEN	128*1024
66 
67 #define CONFIG_SYS_MIPS_TIMER_FREQ	396000000
68 
69 #define CONFIG_SYS_SDRAM_BASE		0x80000000     /* Cached addr */
70 
71 #define	CONFIG_SYS_LOAD_ADDR		0x81000000     /* default load address	*/
72 
73 #define CONFIG_SYS_MEMTEST_START	0x80100000
74 #undef CONFIG_SYS_MEMTEST_START
75 #define CONFIG_SYS_MEMTEST_START       0x80200000
76 #define CONFIG_SYS_MEMTEST_END		0x83800000
77 
78 /*-----------------------------------------------------------------------
79  * FLASH and environment organization
80  */
81 #define CONFIG_SYS_MAX_FLASH_BANKS	2	/* max number of memory banks */
82 #define CONFIG_SYS_MAX_FLASH_SECT	(128)	/* max number of sectors on one chip */
83 
84 #define PHYS_FLASH_1		0xbec00000 /* Flash Bank #1 */
85 #define PHYS_FLASH_2		0xbfc00000 /* Flash Bank #2 */
86 
87 /* The following #defines are needed to get flash environment right */
88 #define	CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE
89 #define	CONFIG_SYS_MONITOR_LEN		(192 << 10)
90 
91 #define CONFIG_SYS_INIT_SP_OFFSET	0x4000000
92 
93 /* We boot from this flash, selected with dip switch */
94 #define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_2
95 
96 /* timeout values are in ticks */
97 #define CONFIG_SYS_FLASH_ERASE_TOUT	(2 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */
98 #define CONFIG_SYS_FLASH_WRITE_TOUT	(2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */
99 
100 #define	CONFIG_ENV_IS_NOWHERE	1
101 
102 /* Address and size of Primary Environment Sector	*/
103 #define CONFIG_ENV_ADDR		0xB0030000
104 #define CONFIG_ENV_SIZE		0x10000
105 
106 #define CONFIG_FLASH_16BIT
107 
108 #define CONFIG_NR_DRAM_BANKS	2
109 
110 
111 #define CONFIG_MEMSIZE_IN_BYTES
112 
113 
114 /*---USB -------------------------------------------*/
115 #if 0
116 #define CONFIG_USB_OHCI
117 #define CONFIG_USB_STORAGE
118 #define CONFIG_DOS_PARTITION
119 #endif
120 
121 /*---ATA PCMCIA ------------------------------------*/
122 #if 0
123 #define CONFIG_SYS_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */
124 #define CONFIG_SYS_PCMCIA_MEM_ADDR 0x20000000
125 #define CONFIG_PCMCIA_SLOT_A
126 
127 #define CONFIG_ATAPI 1
128 #define CONFIG_MAC_PARTITION 1
129 
130 /* We run CF in "true ide" mode or a harddrive via pcmcia */
131 #define CONFIG_IDE_PCMCIA 1
132 
133 /* We only support one slot for now */
134 #define CONFIG_SYS_IDE_MAXBUS		1	/* max. 1 IDE bus		*/
135 #define CONFIG_SYS_IDE_MAXDEVICE	1	/* max. 1 drive per IDE bus	*/
136 
137 #undef	CONFIG_IDE_LED			/* LED   for ide not supported	*/
138 #undef	CONFIG_IDE_RESET		/* reset for ide not supported	*/
139 
140 #define CONFIG_SYS_ATA_IDE0_OFFSET	0x0000
141 
142 #define CONFIG_SYS_ATA_BASE_ADDR       CONFIG_SYS_PCMCIA_MEM_ADDR
143 
144 /* Offset for data I/O			*/
145 #define CONFIG_SYS_ATA_DATA_OFFSET     8
146 
147 /* Offset for normal register accesses  */
148 #define CONFIG_SYS_ATA_REG_OFFSET      0
149 
150 /* Offset for alternate registers       */
151 #define CONFIG_SYS_ATA_ALT_OFFSET      0x0100
152 
153 #endif
154 /*-----------------------------------------------------------------------
155  * Cache Configuration
156  */
157 #define CONFIG_SYS_DCACHE_SIZE		16384
158 #define CONFIG_SYS_ICACHE_SIZE		16384
159 #define CONFIG_SYS_CACHELINE_SIZE	32
160 
161 
162 /*
163  * BOOTP options
164  */
165 #define CONFIG_BOOTP_BOOTFILESIZE
166 #define CONFIG_BOOTP_BOOTPATH
167 #define CONFIG_BOOTP_GATEWAY
168 #define CONFIG_BOOTP_HOSTNAME
169 
170 
171 /*
172  * Command line configuration.
173  */
174 #include <config_cmd_default.h>
175 
176 #define CONFIG_CMD_DHCP
177 #define CONFIG_CMD_ELF
178 #define CONFIG_CMD_MII
179 #define CONFIG_CMD_PING
180 
181 #undef CONFIG_CMD_SAVEENV
182 #undef CONFIG_CMD_FAT
183 #undef CONFIG_CMD_FLASH
184 #undef CONFIG_CMD_FPGA
185 #undef CONFIG_CMD_IDE
186 #undef CONFIG_CMD_LOADS
187 #undef CONFIG_CMD_RUN
188 #undef CONFIG_CMD_LOADB
189 #undef CONFIG_CMD_ELF
190 #undef CONFIG_CMD_BDI
191 #undef CONFIG_CMD_BEDBUG
192 
193 #endif	/* __CONFIG_H */
194