History log of /rk3399_ARM-atf/ (Results 926 – 950 of 18314)
Revision Date Author Comments
(<<< Hide modified files)
(Show modified files >>>)
4589ce0a05-Aug-2025 Naman Trivedi <naman.trivedimanojbhai@amd.com>

feat(versal2): add support of MMI_GEM as wakeup source

Add MMI_GEM device node ID and add support of MMI_GEM as wakeup
source.

Change-Id: I449e23df63e887978be1ff6d151542a27c44466f
Signed-off-by: Na

feat(versal2): add support of MMI_GEM as wakeup source

Add MMI_GEM device node ID and add support of MMI_GEM as wakeup
source.

Change-Id: I449e23df63e887978be1ff6d151542a27c44466f
Signed-off-by: Naman Trivedi <naman.trivedimanojbhai@amd.com>

show more ...

4efae6ab04-Jul-2025 Prasad Kummari <prasad.kummari@amd.com>

feat(versal2): add hooks for mmap and early setup

Add early setup hooks through custom_early_setup() and provide a
mechanism to support custom memory mapping, including the extension
of the memory m

feat(versal2): add hooks for mmap and early setup

Add early setup hooks through custom_early_setup() and provide a
mechanism to support custom memory mapping, including the extension
of the memory map via custom_mmap_add(). This change may also
require alignment of the MAX_XLAT_TABLE and MAX_XLAT_TABLES macros.
These can be defined within the custom_pkg.mk makefile as follows:

MAX_MMAP_REGIONS := XY
$(eval $(call add_define,MAX_MMAP_REGIONS))
MAX_XLAT_TABLES := XZ
$(eval $(call add_define,MAX_XLAT_TABLES))

If PLATFORM_STACK_SIZE is not already defined, a default value
should be used. This allows for configurability of the stack size
across different interfaces, such as custom packages. The
custom_early_setup() function enables early low-level operations
to bring the system into a correct state. Support for a custom
SiP service is also added. A basic implementation of
custom_smc_handler() is provided by the platform, while the actual
definition is expected to be supplied by the custom package. This
feature is designed for use by external libraries, such as those
that require status checking. This code introduces a generic
framework for integrating custom logic via the
$(CUSTOM_PKG_PATH)/custom_pkg.mk makefile, including
optional support for custom SMC functionality, which is determined
by the custom package.

Change-Id: I40281acf2dc48be43471b8642e2ab1a93b1cf8f6
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>

show more ...

d75ff91504-Jul-2025 Prasad Kummari <prasad.kummari@amd.com>

refactor(versal2): add tfa_no_pm flag for scmi

Added the TFA_NO_PM flag in the SCMI file and guarded SCMI
functionality with if conditions. When TFA_NO_PM is set to 0
(default), Platform Management

refactor(versal2): add tfa_no_pm flag for scmi

Added the TFA_NO_PM flag in the SCMI file and guarded SCMI
functionality with if conditions. When TFA_NO_PM is set to 0
(default), Platform Management is enabled. When set to 1, Platform
Management is disabled. This allows the generic SCMI driver to be
used in non-PM scenarios while maintaining compatibility with
conforming power management interfaces.

Change-Id: I4f6483e2c8a322ecb41e523bc03a351af4a2cb6b
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>

show more ...

4e89096a30-Jun-2025 Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

fix(versal): match function type as its declared

This corrects the MISRA violation C2012-8.3:
matching the type of function definition as per its declaration.

Change-Id: Ibeaee37a30d02e9a7638c94705

fix(versal): match function type as its declared

This corrects the MISRA violation C2012-8.3:
matching the type of function definition as per its declaration.

Change-Id: Ibeaee37a30d02e9a7638c94705dfa4b433a35bf6
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

show more ...

325949f106-Feb-2025 Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

fix(versal): switch case has only one confirming clause

This corrects the MISRA violation C2012-16.6:
Use if statement when switch statement has only one clause. This helps
to prevent other misra-c

fix(versal): switch case has only one confirming clause

This corrects the MISRA violation C2012-16.6:
Use if statement when switch statement has only one clause. This helps
to prevent other misra-c issue i.e., 16.1 and 16.3 and this doesn't
affect the functionality of the code.

Change-Id: Ie4ce39abb450cc45303732ec48b5c2e4ef5561e4
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

show more ...

5d8831c206-Feb-2025 Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

fix(versal): typecast operands to match data type

This corrects the MISRA violation C2012-10.3:
The value of an expression shall not be assigned to an object with a
narrower essential type or of a d

fix(versal): typecast operands to match data type

This corrects the MISRA violation C2012-10.3:
The value of an expression shall not be assigned to an object with a
narrower essential type or of a different essential type category

Change-Id: I83294b6a74378a927a639777ac7261a1375e13a1
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

show more ...

f709265228-Jan-2025 Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

fix(versal): replace ull with ULL to fix misra violation

This corrects the MISRA violation C2012-7.3:
The issue is because the numeric literal "1ull" uses a lowercase 'l'
to specify its type. 'l' ca

fix(versal): replace ull with ULL to fix misra violation

This corrects the MISRA violation C2012-7.3:
The issue is because the numeric literal "1ull" uses a lowercase 'l'
to specify its type. 'l' can be visually ambiguous when placed next
to digits, especially with '1', Replacing "ull" with "ULL" is avoids
the confusion and fixes the issue.

Change-Id: I204d90316ea3bfec314c284284a423618274c87b
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

show more ...

c1b0a52b27-Jan-2025 Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

fix(versal): typecast operands to match data type

This corrects the MISRA violation C2012-10.3:
The value/data/return type of a variable/function in an expression
shall not be assigned to an object

fix(versal): typecast operands to match data type

This corrects the MISRA violation C2012-10.3:
The value/data/return type of a variable/function in an expression
shall not be assigned to an object with a narrower essential type
or of a different essential type category.

Change-Id: I28b41e74d4c32829faaf786234c12207b5b32f29
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

show more ...

5b51d4de27-Jan-2025 Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

fix(versal): match function declaration with its definition

This corrects the MISRA violation C2012-4.6:
The function declaration shall be match with whose definition.
In this case, 'int32_t' needs

fix(versal): match function declaration with its definition

This corrects the MISRA violation C2012-4.6:
The function declaration shall be match with whose definition.
In this case, 'int32_t' needs to be replaced with 'int' in the
function declaration.

Change-Id: I15f1f5f93a904c057af86da4c22d4fd2b9c7a7eb
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

show more ...

33a264cb27-Jan-2025 Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

fix(versal): add external declaration

This corrects the MISRA violation C2012-8.4:
A compatible declaration shall be visible when an object or
function with external linkage is defined. In this case

fix(versal): add external declaration

This corrects the MISRA violation C2012-8.4:
A compatible declaration shall be visible when an object or
function with external linkage is defined. In this case
function declaration is available in "platform.h".

Change-Id: Ia493b18e563f4d89dc3cbde791aece3c101360ba
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

show more ...

7851f97512-Aug-2025 Govindraj Raja <govindraj.raja@arm.com>

Merge "feat(mt8189): enable DCM to support LP mode" into integration

0f3acdce12-Aug-2025 Govindraj Raja <govindraj.raja@arm.com>

Merge "fix(mt8189): fix mt_spm_pmic coverity" into integration

f018e05d11-Aug-2025 Rabio-Wang <guanghui.wang@mediatek.com>

feat(mt8189): enable DCM to support LP mode

Move the mt8188 DCM driver to common code to support both mt8188 and
mt8189 platforms. This promotes better code sharing and improves
maintainability.

En

feat(mt8189): enable DCM to support LP mode

Move the mt8188 DCM driver to common code to support both mt8188 and
mt8189 platforms. This promotes better code sharing and improves
maintainability.

Enable Dynamic Clock Management (DCM) for MT8189 to optimize power
efficiency during low power (LP) mode. When activated, DCM automatically
disables unused clocks when the bus is idle and resumes them as needed
during bus activity.

Signed-off-by: Rabio-Wang <guanghui.wang@mediatek.com>
Change-Id: I2f9665156c0118cd04109a3cedec4c63381e47c1

show more ...

9a099b5118-Jul-2025 Boyan Karatotev <boyan.karatotev@arm.com>

feat(fvp): add the GICv5 config

The GICv5 FVP needs a gic_config.yaml file to fully configure the
platform. The device tree that is provided is tied to this configuration
and one does not come in th

feat(fvp): add the GICv5 config

The GICv5 FVP needs a gic_config.yaml file to fully configure the
platform. The device tree that is provided is tied to this configuration
and one does not come in the public package. So add a gic_config.yaml to
have an easy means of fully defining the platform with what we expect.
The provided yaml will also boot Linux.

Change-Id: Ib4994807fe397a86f730bd18b163e55453988b5d
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

show more ...

d358eb2111-Feb-2025 Boyan Karatotev <boyan.karatotev@arm.com>

feat(fvp): add a GICv5 device tree

Tested with Linux v6.17-rc1, it boots as long as cpu idle is disabled.

Change-Id: Iadeb157e9d911c4228dc62c5610676f4c07f6c11
Co-developed-by: Sascha Bischoff <sasc

feat(fvp): add a GICv5 device tree

Tested with Linux v6.17-rc1, it boots as long as cpu idle is disabled.

Change-Id: Iadeb157e9d911c4228dc62c5610676f4c07f6c11
Co-developed-by: Sascha Bischoff <sascha.bischoff@arm.com>
Co-developed-by: Lorenzo Pieralisi <lorenzo.pieralisi2@arm.com>
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

show more ...

e87562b511-Feb-2025 Boyan Karatotev <boyan.karatotev@arm.com>

chore(fvp): remove redundant tsp manifest definitions

They are never consumed as the macros that use them are not used.

Change-Id: Ifcc0e7875f0dd3a842c80e3180119cd8f6818c87
Signed-off-by: Boyan Kar

chore(fvp): remove redundant tsp manifest definitions

They are never consumed as the macros that use them are not used.

Change-Id: Ifcc0e7875f0dd3a842c80e3180119cd8f6818c87
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

show more ...

270d5c5c11-Feb-2025 Boyan Karatotev <boyan.karatotev@arm.com>

refactor(fvp): factor out interrupt information from the dts

The FVP_Base models are all identical. Individual components can be
swapped out without affecting the rest of the system. In order to not

refactor(fvp): factor out interrupt information from the dts

The FVP_Base models are all identical. Individual components can be
swapped out without affecting the rest of the system. In order to not
diverge too much, factor as much common stuff out but leave out
interrupt information so that it can be swapped out.

Change-Id: I4ce5b627c7ca00d98f10eba888cc1bf4d61880a9
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

show more ...

cbf956ad11-Feb-2025 Boyan Karatotev <boyan.karatotev@arm.com>

chore(fvp): remove fvp-base-gicv3-psci-dynamiq-common.dtsi

It is never referenced and therefore redundant.

Change-Id: I25226bb5c78f8191aaf206c57ecbc003b7eb751a
Signed-off-by: Boyan Karatotev <boyan

chore(fvp): remove fvp-base-gicv3-psci-dynamiq-common.dtsi

It is never referenced and therefore redundant.

Change-Id: I25226bb5c78f8191aaf206c57ecbc003b7eb751a
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

show more ...


7c3bcb6011-Aug-2025 irving-ch-lin <irving-ch.lin@mediatek.com>

fix(mt8189): fix mt_spm_pmic coverity

The original VCORE_TO_PMIC_VAL(VCORE_0_35V) returns negative number
(VCORE_BASE_UV = 40V) and cause min voltage underflow
(-7 -> 4294967289).

Set_vcore_lp_volt

fix(mt8189): fix mt_spm_pmic coverity

The original VCORE_TO_PMIC_VAL(VCORE_0_35V) returns negative number
(VCORE_BASE_UV = 40V) and cause min voltage underflow
(-7 -> 4294967289).

Set_vcore_lp_volt will become dead code and the below condition is
not met: vol >= 4294967289 and vol <= 56(VCORE_0_75V).

Change min voltage to VCORE_0_45V suggested by designer.

Signed-off-by: irving-ch-lin <irving-ch.lin@mediatek.com>
Change-Id: I8fb33d52d58ba084cc4299ea1f9327c71e4ea9eb

show more ...

03c7510b07-Aug-2025 Govindraj Raja <govindraj.raja@arm.com>

docs(security): update Advisory TFV-6

Update Advisory TFV-6 based on -
https://developer.arm.com/documentation/110280/latest/

Link all the impacted variants to this page correctly.

Change-Id: Icb3

docs(security): update Advisory TFV-6

Update Advisory TFV-6 based on -
https://developer.arm.com/documentation/110280/latest/

Link all the impacted variants to this page correctly.

Change-Id: Icb3d039c8949fd6036c729a845646170710ba011
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

show more ...

b6c1cdf511-Feb-2025 Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

fix(xlat): typecast expressions to match data type

This corrects the MISRA violation C2012-11.5:
type casting the void pointer expression with the object pointer type.

Change-Id: I9f4b648509662e6f6

fix(xlat): typecast expressions to match data type

This corrects the MISRA violation C2012-11.5:
type casting the void pointer expression with the object pointer type.

Change-Id: I9f4b648509662e6f6e676613f3cc3984815c9862
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

show more ...

7d87652911-Aug-2025 Govindraj Raja <govindraj.raja@arm.com>

Merge "feat(mt8189): add mcdi driver" into integration

fa55368a11-Aug-2025 Govindraj Raja <govindraj.raja@arm.com>

Merge changes I8c979522,I7b39bf5b into integration

* changes:
feat(mt8189): add mt8189 mtcmos platform data
refactor(mt8196): refactor mtcmos driver to support per platform data

fecf325b14-Apr-2025 Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

fix(lib): modify function to have single return

This corrects the MISRA violation C2012-15.5:
function should have a single point of exit at the end.
Introduced a temporary variable to store the ret

fix(lib): modify function to have single return

This corrects the MISRA violation C2012-15.5:
function should have a single point of exit at the end.
Introduced a temporary variable to store the return value to
ensure single return for the function

Change-Id: Ib9941afe23f5988e5c569171563169f8f10f2b94
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

show more ...

a9e3195c14-Apr-2025 Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

fix(lib): use 64-bit constants in MDCR_EL2 bit macros

Updated bitmask definitions in MDCR_EL2 macros to use ULL(1) instead
of U(1), ensuring the left operand in shift operations is of an
appropriate

fix(lib): use 64-bit constants in MDCR_EL2 bit macros

Updated bitmask definitions in MDCR_EL2 macros to use ULL(1) instead
of U(1), ensuring the left operand in shift operations is of an
appropriate width. This avoids MISRA C:2012 Rule 12.2 violations,
which prohibit shifting a value by more than 7 bits when the left-
hand operand is an unsigned int.

Change-Id: I279fb33c2ef714367953d53e61456490cd7c798b
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

show more ...

1...<<31323334353637383940>>...733