feat(drtm): remove todo that is implemented

The PE state is set in compliance with the PSCI specification.
The general purpose registers are reset, the PC is set to the
entry point, the SPSR registe

feat(drtm): remove todo that is implemented

The PE state is set in compliance with the PSCI specification.
The general purpose registers are reset, the PC is set to the
entry point, the SPSR register is set. The todo can be removed
as the PE state is set appropriately.

Change-Id: Ib41bbf119e6175a11b37f07fe3df9e81fe10b5f6
Signed-off-by: Xialin Liu <xialin.liu@arm.com>

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Merge "feat(juno): increase MAX_XLAT_TABLES for SPMC_AT_EL3" into integration

fix(trng): avoid undefined behaviour in pack_entropy

When nbits is a multiple of the word size, the pack_entropy function
right shifts the mask by the type width, which is undefined. In
practice, th

fix(trng): avoid undefined behaviour in pack_entropy

When nbits is a multiple of the word size, the pack_entropy function
right shifts the mask by the type width, which is undefined. In
practice, the 64-bit shift compiles to a no-op and the implementation
depends on this behaviour, so this patch changes the function to skip
the masking if nbits is multiple of the word size.

Change-Id: I478b8102aae0a1d49182e7a8a55f70fd9438b9f9
Signed-off-by: Jamie Fox <jamiefox@google.com>

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Merge "fix(fvp): pass an `interrupt-names` property for the timer when using GICv5" into integration

fix(fvp): pass an `interrupt-names` property for the timer when using GICv5

The DT bindings expect the architectural timer's interrupts in the
following order:
interrupts:
minItems: 1
items:

fix(fvp): pass an `interrupt-names` property for the timer when using GICv5

The DT bindings expect the architectural timer's interrupts in the
following order:
interrupts:
minItems: 1
items:
- description: secure timer irq
- description: non-secure timer irq
- description: virtual timer irq
- description: hypervisor timer irq
- description: hypervisor virtual timer irq

However, in GICv5 the NS frame does not have access to a secure timer
and one is not passed. Override the interrupt names Instead of passing a
dummy value.

Change-Id: Ib33dd44ee17bfc63b4e21a44205c81ad4c81bfda
Reported-by: Andrew Turner <andrew.turner4@arm.com>
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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Merge "fix(bl31): remove incorrect asserts" into integration

feat(mt8189): add thermal driver support

The thermal sensor will be turned off when the system is in suspend
state. This patch adds support for the suspend/resume flow for the
thermal sensor.

Signe

feat(mt8189): add thermal driver support

The thermal sensor will be turned off when the system is in suspend
state. This patch adds support for the suspend/resume flow for the
thermal sensor.

Signed-off-by: Raymond Sun <raymond.sun@mediatek.com>
Change-Id: I930574497b232627e0ca8f45701aead4e785c363

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Merge "fix(imx8m): don't reconfigure default region0" into integration

Merge "docs(security): update Advisory TFV-6" into integration

fix(ti): specify allowable rcv_addr in mailbox

The ti_sci_transport_recv function had an overly restrictive check
where we enforced the rcv_addr to be always at the start of the
RX_START region in s

fix(ti): specify allowable rcv_addr in mailbox

The ti_sci_transport_recv function had an overly restrictive check
where we enforced the rcv_addr to be always at the start of the
RX_START region in shared memory. This started failing unnecessarily
when messages started being received at a location other than the
beginning.
However, the sender might send the messages at any location within
the share memory region if it does some sort of buffer management.
In such a case, TFA needs to just make sure the message being read
is well within the allocated shared memory region. Not necessarily
at the start.

Fixes: 9347ff4561e445d4 ("feat(ti): add support for TI mailbox driver")
Change-Id: I32cf0f5e4b9fedf49e40ace0bef06b7fc4c016f6
Signed-off-by: Dhruva Gole <d-gole@ti.com>

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Merge "feat(mt8189): add mtcmos config" into integration

fix(common): initialize the variables

This corrects the MISRA violation C2012-9.1:
All variables are explicitly initialized with zero or default values
during declaration. This helps, even if a func

fix(common): initialize the variables

This corrects the MISRA violation C2012-9.1:
All variables are explicitly initialized with zero or default values
during declaration. This helps, even if a function fails, the
variables contain predictable values, preventing undefined behavior

Change-Id: I64ec8a1c3873eb7a2c40c123260f7bc27af2412f
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

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fix(common): rename exit label

This corrects the MISRA violation C2012-5.8:
Renaming the label eliminates the conflict with the exit() function.

Change-Id: Icef4e9b5a3741781ac836d72962b84183c4f6fd7

fix(common): rename exit label

This corrects the MISRA violation C2012-5.8:
Renaming the label eliminates the conflict with the exit() function.

Change-Id: Icef4e9b5a3741781ac836d72962b84183c4f6fd7
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

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fix(common): add missing curly braces

This corrects the MISRA violation C2012-15.6:
The body of an iteration-statement or a selection-statement shall
be a compound-statement.Enclosed statement body

fix(common): add missing curly braces

This corrects the MISRA violation C2012-15.6:
The body of an iteration-statement or a selection-statement shall
be a compound-statement.Enclosed statement body within the curly
braces.

Change-Id: I24a73929c589e67f9ef9ef6d756d5c451a8b9219
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

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fix(common): add missing curly braces

This corrects the MISRA violation C2012-15.6:
The body of an iteration-statement or a selection-statement shall
be a compound-statement.Enclosed statement body

fix(common): add missing curly braces

This corrects the MISRA violation C2012-15.6:
The body of an iteration-statement or a selection-statement shall
be a compound-statement.Enclosed statement body within the curly
braces.

Change-Id: Ie25feca253ab95a4516e2f7ff6707cdace71d4c0
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

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docs(maintainers): add i.MX9 to maintained paths

Add plat/imx/imx9 to maintained paths.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I990e230a99c48ec7aad59195845204620ad0beb8

feat(imx94): add initial support for imx94

add the initial support for i.MX94.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com>
Reviewe

feat(imx94): add initial support for imx94

add the initial support for i.MX94.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Change-Id: I1f196a4b27d8f67c65be840b92e2d5d5467df546

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feat(imx95): add optee support

Add OP-TEE support for i.MX95

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Change-Id: I5babfb805bcdb8c0538d546859a9788e5a068d40

feat(imx95): support trusty os

Add configs to support Trusty OS on i.MX 95.

Signed-off-by: Ji Luo <ji.luo@nxp.com>
Change-Id: I14f0cb20700a5f9df9b83f54add1e8af92b23523

feat(imx95): implement a semaphore for GIC quiescing

As there is no way to reset the GIC on iMX95, SM(System Controller)
needs to quiesce the GIC using the GIC waker. But AP can also be
touching GIC

feat(imx95): implement a semaphore for GIC quiescing

As there is no way to reset the GIC on iMX95, SM(System Controller)
needs to quiesce the GIC using the GIC waker. But AP can also be
touching GIC waker register during entry/exit from low power modes.
Add a semaphore to provide a critical section for GIC waker. The last
two words in the TF-A MU 1K SRAM space is used to hold the semaphore
(follow the Peterson'salgorithm for mutual exclusion).

Signed-off-by: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: Ic5d696ac83668e72d9c3204d7ec047ac9f751e94

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feat(imx95): add initial support for i.MX95

Add support platform i.MX95. The System Manager running on M33
manages system critical resources, so ATF needs communicate
with System Manager. This patch

feat(imx95): add initial support for i.MX95

Add support platform i.MX95. The System Manager running on M33
manages system critical resources, so ATF needs communicate
with System Manager. This patch is to add the basic support for
i.MX95.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I10c0cc309ec90ba7b5a30d000644f75c2e5b7b19

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feat(imx9): add necessary ele api call support

Add the soc info and release xspi gmid ELE API call support.

Also add soc id sip call support. we need to flush the soc info buffer
address range to m

feat(imx9): add necessary ele api call support

Add the soc info and release xspi gmid ELE API call support.

Also add soc id sip call support. we need to flush the soc info buffer
address range to make sure no stolen data in the cache as the ELE will
fill the data without coherance support.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I3d486902960fe39bdfe810f0d0c8ee75bae6fcc5

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feat(imx9): add imx9 common code base

Add the basic common code that will be reused for
SCMI based i.MX9 platform.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I79b56822db20f2b41723783483

feat(imx9): add imx9 common code base

Add the basic common code that will be reused for
SCMI based i.MX9 platform.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I79b56822db20f2b41723783483db263d2e439562

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refactor(imx): drop the __dead2 attribute

Drop the __dead2 attribute to make sure these functions can be
implemented as no dead.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I93129cdc6dae

refactor(imx): drop the __dead2 attribute

Drop the __dead2 attribute to make sure these functions can be
implemented as no dead.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I93129cdc6daea494ac5dd6868a05d97eaf1a610c

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fix(imx): add static attribute for platform specific gic struct

Add 'static' attribute for platform specific gic struct define to
allow us to use the generic gic driver for i.MX9 platform.

Signed-o

fix(imx): add static attribute for platform specific gic struct

Add 'static' attribute for platform specific gic struct define to
allow us to use the generic gic driver for i.MX9 platform.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I34977138f23cdd9c736e816b14200c3ca502d8de

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