feat(regulator): add a regulator framework

Add a regulator framework to:
- provide an interface to consumers and drivers,
- connect consumers with drivers,
- handle most of devicetree-parsing,
- han

feat(regulator): add a regulator framework

Add a regulator framework to:
- provide an interface to consumers and drivers,
- connect consumers with drivers,
- handle most of devicetree-parsing,
- handle always-on and boot-on regulators,
- handle min/max voltages,

Change-Id: I23c939fdef2c71a416c44c9de332f70db0d2aa53
Signed-off-by: Pascal Paillet <p.paillet@st.com>

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feat(stpmic1): add new services

Add support for ICC, sink mode, bypass mode,
active discharge and list voltages.
Handle LDO3 sink source mode in a different way to avoid
setting voltage while in sin

feat(stpmic1): add new services

Add support for ICC, sink mode, bypass mode,
active discharge and list voltages.
Handle LDO3 sink source mode in a different way to avoid
setting voltage while in sink source mode.

Change-Id: Ib1b909fd8a153f542917f650e43e24317a570534
Signed-off-by: Pascal Paillet <p.paillet@st.com>

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feat(stpmic1): add USB OTG regulators

Add regulators boost, pwr_sw1 and pwr_sw2 regulators related to
USB OTG supply BOOST, SW_OTG and SWIN/SWOUT. These regulators are
needed since manipulated durin

feat(stpmic1): add USB OTG regulators

Add regulators boost, pwr_sw1 and pwr_sw2 regulators related to
USB OTG supply BOOST, SW_OTG and SWIN/SWOUT. These regulators are
needed since manipulated during the suspend/resume power sequence
as per FDT description for stm32mp15x-xxx boards from
STMicroelectronics.

Change-Id: I6217de707e49882bd5a9100db43e0d354908800d
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

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refactor(st-pmic): improve driver usage

Store status of dt_pmic_status() as local static variable,
this avoids parsing DT several times.
In the same way, store nodes in dt_pmic_i2c_config() and
in d

refactor(st-pmic): improve driver usage

Store status of dt_pmic_status() as local static variable,
this avoids parsing DT several times.
In the same way, store nodes in dt_pmic_i2c_config() and
in dt_get_pmic_node() as local static variables.

Change-Id: I4585e9dfdde2847a369bffcc6f2b39ecc2b74de1
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

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refactor(stpmic1): set stpmic1_is_regulator_enabled() as boolean

Improve use and readability.

Change-Id: Ia99fc38287f36c9dd12bfe51352afa5da68c0e47
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@

refactor(stpmic1): set stpmic1_is_regulator_enabled() as boolean

Improve use and readability.

Change-Id: Ia99fc38287f36c9dd12bfe51352afa5da68c0e47
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

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refactor(stm32mp1): re-order drivers init

SYSCFG can be initialized later, after console is up, to display the
warnings or messages it could issue.
PMIC should be initialized earlier, before SYSCFG

refactor(stm32mp1): re-order drivers init

SYSCFG can be initialized later, after console is up, to display the
warnings or messages it could issue.
PMIC should be initialized earlier, before SYSCFG init.

Change-Id: Icc3a1366083a1b1fde7f0e173645449b4c04c49b
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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fix(sve): disable ENABLE_SVE_FOR_NS for AARCH32

With patch [1], ENABLE_SVE_FOR_NS is always enable.
Disable it for AARCH32 platforms, as the feature is not supported.
The warning message is replaced

fix(sve): disable ENABLE_SVE_FOR_NS for AARCH32

With patch [1], ENABLE_SVE_FOR_NS is always enable.
Disable it for AARCH32 platforms, as the feature is not supported.
The warning message is replaced with an error, and the second override
is removed.

[1] dc78e62d80e6 ("feat(sme): enable SME functionality")

Change-Id: Ic9c5e2612c9e00bd0d37ca3b59537e39270c9799
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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feat(st): use newly introduced clock framework

Replace calls to stm32mp_clk_enable() / stm32mp_clk_disable() /
stm32mp_clk_get_rate() with clk_enable() / clk_disable() /
clk_get_rate().

Change-Id:

feat(st): use newly introduced clock framework

Replace calls to stm32mp_clk_enable() / stm32mp_clk_disable() /
stm32mp_clk_get_rate() with clk_enable() / clk_disable() /
clk_get_rate().

Change-Id: I15d2ce57b9499211fa522a1b53eeee9cf584c111
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>

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feat(clk): add a minimal clock framework

This is mainly a clock interface with clk_ops callbacks.
Those callbacks are: enable, disable, get_rate, set_parent,
and is_enabled.
This framework is compil

feat(clk): add a minimal clock framework

This is mainly a clock interface with clk_ops callbacks.
Those callbacks are: enable, disable, get_rate, set_parent,
and is_enabled.
This framework is compiled for STM32MP1.

Change-Id: I5119a2aeaf103ceaae7a60d9e423caf0c148d794
Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>

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feat(versal): add UART1 as console

Currently only UART0 is handled as console device, fix the
code to support UART1 as console also.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xili

feat(versal): add UART1 as console

Currently only UART0 is handled as console device, fix the
code to support UART1 as console also.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: Ifcd3c331cf6ce4afb0074357c92fc4addb9438b6

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feat(zynqmp): add uart1 as console

Currently only UART0 is handled as console device, fix the
code to support UART1 as console also.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xili

feat(zynqmp): add uart1 as console

Currently only UART0 is handled as console device, fix the
code to support UART1 as console also.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I08f69b65b78b967ceb7159f4a467aa5982b1f791

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feat(plat/mediatek/mt8186): add reboot function for PSCI

Add system_reset function in PSCI operations.

TEST=build pass
BUG=b:202871018

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-

feat(plat/mediatek/mt8186): add reboot function for PSCI

Add system_reset function in PSCI operations.

TEST=build pass
BUG=b:202871018

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I41001484f6244bd6ae7dedcfb6ce71cd6c035a1e

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feat(plat/mdeiatek/mt8186): add power-off function for PSCI

Add support for system-off.

TEST=build pass
BUG=b:202871018

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: Ic734696aab

feat(plat/mdeiatek/mt8186): add power-off function for PSCI

Add support for system-off.

TEST=build pass
BUG=b:202871018

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: Ic734696aab1b71ae85bca6ed08e544a522ce5c95

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feat(plat/mediatek/mt8186): apply erratas for MT8186

MT8186 uses Cortex A76 CPU, so we apply these erratas.

TEST=build pass
BUG=b:202871018

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Ch

feat(plat/mediatek/mt8186): apply erratas for MT8186

MT8186 uses Cortex A76 CPU, so we apply these erratas.

TEST=build pass
BUG=b:202871018

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I84741535fbe429f664092f624c2da653532204cd

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feat(plat/mediatek/mt8186): add MCDI drivers

Add MCDI related drivers to handle CPU powered on/off in CPU suspend.

TEST=build pass
BUG=b:202871018

Change-Id: I85aaaf3a0e992a39d17c58f3d9d5ff1b5770f

feat(plat/mediatek/mt8186): add MCDI drivers

Add MCDI related drivers to handle CPU powered on/off in CPU suspend.

TEST=build pass
BUG=b:202871018

Change-Id: I85aaaf3a0e992a39d17c58f3d9d5ff1b5770f748
Signed-off-by: Garmin.Chang <Garmin.Chang@mediatek.com>

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feat(plat/mediatek/mt8186): add CPU hotplug

Implement PSCI platform operations to support CPU hotplug and MCDI.

TEST=bringup 8 CPUs successfully on kernel stage.
BUG=b:202871018

Change-Id: Ibd5423

feat(plat/mediatek/mt8186): add CPU hotplug

Implement PSCI platform operations to support CPU hotplug and MCDI.

TEST=bringup 8 CPUs successfully on kernel stage.
BUG=b:202871018

Change-Id: Ibd5423b70b3ca3f91edaa48d7ca5bc094e751510
Signed-off-by: Garmin.Chang <Garmin.Chang@mediatek.com>

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feat(plat/mediatek/mt8186): add RTC drivers

Add RTC drivers for EOSC calibration.

TEST=build pass
BUG=b:202871018

Signed-off-by: Yuchen Huang <yuchen.huang@mediatek.corp-partner.google.com>
Change

feat(plat/mediatek/mt8186): add RTC drivers

Add RTC drivers for EOSC calibration.

TEST=build pass
BUG=b:202871018

Signed-off-by: Yuchen Huang <yuchen.huang@mediatek.corp-partner.google.com>
Change-Id: Ib48c07204c4a614072ba710c042794b59e8a902a

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fix(plat/mediatek/mt8186): extend MMU region size

In mt8186 suspend/resume flow, ATF has to communicate with a subsys by
read/write the subsys registers. However, the register region of subsys
doesn

fix(plat/mediatek/mt8186): extend MMU region size

In mt8186 suspend/resume flow, ATF has to communicate with a subsys by
read/write the subsys registers. However, the register region of subsys
doesn't include in the MMU mapping region. It triggers MMU faults.

This patch extends the MMU region 0 size to cover all mt8186 HW modules.
This patch also remove MMU region 1 because region 0 covers region 1.

TEST=build pass
BUG=b:202871018

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I520c51338578bd68756cd02603ce6783f93daf51

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feat(plat/mediatek/mt8186): add DCM driver

DCM means dynamic clock management, and it can dynamically
slow down or gate clocks during CPU or bus idle.

1. Add MCUSYS related DCM drivers.
2. Enable M

feat(plat/mediatek/mt8186): add DCM driver

DCM means dynamic clock management, and it can dynamically
slow down or gate clocks during CPU or bus idle.

1. Add MCUSYS related DCM drivers.
2. Enable MCUSYS related DCM by default.

TEST=build pass
BUG=b:202871018

Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.corp-partner.google.com>
Change-Id: Idc669364c89cde0974d2940bd12987ee833d1965

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feat(plat/mediatek/mt8186): add pinctrl support

Add MT8186 pinctrl support.

TEST=build pass
BUG=b:202871018

Signed-off-by: Guodong Liu <guodong.liu@mediatek.corp-partner.google.com>
Change-Id: I5b

feat(plat/mediatek/mt8186): add pinctrl support

Add MT8186 pinctrl support.

TEST=build pass
BUG=b:202871018

Signed-off-by: Guodong Liu <guodong.liu@mediatek.corp-partner.google.com>
Change-Id: I5b9c1c60a91c74c7d3f45c78a9403544373fa90f

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feat(plat/mediatek/mt8186): add sys_cirq support

Add 8186 sys_cirq info.

TEST=build pass
BUG=b:202871018

Signed-off-by: Zhengnan Chen <zhengnan.chen@mediatek.corp-partner.google.com>
Change-Id: Ib

feat(plat/mediatek/mt8186): add sys_cirq support

Add 8186 sys_cirq info.

TEST=build pass
BUG=b:202871018

Signed-off-by: Zhengnan Chen <zhengnan.chen@mediatek.corp-partner.google.com>
Change-Id: Ib8a1c4e995288bf5f7981ea65f27727715fe5787

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feat(plat/mediatek/mt8186): initialize GIC

Initialize GIC for mt8186.

TEST=build pass
BUG=b:202871018

Signed-off-by: Christine Zhu <christine.zhu@mediatek.corp-partner.google.com>
Change-Id: I8d02

feat(plat/mediatek/mt8186): initialize GIC

Initialize GIC for mt8186.

TEST=build pass
BUG=b:202871018

Signed-off-by: Christine Zhu <christine.zhu@mediatek.corp-partner.google.com>
Change-Id: I8d029983c7ce48fa116fafa7fa78c65349308014

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feat(plat/mediatek/mt8186): add SiP service

Add the basic SiP service.

TEST=build pass
BUG=b:202871018

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I4dcc7383237bb6c1f2494920cde

feat(plat/mediatek/mt8186): add SiP service

Add the basic SiP service.

TEST=build pass
BUG=b:202871018

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I4dcc7383237bb6c1f2494920cde21197754f6367

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feat(plat/mediatek/mt8186): add pwrap and pmic driver

1. Add 8186 pwrap driver to access pmic.
2. Add 6366 pmic driver to support clean PWRHOLD.

TEST=build pass
BUG=b:202871018

Signed-off-by: Jame

feat(plat/mediatek/mt8186): add pwrap and pmic driver

1. Add 8186 pwrap driver to access pmic.
2. Add 6366 pmic driver to support clean PWRHOLD.

TEST=build pass
BUG=b:202871018

Signed-off-by: James Lo <james.lo@mediatek.corp-partner.google.com>
Change-Id: I3bc90460a6a55dff8d3293e04482abcad789bbb2

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feat(plat/mediatek/mt8186): initialize delay_timer

Initialize delay_timer for delay functions.

TEST=build pass
BUG=b:202871018

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: Ib8f

feat(plat/mediatek/mt8186): initialize delay_timer

Initialize delay_timer for delay functions.

TEST=build pass
BUG=b:202871018

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: Ib8f52d1c674537795cc478015c83cca0f872df60

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