refactor(plat/ls1043): remove old implementation for platform ls1043

Remove old implementation for Layerscape ls1043a platform, and
will added it back with unified software architecture of all
Layer

refactor(plat/ls1043): remove old implementation for platform ls1043

Remove old implementation for Layerscape ls1043a platform, and
will added it back with unified software architecture of all
Layerscape platforms.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: If038c19ab04d70050ec8e6ab2097b1c4f8324e87

show more ...

feat(nxp/driver/dcfg): add some macro definition

Added offset for register DEVDISR2 and DEVDISR3, added
bit definiton for PORSR1_RCW, and some macro for SVR.

Signed-off-by: Jiafei Pan <Jiafei.Pan@n

feat(nxp/driver/dcfg): add some macro definition

Added offset for register DEVDISR2 and DEVDISR3, added
bit definiton for PORSR1_RCW, and some macro for SVR.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ie49392b89280c6c2c3510fcb4c85d827a1efdac0

show more ...

fix(nxp/common/setup): increase soc name maximum length

Increate SoC name length as it is not enough for some
SoC personalities.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan

fix(nxp/common/setup): increase soc name maximum length

Increate SoC name length as it is not enough for some
SoC personalities.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I2142b4b5162dd3c9ab3afefcdc859063836d8bcc

show more ...

feat(nxp/common/errata): add SoC erratum a008850

Add SoC erratum a008850 support.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I1ef41c67737b7b5fdf1d892929a2d8040effc282

feat(nxp/driver/tzc380): add tzc380 platform driver support

Added TZC380 platform driver support.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Id0aa6cb64fa7af79dd44e0dbb0e62cb2fd4cb824

feat(tzc380): add sub-region register definition

Added sub-region register definition.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Iab8130b56089d804c51ab967b184ddfc192e2858

feat(nxp/common/io): add ifc nor and nand as io devices

Added IFC Nor and NAN flash as boot IO devices.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ie1b87174d9c08d4e32138066b007fef6f8

feat(nxp/common/io): add ifc nor and nand as io devices

Added IFC Nor and NAN flash as boot IO devices.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ie1b87174d9c08d4e32138066b007fef6f8e3c5dd

show more ...

feat(nxp/driver/ifc_nand): add IFC NAND flash driver

Support IFC NAND flash as boot device.

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Chang

feat(nxp/driver/ifc_nand): add IFC NAND flash driver

Support IFC NAND flash as boot device.

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I1aba7035ff70b179915e181c04e7b00be2066abe

show more ...

feat(nxp/driver/ifc_nor): add IFC nor flash driver

Add IFC Nor flash driver.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I3275664b8848d0fe3c15ed92d95fb19adbf57f84

Merge "feat(tc): enable tracing" into integration

Merge changes from topic "st_clock_updates" into integration

* changes:
fix(st-clock): correct types in error messages
refactor(st-clock): directly use oscillator name
feat(st-clock): check HS

Merge changes from topic "st_clock_updates" into integration

* changes:
fix(st-clock): correct types in error messages
refactor(st-clock): directly use oscillator name
feat(st-clock): check HSE configuration in serial boot
feat(st-clock): manage disabled oscillator
refactor(st-clock): improve DT parsing for PLL nodes

show more ...

build(make): use clang binutils to compile

Utilise LLVM binutils during compilation of TF-A instead of the default
utilities provided by the host. The Makefile looks in the path provided
for the cur

build(make): use clang binutils to compile

Utilise LLVM binutils during compilation of TF-A instead of the default
utilities provided by the host. The Makefile looks in the path provided
for the current toolchain and only checks for them on the host if none
exist in this path. If the utilities don't exist in either place then
the build fails.

Change-Id: I6af2aa09ea3c8743cf3df6600d9760d909d76647
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

show more ...

refactor(stm32mp1): use a macro for header size

Use STM32MP_HEADER_RESERVED_SIZE macro instead of a fixed value 0x3000
in linker script.

Change-Id: I2702285c15aebaa1304a891c8aaabc949a912ba6
Signed-

refactor(stm32mp1): use a macro for header size

Use STM32MP_HEADER_RESERVED_SIZE macro instead of a fixed value 0x3000
in linker script.

Change-Id: I2702285c15aebaa1304a891c8aaabc949a912ba6
Signed-off-by: Yann Gautier <yann.gautier@st.com>

show more ...

feat(stm32mp1): add helper to enable high speed mode in low voltage

This new function is used to fill the register(s) responsible to enable
high speed mode for pad in low voltage (<2.7V).

Change-Id

feat(stm32mp1): add helper to enable high speed mode in low voltage

This new function is used to fill the register(s) responsible to enable
high speed mode for pad in low voltage (<2.7V).

Change-Id: Ib8abc6628bdf51bbe6a866bc6a9bcdeb4a84a8f4
Signed-off-by: Yann Gautier <yann.gautier@st.com>

show more ...

refactor(stm32mp1): add helpers for IO compensation cells

Add enable_io_comp_cell and disable_io_comp_cell local helpers
to enable or disable an IO compensation cell.

Change-Id: I65295298a7ece572ae

refactor(stm32mp1): add helpers for IO compensation cells

Add enable_io_comp_cell and disable_io_comp_cell local helpers
to enable or disable an IO compensation cell.

Change-Id: I65295298a7ece572ae939e2db93d10b188de0f9e
Signed-off-by: Yann Gautier <yann.gautier@st.com>

show more ...

feat(stm32mp1): use clk_enable/disable functions

Use the clock framework functions in SYSCFG driver instead of dedicated
functions.

Change-Id: Ifb50a5207e8cecef1c80d86e2de4d70ab6bf8b8b
Signed-off-b

feat(stm32mp1): use clk_enable/disable functions

Use the clock framework functions in SYSCFG driver instead of dedicated
functions.

Change-Id: Ifb50a5207e8cecef1c80d86e2de4d70ab6bf8b8b
Signed-off-by: Yann Gautier <yann.gautier@st.com>

show more ...

feat(stm32mp1): add timeout in IO compensation

Use a timeout during IO compensation enable function, when
waiting for ready status. If timeout expires, print a warning
message, to indicate that the

feat(stm32mp1): add timeout in IO compensation

Use a timeout during IO compensation enable function, when
waiting for ready status. If timeout expires, print a warning
message, to indicate that the SoC recommendation is not followed.

Change-Id: I98c7dcb1364b832f4f4b5fc9a0b85a3741a8af4b
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

show more ...

fix(st-ddr): add missing debug.h

In a later patch, the stm32mp1_def.h will be reworked. The inclusion
of common/debug.h may not be done there through another included file.
Add this header inclusion

fix(st-ddr): add missing debug.h

In a later patch, the stm32mp1_def.h will be reworked. The inclusion
of common/debug.h may not be done there through another included file.
Add this header inclusion in the files that need it.

Change-Id: I83687f7910032ca38c0856796580a650e1e41a68
Signed-off-by: Yann Gautier <yann.gautier@st.com>

show more ...

Merge "fix(imx8mp): change the BL31 physical load address" into integration

feat(nxp/driver/csu): add bypass bit mask definition

Add TZASC_BYPASS_MUX_DISABLE definition.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ife4d819e2af6deb5e027491d30f6b7c5f79764e7

feat(nxp/driver/dcfg): add gic address align register definition

Add some register fields definition.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I9fd78c318b34a2becd82d502fa6d18c8298e

feat(nxp/driver/dcfg): add gic address align register definition

Add some register fields definition.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I9fd78c318b34a2becd82d502fa6d18c8298eb40a

show more ...

feat(nxp/common/rcpm): add RCPM2 registers definition

Added some RCPM2 register offset definiton for register: IPSTPCR,
IPSTPACKR and POWMGTDCR, also added OVRD bit definiton of register
POWMGTDCR.

feat(nxp/common/rcpm): add RCPM2 registers definition

Added some RCPM2 register offset definiton for register: IPSTPCR,
IPSTPACKR and POWMGTDCR, also added OVRD bit definiton of register
POWMGTDCR.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I301bc1401e053c2089b5eb3672c6e649c805a2ab

show more ...

fix(nxp/common/setup): fix total dram size checking

total_dram_size should be signed value because it is equal to return
value of init_ddr(), so if it is lower or equal zero, report
error as DDR is

fix(nxp/common/setup): fix total dram size checking

total_dram_size should be signed value because it is equal to return
value of init_ddr(), so if it is lower or equal zero, report
error as DDR is not initialized correctly.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Idbc40da103f60f10cb18c5306e97b764c1a9d372

show more ...

feat(nxp/common): add CORTEX A53 helper functions

Add helper function to disable the load-store prefetch.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I36d7be37e0b800ab1e5842a56cfd04d7

feat(nxp/common): add CORTEX A53 helper functions

Add helper function to disable the load-store prefetch.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I36d7be37e0b800ab1e5842a56cfd04d779338868

show more ...

fix(st-clock): correct types in error messages

Replace wrong %d with the correct types.
This issue was found with the compilation flag:
-Wformat-signedness

Change-Id: Iec3817a245f964ce444b59561b777

fix(st-clock): correct types in error messages

Replace wrong %d with the correct types.
This issue was found with the compilation flag:
-Wformat-signedness

Change-Id: Iec3817a245f964ce444b59561b777ce06c51a60a
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>

show more ...