| 0446bda1 | 25-Feb-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(cert_create): let distclean Makefile target remove the cert_create tool" into integration |
| e15591aa | 31-Mar-2021 |
Nicolas Boulenguez <nicolas@debian.org> |
fix(cert_create): let distclean Makefile target remove the cert_create tool
For some targets, Make recursively invokes itself in subdirectories. When delegating the distclean target to tools/cert_cr
fix(cert_create): let distclean Makefile target remove the cert_create tool
For some targets, Make recursively invokes itself in subdirectories. When delegating the distclean target to tools/cert_create/Makefile, the submake is called with the clean target instead of realclean. Because of this, the submake never removes the cert_create executable.
A proper but more intrusive fix would * avoid confusion about the semantics by following traditions or using new names https://www.gnu.org/prep/standards/standards.html#Standard-Targets * avoid typing errors with the special $@ variable. Something like:
In tools/cert_create/Makefile: mostlyclean: # Remove most objects but keep some results. $(call SHELL_DELETE_ALL, src/build_msg.o ${OBJECTS}) clean: mostlyclean # mostlyclean, then remove things built by Make. $(call SHELL_DELETE,${BINARY}) distclean: clean # clean, then remove things built by ./configure (none here). realclean maintainer-clean: distclean # distclean, then remove things built by autootols (none here).
In Makefile: mostlyclean clean distclean realclean maintainer-clean: $(MAKE) -C subdir1 $@ $(MAKE) -C subdir2 $@
Signed-off-by: Nicolas Boulenguez <nicolas@debian.org> Change-Id: Iabfeca3da5724ab90a56ad6dcd6870d0a1d6b07f
show more ...
|
| 8a342992 | 25-Feb-2022 |
Bipin Ravi <bipin.ravi@arm.com> |
Merge changes I1784d643,Icb6e3699,I7805756e into integration
* changes: fix(errata): workaround for Cortex-A510 erratum 2172148 fix(errata): workaround for Cortex-A510 erratum 2218950 fix(erra
Merge changes I1784d643,Icb6e3699,I7805756e into integration
* changes: fix(errata): workaround for Cortex-A510 erratum 2172148 fix(errata): workaround for Cortex-A510 erratum 2218950 fix(errata): workaround for Cortex-A510 erratum 2250311
show more ...
|
| c0959d2c | 16-Feb-2022 |
johpow01 <john.powell@arm.com> |
fix(errata): workaround for Cortex-A510 erratum 2172148
Cortex-A510 erratum 2172148 is a Cat B erratum that applies to revisions r0p0, r0p1, r0p2, r0p3 and r1p0, and is fixed in r1p1.
SDEN can be f
fix(errata): workaround for Cortex-A510 erratum 2172148
Cortex-A510 erratum 2172148 is a Cat B erratum that applies to revisions r0p0, r0p1, r0p2, r0p3 and r1p0, and is fixed in r1p1.
SDEN can be found here: https://developer.arm.com/documentation/SDEN2397239
Signed-off-by: John Powell <john.powell@arm.com> Change-Id: I1784d643ca3d1d448340cd421facb5f229df1d22
show more ...
|
| cc79018b | 15-Feb-2022 |
johpow01 <john.powell@arm.com> |
fix(errata): workaround for Cortex-A510 erratum 2218950
Cortex-A510 erratum 2218950 is a Cat B erratum that applies to revisions r0p0, r0p1, r0p2, r0p3 and r1p0, and is fixed in r1p1.
SDEN can be f
fix(errata): workaround for Cortex-A510 erratum 2218950
Cortex-A510 erratum 2218950 is a Cat B erratum that applies to revisions r0p0, r0p1, r0p2, r0p3 and r1p0, and is fixed in r1p1.
SDEN can be found here: https://developer.arm.com/documentation/SDEN2397239
Signed-off-by: John Powell <john.powell@arm.com> Change-Id: Icb6e369946f8978a08cf8ed5e4452782efb0a77a
show more ...
|
| 7f304b02 | 14-Feb-2022 |
johpow01 <john.powell@arm.com> |
fix(errata): workaround for Cortex-A510 erratum 2250311
Cortex-A510 erratum 2250311 is a Cat B erratum that applies to revisions r0p0, r0p1, r0p2, r0p3 and r1p0 and is fixed in r1p1.
This erratum w
fix(errata): workaround for Cortex-A510 erratum 2250311
Cortex-A510 erratum 2250311 is a Cat B erratum that applies to revisions r0p0, r0p1, r0p2, r0p3 and r1p0 and is fixed in r1p1.
This erratum workaround is a bit different because it interacts with a feature supported in TFA. The typical method of implementing an errata workaround will not work in this case as the MPMM feature would just be re-enabled by context management at every core power on after being disabled by the errata framework. So in addition to disabling MPMM, this workaround also sets a flag in the MPMM runtime framework indicating that the feature should not be enabled even if ENABLE_MPMM=1.
SDEN can be found here: https://developer.arm.com/documentation/SDEN2397239
Signed-off-by: John Powell <john.powell@arm.com> Change-Id: I7805756e65ec90b6ef8af47e200617c9e07a3a7e
show more ...
|
| 510155aa | 24-Feb-2022 |
Bipin Ravi <bipin.ravi@arm.com> |
Merge changes I7b1498fa,I1d2ebee3,I875519ff,I8c427ef2 into integration
* changes: fix(errata): workaround for Cortex-A510 erratum 2041909 fix(errata): workaround for Cortex-A510 erratum 2042739
Merge changes I7b1498fa,I1d2ebee3,I875519ff,I8c427ef2 into integration
* changes: fix(errata): workaround for Cortex-A510 erratum 2041909 fix(errata): workaround for Cortex-A510 erratum 2042739 fix(errata): workaround for Cortex-A510 erratum 2288014 fix(errata): workaround for Cortex-A510 erratum 1922240
show more ...
|
| 913e0334 | 24-Feb-2022 |
Soby Mathew <soby.mathew@arm.com> |
Merge "docs(el3-runtimes): context management refactor proposal" into integration |
| 9457cec8 | 24-Feb-2022 |
jason-ch chen <jason-ch.chen@mediatek.corp-partner.google.com> |
feat(mt8186): disable 26MHz clock while suspending
Change resource_req to 0 to disable 26MHz clock. SPM firmware will pull-down SRCLKENA0 after 26MHz off while suspending.
TEST=verify 26MHz clock o
feat(mt8186): disable 26MHz clock while suspending
Change resource_req to 0 to disable 26MHz clock. SPM firmware will pull-down SRCLKENA0 after 26MHz off while suspending.
TEST=verify 26MHz clock off using the oscilloscope. BUG=b:215639203
Signed-off-by: Jason-ch Chen <jason-ch.chen@mediatek.com> Change-Id: I05702d14a015cabccd6d4af0e3f2a534fbe4dd12
show more ...
|
| 32742263 | 24-Jan-2022 |
Soby Mathew <soby.mathew@arm.com> |
docs(el3-runtimes): context management refactor proposal
This patch submits an RFC to refactor the context management mechanism in TF-A.
Signed-off-by: Soby Mathew <soby.mathew@arm.com> Change-Id:
docs(el3-runtimes): context management refactor proposal
This patch submits an RFC to refactor the context management mechanism in TF-A.
Signed-off-by: Soby Mathew <soby.mathew@arm.com> Change-Id: Ia1ad5a85cb86c129e2feaf36bed123f0067c3965
show more ...
|
| e76b018f | 23-Feb-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "docs(a3k): add information about system-wide Crypto++ library" into integration |
| 2c23b9c1 | 23-Feb-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "fix(a3k): fix comment about BootROM address range" into integration |
| 80b895ca | 23-Feb-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "feat(board/rdedmunds): add support for rdedmunds variant" into integration |
| 17671798 | 23-Feb-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "bug-fix" into integration
* changes: fix(nxp-crypto): refine code to avoid hang issue for some of toolchain build(changelog): add new scope for nxp crypto fix(lx2): d
Merge changes from topic "bug-fix" into integration
* changes: fix(nxp-crypto): refine code to avoid hang issue for some of toolchain build(changelog): add new scope for nxp crypto fix(lx2): drop erratum A-009810
show more ...
|
| f4e3e1e8 | 10-Jan-2022 |
Tamas Ban <tamas.ban@arm.com> |
fix(measured-boot): add RMM entry to event_log_metadata
Platforms which support Realm world cannot boot up properly if measured boot is enabled at build time. An assertions occurs due to the missing
fix(measured-boot): add RMM entry to event_log_metadata
Platforms which support Realm world cannot boot up properly if measured boot is enabled at build time. An assertions occurs due to the missing RMM entry in the event_log_metadata array.
Signed-off-by: Tamas Ban <tamas.ban@arm.com> Change-Id: I172f10a440797f7c9e1bc79dc72242b40c2521ea
show more ...
|
| 9148f440 | 23-Feb-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(arm): increase ARM_BL_REGIONS count" into integration |
| dcb19591 | 22-Feb-2022 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
fix(arm): increase ARM_BL_REGIONS count
On RME-enabled platforms, it is currently not possible to incorporate mapping of all bl_regions specified in bl31 setup[1] with the ARM_BL_REGIONS macro defin
fix(arm): increase ARM_BL_REGIONS count
On RME-enabled platforms, it is currently not possible to incorporate mapping of all bl_regions specified in bl31 setup[1] with the ARM_BL_REGIONS macro defined to 6. Hence increased its count to 7.
[1]: https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/tree/ plat/arm/common/arm_bl31_setup.c#n380
Change-Id: Ieaa97f026ab2ae6eae22442595aa4122ba0a13c4 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
show more ...
|
| a250c04b | 19-Feb-2022 |
Sieu Mun Tang <sieu.mun.tang@intel.com> |
fix(intel): null pointer handling for resp_len
Previous changes from commit #6a659448 updates resp_len from an integer type to unsigned integer pointer type. This patch adds proper handling in case
fix(intel): null pointer handling for resp_len
Previous changes from commit #6a659448 updates resp_len from an integer type to unsigned integer pointer type. This patch adds proper handling in case resp_len is a null pointer. Resp_len with value 0 are also changed to NULL to match the type change.
Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: I75b3e3bfbb188d8e7b329ba3b948c23e31dec490
show more ...
|
| 7db1895f | 05-Jun-2020 |
Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> |
fix(intel): define macros to handle buffer entries
This patch defines a macro to handle Secure Device Manager's (SDM) pointer to command & response buffer entries and convert them to the correct phy
fix(intel): define macros to handle buffer entries
This patch defines a macro to handle Secure Device Manager's (SDM) pointer to command & response buffer entries and convert them to the correct physical address.
Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: I4cf9f1d90e0d5ae4e1a2ce84165864b48c2862e7
show more ...
|
| 108514ff | 19-Feb-2022 |
Sieu Mun Tang <sieu.mun.tang@intel.com> |
fix(intel): change SMC return arguments for INTEL_SIP_SMC_MBOX_SEND_CMD
'INTEL_SIP_SMC_MBOX_SEND_CMD' SMC runtime service will only return mailbox status and the argument's length back to the caller
fix(intel): change SMC return arguments for INTEL_SIP_SMC_MBOX_SEND_CMD
'INTEL_SIP_SMC_MBOX_SEND_CMD' SMC runtime service will only return mailbox status and the argument's length back to the caller
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Change-Id: I50d2ae74845794cab7bf0858e742b5a70e0ea868
show more ...
|
| e93551bb | 29-Jul-2021 |
Siew Chin Lim <elly.siew.chin.lim@intel.com> |
fix(intel): always set doorbell to SDM after sending command
This patch fixes the mailbox stall issue when sending mailbox command that is larger than mailbox command FIFO size.
Large mailbox comma
fix(intel): always set doorbell to SDM after sending command
This patch fixes the mailbox stall issue when sending mailbox command that is larger than mailbox command FIFO size.
Large mailbox command will be sent to SDM in multiple chunks. HPS will set doorbell to SDM when command FIFO full (is_doorbell_triggered will be set to 1) to notify SDM to read the command data from FIFO, so that HPS can continue to send the next chunk of command data.
However, HPS will not set the doorbell to SDM at the end if the doorbell have been set earlier due to FIFO full. This will cause SDM mailbox service stall because it is still waiting for last chunk of command data.
This patch fixes the code to always set the doorbell to SDM at the end to get rid of stall issue.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com> Change-Id: Idbe62410a00d92a30c7aeaa26d53d79a910cac0a
show more ...
|
| c9c07099 | 09-Jul-2021 |
Siew Chin Lim <elly.siew.chin.lim@intel.com> |
fix(intel): fix bit masking issue in intel_secure_reg_update
intel_secure_reg_update function should apply mask to the value before write into register.
Signed-off-by: Siew Chin Lim <elly.siew.chin
fix(intel): fix bit masking issue in intel_secure_reg_update
intel_secure_reg_update function should apply mask to the value before write into register.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com> Change-Id: I84bbd06e24b8666528b53030e8359743d438eb5b
show more ...
|
| 12d71ac6 | 03-Jul-2020 |
Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> |
fix(intel): fix ddr address range checker
This patch fix address range checker to make sure that it does not errors out on NULL address with size 0. Non-secure software will send this NULL address i
fix(intel): fix ddr address range checker
This patch fix address range checker to make sure that it does not errors out on NULL address with size 0. Non-secure software will send this NULL address if the SMC call doesn't need to pass any address buffer.
Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: I7e492c562a311ba989570c4ed465f845333ec865
show more ...
|
| e564137d | 22-Feb-2022 |
Sieu Mun Tang <sieu.mun.tang@intel.com> |
build(changelog): add new scope for Intel platform
Add new scope for Intel platform.
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com> Change-Id: I1fa7f5e0e5567825615dd0275b204b82fe8c2337 |
| e72bbe47 | 11-Jan-2022 |
johpow01 <john.powell@arm.com> |
fix(errata): workaround for Cortex-A510 erratum 2041909
Cortex-A510 erratum 2041909 is a Cat B erratum that applies to revision r0p2 and is fixed in r0p3. It is also present in r0p0 and r0p1 but the
fix(errata): workaround for Cortex-A510 erratum 2041909
Cortex-A510 erratum 2041909 is a Cat B erratum that applies to revision r0p2 and is fixed in r0p3. It is also present in r0p0 and r0p1 but there is no workaround in these revisions.
SDEN can be found here: https://developer.arm.com/documentation/SDEN2397239
Signed-off-by: John Powell <john.powell@arm.com> Change-Id: I7b1498faa0c79488dee0d11d07f6e9f58144e298
show more ...
|