feat(stm32mp1): introduce new flag for STM32MP13

STM32MP13 is a variant of STM32MP1, with a single Cortex-A7, and no
Cortex-M4.
There is only one DDR port.
SP_min is not supported, only OP-TEE can b

feat(stm32mp1): introduce new flag for STM32MP13

STM32MP13 is a variant of STM32MP1, with a single Cortex-A7, and no
Cortex-M4.
There is only one DDR port.
SP_min is not supported, only OP-TEE can be used as monitor.
STM32MP13 uses the header v2.0 format for stm32image generation
for BL2.

Change-Id: Ie5b0e3230c5e064fe96f3561fc5b3208914dea53
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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feat(st): update stm32image tool for header v2

The stm32image tool is updated to manage new header v2.0 for BL2
images.
Add new structure for the header v2.0 management.
Adapt to keep compatibility

feat(st): update stm32image tool for header v2

The stm32image tool is updated to manage new header v2.0 for BL2
images.
Add new structure for the header v2.0 management.
Adapt to keep compatibility with v1.0.
Add the header version major and minor in the command line
when executing the tool, as well as binary type (0x10 for BL2).

Change-Id: I70c187e8e7e95b57ab7cfad63df314307a78f1d6
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>

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Merge changes from topic "spectre_bhb" into integration

* changes:
fix(security): apply SMCCC_ARCH_WORKAROUND_3 to A73/A75/A72/A57
fix(security): workaround for CVE-2022-23960 for Cortex-A57, Co

Merge changes from topic "spectre_bhb" into integration

* changes:
fix(security): apply SMCCC_ARCH_WORKAROUND_3 to A73/A75/A72/A57
fix(security): workaround for CVE-2022-23960 for Cortex-A57, Cortex-A72
fix(fvp): disable reclaiming init code by default

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feat(spm): add FFA_RX_ACQUIRE forwarding in SPMD

Add FF-A v1.1 FFA_RX_ACQUIRE ABI forwarding to SPMD.
RX acquire interface is used by Hypervisor to acquire ownership of a
VM's RX buffer from SPMC wh

feat(spm): add FFA_RX_ACQUIRE forwarding in SPMD

Add FF-A v1.1 FFA_RX_ACQUIRE ABI forwarding to SPMD.
RX acquire interface is used by Hypervisor to acquire ownership of a
VM's RX buffer from SPMC when it needs to deliver a message to the VM.

Change-Id: I5f57240a9c9e94eb696a5a394ec0644170380026
Signed-off-by: Federico Recanati <federico.recanati@arm.com>

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fix(security): apply SMCCC_ARCH_WORKAROUND_3 to A73/A75/A72/A57

This patch applies CVE-2022-23960 workarounds for Cortex-A75,
Cortex-A73, Cortex-A72 & Cortex-A57. This patch also implements
the new

fix(security): apply SMCCC_ARCH_WORKAROUND_3 to A73/A75/A72/A57

This patch applies CVE-2022-23960 workarounds for Cortex-A75,
Cortex-A73, Cortex-A72 & Cortex-A57. This patch also implements
the new SMCCC_ARCH_WORKAROUND_3 and enables necessary discovery
hooks for Coxtex-A72, Cortex-A57, Cortex-A73 and Cortex-A75 to
enable discovery of this SMC via SMC_FEATURES. SMCCC_ARCH_WORKAROUND_3
is implemented for A57/A72 because some revisions are affected by both
CVE-2022-23960 and CVE-2017-5715 and this allows callers to replace
SMCCC_ARCH_WORKAROUND_1 calls with SMCCC_ARCH_WORKAROUND_3. For details
of SMCCC_ARCH_WORKAROUND_3, please refer SMCCCv1.4 specification.

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: Ifa6d9c7baa6764924638efe3c70468f98d60ed7c

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fix(layerscape): update WA for Errata A-050426

Update WA for Errata A-050426 as Commands for
PEX (PEX1..PEX6) , lnx1_e1000#0, lnx1_xfi and
lnx2_xfi has been moved to PBI phase.

This patch requires

fix(layerscape): update WA for Errata A-050426

Update WA for Errata A-050426 as Commands for
PEX (PEX1..PEX6) , lnx1_e1000#0, lnx1_xfi and
lnx2_xfi has been moved to PBI phase.

This patch requires RCW to include PBI commands
to write commands in BIST mode for PEX, lnx1_e1000,
lnx1_xfi and lnx2_xfi IP blocks.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Change-Id: I27c2b055c82c0b58df83449f9082bfbfdeb65115

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fix(scmi): use same type for message_id

The code declares different types of parameters.

static bool message_id_is_supported(unsigned int message_id);
static bool message_id_is_supported(size_t mes

fix(scmi): use same type for message_id

The code declares different types of parameters.

static bool message_id_is_supported(unsigned int message_id);
static bool message_id_is_supported(size_t message_id)
{
...
}

Signed-off-by: Schspa Shi <schspa@gmail.com>
Change-Id: I7435d3b9309ea5fb5f8e3daa7173e09322184422

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fix(security): workaround for CVE-2022-23960 for Cortex-A57, Cortex-A72

Implements mitigation for Cortex-A72 CPU versions that support
the CSV2 feature(from r1p0). It also applies the mitigation for

fix(security): workaround for CVE-2022-23960 for Cortex-A57, Cortex-A72

Implements mitigation for Cortex-A72 CPU versions that support
the CSV2 feature(from r1p0). It also applies the mitigation for
Cortex-A57 CPU.

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: I7cfcf06537710f144f6e849992612033ddd79d33

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fix(fvp): disable reclaiming init code by default

In anticipation of Spectre BHB workaround mitigation patches, we
disable the RECLAIM_INIT_CODE for FVP platform. Since the spectre
BHB mitigation wo

fix(fvp): disable reclaiming init code by default

In anticipation of Spectre BHB workaround mitigation patches, we
disable the RECLAIM_INIT_CODE for FVP platform. Since the spectre
BHB mitigation workarounds inevitably increase the size of the various
segments due to additional instructions and/or macros, these segments
cannot be fit in the existing memory layout designated for BL31 image.
The issue is specifically seen in complex build configs for FVP
platform. One such config has TBB with Dual CoT and test secure
payload dispatcher(TSPD) enabled. Even a small increase in individual
segment size in order of few bytes might lead to build fails due to
alignment requirements(PAGE_ALIGN to 4KB).

This is needed to workaround the following build failures observed
across multiple build configs:

aarch64-none-elf-ld.bfd: BL31 init has exceeded progbits limit.

aarch64-none-elf-ld.bfd: /work/workspace/workspace/tf-worker_ws_2/trusted_firmware/build/fvp/debug/bl31/bl31.elf section coherent_ram will not fit in region RAM
aarch64-none-elf-ld.bfd: BL31 image has exceeded its limit.
aarch64-none-elf-ld.bfd: region RAM overflowed by 4096 bytes

Change-Id: Idfab539e9a40f4346ee11eea1e618c97e93e19a1
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>

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Merge "fix(xilinx): fix coding style violations" into integration

refactor(st): update set_config_info function call

Pass NS-load address as ~0UL to the 'set_config_info' function while
updating FW_CONFIG device tree information since it is always loaded
into secu

refactor(st): update set_config_info function call

Pass NS-load address as ~0UL to the 'set_config_info' function while
updating FW_CONFIG device tree information since it is always loaded
into secure memory.

Change-Id: Ieeaf9c97085128d7b7339d34495bdd58cd9fcf8a
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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refactor(fvp_r): update set_config_info function call

Pass NS-load address as ~0UL to the 'set_config_info' function while
updating FW_CONFIG device tree information since it is always loaded
into s

refactor(fvp_r): update set_config_info function call

Pass NS-load address as ~0UL to the 'set_config_info' function while
updating FW_CONFIG device tree information since it is always loaded
into secure memory.

Change-Id: I64e8531e0ad5cda63f14d838efb9da9cf20beea8
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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refactor(arm): update set_config_info function call

Pass NS-load address as ~0UL to the 'set_config_info' function while
updating FW_CONFIG device tree information since it is always loaded
into sec

refactor(arm): update set_config_info function call

Pass NS-load address as ~0UL to the 'set_config_info' function while
updating FW_CONFIG device tree information since it is always loaded
into secure memory.

Change-Id: Ia33adfa9e7b0392f62056053a2df7db321a74e22
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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Merge "feat(mt8186): add DFD control in SiP service" into integration

docs(a3k): update documentation about DEBUG mode for UART

DEBUG mode can be enabled without any issue for Armada 37xx and also for
other A7K/A8K/CN913x. There is no incompatibility with Xmodem proto

docs(a3k): update documentation about DEBUG mode for UART

DEBUG mode can be enabled without any issue for Armada 37xx and also for
other A7K/A8K/CN913x. There is no incompatibility with Xmodem protocol
like it was written before, because Armada 37xx UART images do not print
anything on UART during image transfer and A7K/A8K/CN913x BLE image
automatically turn off debugging output when booting over UART. Looks
like this incorrect information is some relict from the past.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I85adc3c21036656b4620c4692e04330cad11ea2f

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Merge "fix(a3k): change fatal error to warning when CM3 reset is not implemented" into integration

fix(a3k): change fatal error to warning when CM3 reset is not implemented

This allows TF-A's a3700_system_reset() function to try Warm reset
method when CM3 reset method is not implemented by WTMI f

fix(a3k): change fatal error to warning when CM3 reset is not implemented

This allows TF-A's a3700_system_reset() function to try Warm reset
method when CM3 reset method is not implemented by WTMI firmware.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I7303197373e1a8ca5a44ba0b1e90b48855d6c0c3

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feat(fconf): add NS load address in configuration DTB nodes

Retrieved the NS load address of configs from FW_CONFIG device tree,
and modified the prototype of "set_config_info" to update device tree

feat(fconf): add NS load address in configuration DTB nodes

Retrieved the NS load address of configs from FW_CONFIG device tree,
and modified the prototype of "set_config_info" to update device tree
information with the retrieved address.

Change-Id: Ic5a98ba65bc7aa0395c70c7d450253ff8d84d02c
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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fix(ufs): move nutrs assignment to ufs_init

nutrs is set in ufs_enum (used by get_empty_slot), this will not
be assigned if UFS_FLAGS_SKIPINIT is set in flags during init and
might end up crashing r

fix(ufs): move nutrs assignment to ufs_init

nutrs is set in ufs_enum (used by get_empty_slot), this will not
be assigned if UFS_FLAGS_SKIPINIT is set in flags during init and
might end up crashing read/write commands

Change-Id: I1517b69c56741fd5bf4ef0ebc1fc8738746233d7
Signed-off-by: anans <anans@google.com>

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fix(ufs): fix cache maintenance issues

Fix software cache maintenance issues that can happen when
cpu prefetches data before DMA operations are complete.
This change fixes two cases one for ufs_read

fix(ufs): fix cache maintenance issues

Fix software cache maintenance issues that can happen when
cpu prefetches data before DMA operations are complete.
This change fixes two cases one for ufs_read_blocks and
other for ufs_check_resp, in both cases invalidation of
buffer was done before the DMA operation completed.
This caused cpu prefetcher to bring data into cache
before DMA completed and caused UFS read failures.
The changes also removes unwanted cache operations to
local variable utrd which is not consumed by UFS host
controller and zeroing out buffer in ufs_read_capacity.

Change-Id: I9a288eb19d6705f6fa8bdb0b817a6411235fd8b6
Signed-off-by: Channagoud kadabi <kadabi@google.com>

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Merge changes from topic "spectre_bhb" into integration

* changes:
fix(security): loop workaround for CVE-2022-23960 for Cortex-A76
refactor(el3-runtime): change Cortex-A76 implementation of CVE

Merge changes from topic "spectre_bhb" into integration

* changes:
fix(security): loop workaround for CVE-2022-23960 for Cortex-A76
refactor(el3-runtime): change Cortex-A76 implementation of CVE-2018-3639

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Merge changes from topic "revert-14286-uart_segregation-VURJFOWMTM" into integration

* changes:
Revert "feat(sgi): deviate from arm css common uart related defi..."
Revert "feat(sgi): route TF-A

Merge changes from topic "revert-14286-uart_segregation-VURJFOWMTM" into integration

* changes:
Revert "feat(sgi): deviate from arm css common uart related defi..."
Revert "feat(sgi): route TF-A logs via secure uart"
Revert "feat(sgi): add page table translation entry for secure uart"

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refactor(ufs): adds a function for sending command

new function for sending commands and reuses that function in the
driver, this can also be used to have retries for specific
commands in the future

refactor(ufs): adds a function for sending command

new function for sending commands and reuses that function in the
driver, this can also be used to have retries for specific
commands in the future

Signed-off-by: anans <anans@google.com>
Change-Id: Ie01f36ff8e2df072db4d97929d293b80ed24f04b

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Merge "fix(security): workaround for CVE-2022-23960" into integration

Revert "feat(sgi): deviate from arm css common uart related defi..."

Revert submission 14286-uart_segregation

Reason for revert: Need to wait for companion patches in CI and UEFI/Linux to be upstre

Revert "feat(sgi): deviate from arm css common uart related defi..."

Revert submission 14286-uart_segregation

Reason for revert: Need to wait for companion patches in CI and UEFI/Linux to be upstreamed.

Reverted Changes:
I8574b31d5:feat(sgi): add page table translation entry for se...
I8896ae05e:feat(sgi): route TF-A logs via secure uart
I39170848e:feat(sgi): deviate from arm css common uart relate...

Change-Id: I28a370dd8b3a37087da621460eccc1acd7a30287

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