Merge changes from topic "lfa-plat-activate" into integration

* changes:
feat(fvp): add stub implementation for plat_lfa_notify_activate()
feat(lfa): add platform hook for activation notification

Merge changes from topic "rmm-lfa" into integration

* changes:
feat(arm): handle RMM ep_info during LFA
feat(lfa): add helper to check LFA prime completion status
feat(lfa): enable LFA of RMM

Merge changes from topic "rmm-lfa" into integration

* changes:
feat(arm): handle RMM ep_info during LFA
feat(lfa): add helper to check LFA prime completion status
feat(lfa): enable LFA of RMM
chore(lfa): use standard int return type for prime/activate callbacks
feat(rmmd): add warm reset helpers for primary and secondary CPUs

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Merge "fix(versal2): enable graceful system shutdown" into integration

fix(versal2): enable graceful system shutdown

Power down the APU cores before sending SYSTEM_SHUTDOWN call to
PLM firmware. This ensures graceful system shutdown.

Change-Id: I89a132e72c9a2530620ffb

fix(versal2): enable graceful system shutdown

Power down the APU cores before sending SYSTEM_SHUTDOWN call to
PLM firmware. This ensures graceful system shutdown.

Change-Id: I89a132e72c9a2530620ffb58aaec752796d01d3e
Signed-off-by: Naman Trivedi <naman.trivedimanojbhai@amd.com>

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Merge changes from topic "xlnx_enhance_tfa_feature_check" into integration

* changes:
chore(xilinx): add deprecation warning to pm_feature_check
refactor(xilinx): rename eemi_feature_check to tf

Merge changes from topic "xlnx_enhance_tfa_feature_check" into integration

* changes:
chore(xilinx): add deprecation warning to pm_feature_check
refactor(xilinx): rename eemi_feature_check to tfa_api_feature_check

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Merge changes from topic "xlnx_subsystem_restart_fix_versal2" into integration

* changes:
fix(versal2): handle debugfs specific APIs before EEMI handler
fix(versal2): use PM_STATE_CPU_OFF for co

Merge changes from topic "xlnx_subsystem_restart_fix_versal2" into integration

* changes:
fix(versal2): handle debugfs specific APIs before EEMI handler
fix(versal2): use PM_STATE_CPU_OFF for core power down in SELF_SUSPEND

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Merge "build(dev-deps): bump pyright" into integration

feat(cpus): add support for caddo cpu

Add basic CPU library code to support Caddo CPU

Change-Id: I4b431771ebe6f23eb02f3301ff656cfcd4956f81
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

feat(cpus): add support for veymont cpu

Add basic CPU library code to support Veymont CPU

Change-Id: I44db5650e7c9cf8fcc368c935574f4702c373dae
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

Merge "fix(intel): update nand driver to enable Linux OS boot" into integration

fix(versal2): handle debugfs specific APIs before EEMI handler

In Versal Gen 2 SoC, all PM APIs use the extended SMC format including
the debugfs-specific APIs. So, call eemi_psci_debugfs_handler be

fix(versal2): handle debugfs specific APIs before EEMI handler

In Versal Gen 2 SoC, all PM APIs use the extended SMC format including
the debugfs-specific APIs. So, call eemi_psci_debugfs_handler before
eemi_api_handler. This ensures that debugfs-specific PM APIs are handled
correctly by TF-A and are not forwarded to the PLM firmware.

Change-Id: Ibab08c851c853a8f4272783b210040ddf7291d76
Signed-off-by: Naman Trivedi <naman.trivedimanojbhai@amd.com>

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fix(versal2): use PM_STATE_CPU_OFF for core power down in SELF_SUSPEND

Currently TF-A provides PM_STATE_CPU_IDLE state during SELF_SUSPEND
to power down the core. PM_STATE_CPU_IDLE is intended for C

fix(versal2): use PM_STATE_CPU_OFF for core power down in SELF_SUSPEND

Currently TF-A provides PM_STATE_CPU_IDLE state during SELF_SUSPEND
to power down the core. PM_STATE_CPU_IDLE is intended for CPU-idle
suspend paths (when Linux CPU idle is enabled) and is not the correct
state for a full core power-off.

Fix this by providing PM_STATE_CPU_OFF state to power down the core.

Change-Id: I25585b32fe90372b0404a1ad89544f1aaa2f34a2
Signed-off-by: Naman Trivedi <naman.trivedimanojbhai@amd.com>

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Merge "refactor(build): avoid implicit pattern rules" into integration

docs: add dependabot patches for LTS

The GitHub dependabot creates patches for Node.js or python tools used
by TF-A. Those patches are created for main branch but also for LTS
branches. They should

docs: add dependabot patches for LTS

The GitHub dependabot creates patches for Node.js or python tools used
by TF-A. Those patches are created for main branch but also for LTS
branches. They should be cherry-picked in LTS branches. Add some
directives about that in the LTS documentation.

Change-Id: Ibb730d98818d1b2913d479d25c25ac36b4476864
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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feat(rcar): split common SCIF code

Move common SCIF code into drivers/renesas/common/scif/scif-common.c
and retain only SoC-specific console_rcar_init() in
drivers/renesas/rcar_gen4/scif/scif.c. Thi

feat(rcar): split common SCIF code

Move common SCIF code into drivers/renesas/common/scif/scif-common.c
and retain only SoC-specific console_rcar_init() in
drivers/renesas/rcar_gen4/scif/scif.c. This allows other SoCs to
reuse the common code and add only SoC specific glue code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Change-Id: Ie970984ea551e482479af91524974b281923f813

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feat(rcar): replace static rcar_putc pointer with static register offsets

Replace static rcar_putc pointer with static register offsets to make
the driver more generic for future Renesas R-Car SoCs.

feat(rcar): replace static rcar_putc pointer with static register offsets

Replace static rcar_putc pointer with static register offsets to make
the driver more generic for future Renesas R-Car SoCs. Introduce new
function scif_console_set_regs() to assign SCIF registers into static
variables, and call scif_console_set_regs() based on MODEMR register
settings. Other SoCs might simply call scif_console_set_regs() with
fixed register offsets.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Change-Id: Ia13f8e098b2776b520d24daf7acb7538b1ef3feb

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feat(rcar): deduplicate SCIF console_rcar_register

The console_rcar_register assembler macro is functionally identical
between Renesas R-Car Gen3 and R-Car Gen4, deduplicate the code.

Signed-off-by

feat(rcar): deduplicate SCIF console_rcar_register

The console_rcar_register assembler macro is functionally identical
between Renesas R-Car Gen3 and R-Car Gen4, deduplicate the code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Change-Id: Ib498832dbed9063efdb9979e89e53d119303d9df

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feat(rcar): deduplicate PWRC timer

The PWRC timer code is functionally identical between
Renesas R-Car Gen3 and R-Car Gen4, deduplicate the code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mai

feat(rcar): deduplicate PWRC timer

The PWRC timer code is functionally identical between
Renesas R-Car Gen3 and R-Car Gen4, deduplicate the code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Change-Id: Id50a730ea58faedaa24380fd3171be171ecd7269

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feat(rcar): deduplicate PWRC SRAM trampoline

The PWRC SRAM trampoline code is functionally identical between
Renesas R-Car Gen3 and R-Car Gen4, deduplicate the code.

Signed-off-by: Marek Vasut <mar

feat(rcar): deduplicate PWRC SRAM trampoline

The PWRC SRAM trampoline code is functionally identical between
Renesas R-Car Gen3 and R-Car Gen4, deduplicate the code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Change-Id: I24209ac0277fa12898bbeea69d93a8f057e76ed4

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feat(rcar): deduplicate stack protector

The stack protector code is functionally identical between
Renesas R-Car Gen3 and R-Car Gen4, deduplicate the code.

Signed-off-by: Marek Vasut <marek.vasut+r

feat(rcar): deduplicate stack protector

The stack protector code is functionally identical between
Renesas R-Car Gen3 and R-Car Gen4, deduplicate the code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Change-Id: I1caf6cc6a9ace678b50013eee1a5506fba9acccc

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chore(xilinx): add deprecation warning to pm_feature_check

Add deprecation warning to pm_feature_check() function to inform
users that this API will be removed in the 2027.1 release and
they should

chore(xilinx): add deprecation warning to pm_feature_check

Add deprecation warning to pm_feature_check() function to inform
users that this API will be removed in the 2027.1 release and
they should migrate to tfa_api_feature_check() for TF-A specific
feature checks.

This warning helps customers prepare for the upcoming API removal
and encourages migration to the correct function.

Change-Id: Icab5eb6f1a552553b1cc1215aa683430733667bd
Signed-off-by: Devanshi Chauhan <devanshi.chauhan@amd.com>

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refactor(xilinx): rename eemi_feature_check to tfa_api_feature_check

Rename eemi_feature_check() to tfa_api_feature_check() for better
clarity. The new name clearly indicates its purpose of handling

refactor(xilinx): rename eemi_feature_check to tfa_api_feature_check

Rename eemi_feature_check() to tfa_api_feature_check() for better
clarity. The new name clearly indicates its purpose of handling TF-A
specific feature checks and improves code maintainability.

Change-Id: Ia74b12933427ccadbc8ede5ddc2a7a4822766264
Signed-off-by: Devanshi Chauhan <devanshi.chauhan@amd.com>

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Merge "fix(versal): modify IPI4 and IPI5 trigger bit definitions" into integration

fix(versal): modify IPI4 and IPI5 trigger bit definitions

The IPI4 and IPI5 trigger bit definitions are incorrect according
to the register database specification. This discrepancy can
cause IPI com

fix(versal): modify IPI4 and IPI5 trigger bit definitions

The IPI4 and IPI5 trigger bit definitions are incorrect according
to the register database specification. This discrepancy can
cause IPI communication failures between processing units in
Versal SoCs. So, modified the trigger bits to align the software
definitions with the hardware register specification as documented
in the register database.

Change-Id: I1e32961124daf8e5635906fb615e98a650130f27
Signed-off-by: Devanshi Chauhan <devanshi.chauhan@amd.com>

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Merge "chore(vscode): ignore noisy directories" into integration