History log of /rk3399_ARM-atf/ (Results 7876 – 7900 of 18347)
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b40a467707-Jan-2022 Dave Gerlach <d-gerlach@ti.com>

feat(ti): add gic save and restore calls

Add functions to save and restore GICv3 redist and dist contexts during
low power mode and then call these during the suspend entry and finish
psci handlers.

feat(ti): add gic save and restore calls

Add functions to save and restore GICv3 redist and dist contexts during
low power mode and then call these during the suspend entry and finish
psci handlers.

Change-Id: I26c2c0f3b7fc925de3b349499fa42d2405441577
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>

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cf5868b830-Nov-2021 Dave Gerlach <d-gerlach@ti.com>

feat(ti): add enter sleep method

This TISCI API must be used to trigger entry into system suspend, and
this is done through the use of TI_SCI_MSG_ENTER_SLEEP. Introduce a
method to send this message

feat(ti): add enter sleep method

This TISCI API must be used to trigger entry into system suspend, and
this is done through the use of TI_SCI_MSG_ENTER_SLEEP. Introduce a
method to send this message.

Change-Id: Id7af5fb2a34623ad69e76764f389ff4d8d259fba
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>

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19a9cc3a27-Apr-2022 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge "docs(zynqmp): update the make command" into integration

3dbbd41f27-Apr-2022 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge changes Ibe6fd206,Icdca3de6,I72016620,I57a2787c into integration

* changes:
fix(versal): fix coverity scan warnings
feat(versal): get version for ATF related EEMI APIs
feat(versal): enha

Merge changes Ibe6fd206,Icdca3de6,I72016620,I57a2787c into integration

* changes:
fix(versal): fix coverity scan warnings
feat(versal): get version for ATF related EEMI APIs
feat(versal): enhance PM_IOCTL EEMI API to support additional arg
feat(versal): add common interfaces to handle EEMI commands

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9284d21227-Apr-2022 Manish Pandey <manish.pandey2@arm.com>

Merge "refactor(twed): improve TWED enablement in EL-3" into integration

fa4751f227-Apr-2022 Manish Pandey <manish.pandey2@arm.com>

Merge changes from topic "st_clk_fix" into integration

* changes:
fix(st-clock): correct stm32_clk_parse_fdt_by_name
fix(st-clock): check _clk_stm32_get_parent return

e8e7cdf311-Apr-2022 Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>

docs(zynqmp): update the make command

Update the make command with the RESET_TO_BL31=1 addition.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I46cc81abb5397737

docs(zynqmp): update the make command

Update the make command with the RESET_TO_BL31=1 addition.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I46cc81abb539773706348464b3061d20d94522e9

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0b15187223-Mar-2022 Tanmay Shah <tanmay.shah@xilinx.com>

fix(versal): fix coverity scan warnings

- Fix memory overrun issue
- include header file to fix Unknown macro warning

Change-Id: Ibe6fd206f44fbc22de746d255ff17c2b2325cd7b
Signed-off-by: Tanmay Shah

fix(versal): fix coverity scan warnings

- Fix memory overrun issue
- include header file to fix Unknown macro warning

Change-Id: Ibe6fd206f44fbc22de746d255ff17c2b2325cd7b
Signed-off-by: Tanmay Shah <tanmay.shah@xilinx.com>

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da6e654b04-Feb-2022 Ronak Jain <ronak.jain@xilinx.com>

feat(versal): get version for ATF related EEMI APIs

The patch does below things.

1. As per current implementation, when Linux send a request to ATF to
get the version of APIs which are implemented

feat(versal): get version for ATF related EEMI APIs

The patch does below things.

1. As per current implementation, when Linux send a request to ATF to
get the version of APIs which are implemented in ATF then ATF wasn't
returning any version because there is a check for LIBPM module id.
The ATF is used to return version for the APIs which are implemented
in the firmware only.

Hence moved this switch-case before checking module id to get ATF
version.

Also, no need to pass Linux request to the firmware for the APIs
which are implemented in ATF instead return success after updating
version.

2. As per current implementation, higher 16-bit is used for ATF
version and lower 16-bit is used for firmware version. Now, removed
16-bit shift operation and send complete word i.e. 32-bit to Linux
user as there is no user who checks ATF version.

3. Add bit mask support in the feature check PM EEMI API for QUERY and
IOCTL ids.

Change-Id: Icdca3de6659f3b673b81a423ed79a3c20b678768
Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Signed-off-by: Tanmay Shah <tanmay.shah@xilinx.com>

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d34a5db821-Oct-2021 Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>

feat(versal): enhance PM_IOCTL EEMI API to support additional arg

Currently, SMC handler is limited to parsing 5 arguments (1 API ID + 4
32-bit command args). Extend this handling to support one mor

feat(versal): enhance PM_IOCTL EEMI API to support additional arg

Currently, SMC handler is limited to parsing 5 arguments (1 API ID + 4
32-bit command args). Extend this handling to support one more 32-bit
command argument which is necessary to support new IOCTL IDs for
secure read/write interface.

Note that, this change is completely transparent and does not affect
existing functionality of any of the EEMI APIs.

Change-Id: I72016620eeeaf598f14853512120bfb30bb9a3e9
Signed-off-by: Izhar Ameer Shaikh <izhar.ameer.shaikh@xilinx.com>
Signed-off-by: Tanmay Shah <tanmay.shah@xilinx.com>

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1397967409-Aug-2021 Tanmay Shah <tanmay.shah@xilinx.com>

feat(versal): add common interfaces to handle EEMI commands

This change adds common interfaces to handle commands from firmware driver
to power management controller. It removes big chunk of source

feat(versal): add common interfaces to handle EEMI commands

This change adds common interfaces to handle commands from firmware driver
to power management controller. It removes big chunk of source line of code
that was handling each command separately and doing same repetitive work.

EEMI - Embedded Energy Management Interface is Xilinx proprietary
protocol to allow communication between power management controller
and different processing clusters.

As of now, Each EEMI command has its own implementation in TF-A.
This is redundant. Essentially most EEMI command implementation
in TF-A does same work. It prepares payload received from kernel, sends
payload to firmware, receives response from firmware and send response
back to kernel.

The same functionality can be achieved if common interface is used among
multiple EEMI commands. This change divides platform management related
SMCCC requests into 4 categories.

1) EEMI commands required for backward compatibility.

Some EEMI commands are still required for backward compatibility
until removed completely or its use is changed to accommodate
common interface

2) EEMI commands that require for PSCI interface and accessed from debugfs

For example EEMI calls related to CPU suspend/resume

3) TF-A specific requests

Functionality such as getting TF-A version and getting callback
data for platform management is handled by this interface

4) Common interface for rest of EEMI commands

This handlers performs payload and firmware response transaction job for
rest of EEMI commands. Also it parses module ID from SMC payload and inserts
in IPI request. If not module ID is found, then default is LIBPM_MODULE_ID.
This helps in making common path in TF-A for all the modules in PLM firmware

Change-Id: I57a2787c7fff9f2e1d1f9003b3daab092632d57e
Signed-off-by: Tanmay Shah <tanmay.shah@xilinx.com>

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2fe9d05826-Apr-2022 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge "feat(tc): enable CI-700 PMU for profiling" into integration

fbfc598422-Feb-2022 Rupinderjit Singh <rupinderjit.singh@arm.com>

feat(tc): enable CI-700 PMU for profiling

Change-Id: Iaafdfc440b362022e6103eabf3fb2ebed85b6575
Signed-off-by: Rupinderjit Singh <rupinderjit.singh@arm.com>

e2b1877123-Jan-2022 Samuel Holland <samuel@sholland.org>

feat(allwinner): provide CPU idle states to the rich OS

When using SCPI as the PSCI backend, firmware can wake up the CPUs and
cluster from sleep, so CPU idle states are available for the rich OS to

feat(allwinner): provide CPU idle states to the rich OS

When using SCPI as the PSCI backend, firmware can wake up the CPUs and
cluster from sleep, so CPU idle states are available for the rich OS to
use. In that case, advertise them to the rich OS via the DTB.

Change-Id: I718ef6ef41212fe5213b11b4799613adbbe6e0eb
Signed-off-by: Samuel Holland <samuel@sholland.org>

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52466ec319-Mar-2021 Samuel Holland <samuel@sholland.org>

feat(allwinner): simplify CPU_SUSPEND power state encoding

Use the encoding recommended by the PSCI specification: four bits for
the power state at each power level.

SCPI provides no way to handsha

feat(allwinner): simplify CPU_SUSPEND power state encoding

Use the encoding recommended by the PSCI specification: four bits for
the power state at each power level.

SCPI provides no way to handshake an exit from a standby state, so the
only possible standby state is the architectural WFI state. Since WFI
can be used outside of PSCI, we do not allow passing in standby states.

Change-Id: I4b3b84e5c255ee58a25255a0cab5d7623425086e
Signed-off-by: Samuel Holland <samuel@sholland.org>

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159c36fd19-Mar-2021 Samuel Holland <samuel@sholland.org>

feat(allwinner): choose PSCI states to avoid translation

Aligning the PSCI and SCPI power states avoids some code to translate
between the two. This also makes room for an intermediate power state,

feat(allwinner): choose PSCI states to avoid translation

Aligning the PSCI and SCPI power states avoids some code to translate
between the two. This also makes room for an intermediate power state,
for future firmware capability growth.

Change-Id: I26691085f277a96bd405e3305ab0fe390a92b418
Signed-off-by: Samuel Holland <samuel@sholland.org>

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2b2b565723-Jan-2022 Samuel Holland <samuel@sholland.org>

feat(fdt): add the ability to supply idle state information

Some platforms require extra firmware to implement CPU_SUSPEND, or only
have working CPU_SUSPEND in certain configurations. On these platf

feat(fdt): add the ability to supply idle state information

Some platforms require extra firmware to implement CPU_SUSPEND, or only
have working CPU_SUSPEND in certain configurations. On these platforms,
CPU idle states should only be listed in the devicetree when they are
actually available. Add a function BL31 can use to dynamically supply
this idle state information.

Change-Id: I64fcc288303faba8abec4f59efd13a04220d54dc
Signed-off-by: Samuel Holland <samuel@sholland.org>

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79808f1023-Jan-2022 Samuel Holland <samuel@sholland.org>

fix(allwinner): improve DTB patching error handling

Currently, if any step of the DTB patching process fails, the whole
process is aborted. However, this causes some problems:
- If any step modifie

fix(allwinner): improve DTB patching error handling

Currently, if any step of the DTB patching process fails, the whole
process is aborted. However, this causes some problems:
- If any step modifies the DTB (including fdt_open_into), the dcache
must still be cleaned, even if some later step fails.
- The DTB may need changes in multiple places; if one patch fails (for
example due to missing nodes), we should still apply other patches.
- Similarly, if some patch fails, we should still run fdt_pack to
clean up after ourselves.

Change-Id: If1af2e58e5a7edaf542354bb8a261dd1c3da1ad0
Signed-off-by: Samuel Holland <samuel@sholland.org>

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3ccccc6523-Jan-2022 Samuel Holland <samuel@sholland.org>

refactor(allwinner): patch the DTB after setting up PSCI

Idle states are advertised to the rich OS by declaring them in the DTB.
Since the availability of idle states depends on which PSCI
implement

refactor(allwinner): patch the DTB after setting up PSCI

Idle states are advertised to the rich OS by declaring them in the DTB.
Since the availability of idle states depends on which PSCI
implementation was chosen, the DTB must be updated after PSCI setup.

Move this operation to bl31_plat_runtime_setup, the platform hook
which happens at the right time. Defining this hook overrides the weak
definition from plat/common, so copy over the code from there, too.

Change-Id: I42a83edb9cb28e1803d17dc2d73dbc879d885222
Signed-off-by: Samuel Holland <samuel@sholland.org>

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1aa7e30219-Dec-2021 Andre Przywara <andre.przywara@arm.com>

feat(libfdt): add function to set MAC addresses

The devicetree specification[1] defines the generic DT properties
"mac-address" and "local-mac-address", that allow to set the MAC address
for a netwo

feat(libfdt): add function to set MAC addresses

The devicetree specification[1] defines the generic DT properties
"mac-address" and "local-mac-address", that allow to set the MAC address
for a network device. This is needed because many platform network
devices do not define a method for obtaining a unique MAC address, and
many devices lack the non-volatile storage to hold such a number.

Some platforms (for instance Allwinner) derive the MAC address from
another unique SoC property, for instance some serial number. To allow
those MAC address to be set by TF-A, add a function that finds the DT
node of a network device (by using the "ethernet<x>" alias), then adding
the "local-mac-address" property into that node, setting it to a user
provided address. Platforms can use this function to generate MAC
addresses in a platform specific way, and store them in the DT.

DT consumers like U-Boot or the Linux kernel will automatically pick up
the address from that property and program the MAC device accordingly.

[1] https://devicetree-specification.readthedocs.io/en/latest/chapter4-device-bindings.html#local-mac-address-property

Change-Id: I3f5766cc575fa9718f9ca23e8269b11495c43be2
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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6fa8e72e19-Dec-2021 Andre Przywara <andre.przywara@arm.com>

refactor(allwinner): move DTB change code into allwinner/common

So far the H616 was the only Allwinner SoC needed to amend the DTB, to
reserve the DRAM portion that BL31 occupies.
To allow other SoC

refactor(allwinner): move DTB change code into allwinner/common

So far the H616 was the only Allwinner SoC needed to amend the DTB, to
reserve the DRAM portion that BL31 occupies.
To allow other SoCs to modify the DTB as well, without duplicating code,
move the DTB change routines into Allwinner common code, and generalise
the current code to allow other modifications.

No functional change intended.

Change-Id: I080ea07b6470367f3c2573a4368f8ef5196d411c
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>

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a0d3df6625-Apr-2022 Manish V Badarkhe <Manish.Badarkhe@arm.com>

docs(fvp): specify correct reference of the hw_config address

TB_FW_CONFIG DT no longer contains the address of HW_CONFIG; it has
been moved to the FW_CONFIG DT since the introduction of FCONF.
Henc

docs(fvp): specify correct reference of the hw_config address

TB_FW_CONFIG DT no longer contains the address of HW_CONFIG; it has
been moved to the FW_CONFIG DT since the introduction of FCONF.
Hence updated the documentation accordingly.

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I37b68502a89dbd521acd99f2cb3aeb0bd36a04e0

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e61c00fa26-Apr-2022 Joanna Farley <joanna.farley@arm.com>

Merge "docs(intel): add Sieu Mun and Benjamin Jit Loon as maintainers" into integration

ab1c943926-Apr-2022 Sandrine Bailleux <sandrine.bailleux@arm.com>

Merge changes from topic "sb/mbedtls-2.28" into integration

* changes:
docs(prerequisites): upgrade to mbed TLS 2.28.0
build(deps): upgrade to mbed TLS 2.28.0

a475518318-Apr-2022 anans <anans@google.com>

fix(ufs): read and write attribute based on spec

according to the spec, the response to read attr comes in the
ts.attr.value field and not in the data segment.

Signed-off-by: anans <anans@google.co

fix(ufs): read and write attribute based on spec

according to the spec, the response to read attr comes in the
ts.attr.value field and not in the data segment.

Signed-off-by: anans <anans@google.com>
Change-Id: Iaf21883bb7e364fd7c7e4bccb33359367a0cf99d

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