History log of /rk3399_ARM-atf/ (Results 7776 – 7800 of 18314)
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822c727922-Mar-2022 J-Alves <joao.alves@arm.com>

feat(sptool): use python version of sptool

Change-Id: I567ef0b977c69c38323740a592dd9451e261a407
Signed-off-by: J-Alves <joao.alves@arm.com>

2e82874c21-Mar-2022 J-Alves <joao.alves@arm.com>

feat(sptool): python version of the sptool

To cope with the changes/design decisions in the implementation of
boot protocol, from FF-A v1.1 specification in the S-EL2 SPM, we have
changed the format

feat(sptool): python version of the sptool

To cope with the changes/design decisions in the implementation of
boot protocol, from FF-A v1.1 specification in the S-EL2 SPM, we have
changed the format of the sp pkg header.
These changes need to be reflected in the sptool, used for packaging
the SP binary, and the SP's FF-A manifest. Now the SP pkg can
contain the boot information blob as defined by the FF-A specification.
To cater for these changes, bring to the TF-A project an equivalent to
the tool used in the Hafnium project.

Signed-off-by: J-Alves <joao.alves@arm.com>
Change-Id: I046f5d6e3c2ef0ba6c87f65302e127dedef34c28

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b7bd986304-May-2022 Manish Pandey <manish.pandey2@arm.com>

Merge changes from topic "hm/make-refactor" into integration

* changes:
docs(prerequisites): use LLVM utilities to build with clang
build(make): use clang binutils to compile

8ac22f7904-May-2022 Manish Pandey <manish.pandey2@arm.com>

Merge "feat(allwinner): add SMCCC SOCID support" into integration

7affa25c14-Feb-2022 Marc Bonnici <marc.bonnici@arm.com>

feat(spmc/lsp): add logical partition framework

Introduce a framework to support running logical
partitions alongside the SPMC in EL3 as per the
v1.1 FF-A spec.

The DECLARE_LOGICAL_PARTITION macro

feat(spmc/lsp): add logical partition framework

Introduce a framework to support running logical
partitions alongside the SPMC in EL3 as per the
v1.1 FF-A spec.

The DECLARE_LOGICAL_PARTITION macro has been added to
simplify the process to define a Logical Partition.
The partitions themselves are statically allocated
with the descriptors placed in RO memory.

It is assumed that the MAX_EL3_LP_DESCS_COUNT will
be defined by the platform.

Change-Id: I1c2523e0ad2d9c5d36aeeef6b8bcb1e80db7c443
Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>

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a150486c04-May-2022 Manish Pandey <manish.pandey2@arm.com>

refactor(mt6795): remove mediatek's mt6795 platform

Mediatek's mt6795 platform was deprecated in 2.5 release and as per [1]
a platform which has been marked deprecated should be removed from repo
af

refactor(mt6795): remove mediatek's mt6795 platform

Mediatek's mt6795 platform was deprecated in 2.5 release and as per [1]
a platform which has been marked deprecated should be removed from repo
after 2 release cycle.

[1] https://trustedfirmware-a.readthedocs.io/en/latest/plat/deprecated.html?highlight=deprecated

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: Ic427a3071316a13f34a726a1eb086b679e1671a1

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15e5414804-May-2022 Manish Pandey <manish.pandey2@arm.com>

refactor(sgm775): remove Arm sgm775 platform

Arm's sgm775 platform was deprecated in 2.5 release and as per [1] a
platform which has been marked deprecated should be removed from repo
after 2 releas

refactor(sgm775): remove Arm sgm775 platform

Arm's sgm775 platform was deprecated in 2.5 release and as per [1] a
platform which has been marked deprecated should be removed from repo
after 2 release cycle.

[1] https://trustedfirmware-a.readthedocs.io/en/latest/plat/deprecated.html?highlight=deprecated

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I3cce6f330a1def725188eefd558bd0e4ec559725

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a96a07bf21-Mar-2022 J-Alves <joao.alves@arm.com>

refactor(sptool): use SpSetupActions in sp_mk_generator.py

The "sp_mk_generator.py" is responsible for processing the SP layout
file, which contains information about the SPs to be deployed on top o

refactor(sptool): use SpSetupActions in sp_mk_generator.py

The "sp_mk_generator.py" is responsible for processing the SP layout
file, which contains information about the SPs to be deployed on top of
the SPM, to generate the "sp_gen.mk" file which appends information
specific to each SP that shall help with packing all SPs into a fip
binary.
Before this patch the "sp_mk_generator.py" was a monolithic script,
which has now been broken down into functions for each identified
configuration action.

Signed-off-by: J-Alves <joao.alves@arm.com>
Change-Id: I8ee7487f2e07d53e508d17d0fe4510e22957f5ca

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b1e6a41521-Mar-2022 J-Alves <joao.alves@arm.com>

feat(sptool): add python SpSetupActions framework

Developed python framework to help with SPs configuration. The framework
allows for functions (dubbed "actions" in the framework) to be defined
that

feat(sptool): add python SpSetupActions framework

Developed python framework to help with SPs configuration. The framework
allows for functions (dubbed "actions" in the framework) to be defined
that should process the "sp_layout.json" file.

Signed-off-by: J-Alves <joao.alves@arm.com>
Change-Id: I278cd5a7aa0574168473e28f3b0fe231d7b548ee

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6dc0f1f304-May-2022 Sandrine Bailleux <sandrine.bailleux@arm.com>

Merge "build(commitlint): make the scope optional" into integration

436cd75425-Sep-2020 Andre Przywara <andre.przywara@arm.com>

feat(allwinner): add SMCCC SOCID support

The Allwinner SID device holds a 16-bit SoC identifier, which we already
use in our code.

Export this number through the generic SMCCC SOCID interface, to a

feat(allwinner): add SMCCC SOCID support

The Allwinner SID device holds a 16-bit SoC identifier, which we already
use in our code.

Export this number through the generic SMCCC SOCID interface, to allow
an architectural identification of an Allwinner SoC. This enables access
to this information from non-secure world, simplifies generic drivers
(ACPI comes to mind), and gives easy and precise access to the SoC ID
from userland in OSes like Linux.

Change-Id: I91753046b2ae5408ca7bc0b864fcd97d24c8267c
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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3e0a087f04-May-2022 André Przywara <andre.przywara@arm.com>

Merge changes from topic "allwinner-idle" into integration

* changes:
feat(allwinner): provide CPU idle states to the rich OS
feat(allwinner): simplify CPU_SUSPEND power state encoding
feat(al

Merge changes from topic "allwinner-idle" into integration

* changes:
feat(allwinner): provide CPU idle states to the rich OS
feat(allwinner): simplify CPU_SUSPEND power state encoding
feat(allwinner): choose PSCI states to avoid translation
feat(fdt): add the ability to supply idle state information
fix(allwinner): improve DTB patching error handling
refactor(allwinner): patch the DTB after setting up PSCI
refactor(allwinner): move DTB change code into allwinner/common

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1ced6cad03-May-2022 Lauren Wehrmeister <lauren.wehrmeister@arm.com>

Merge changes from topic "refactor-hw-config-load" into integration

* changes:
docs(fvp): update loading addresses of HW_CONFIG
docs(fconf): update device tree binding for FCONF
feat(fvp): upd

Merge changes from topic "refactor-hw-config-load" into integration

* changes:
docs(fvp): update loading addresses of HW_CONFIG
docs(fconf): update device tree binding for FCONF
feat(fvp): update HW_CONFIG DT loading mechanism
refactor(st): update set_config_info function call
refactor(fvp_r): update set_config_info function call
refactor(arm): update set_config_info function call
feat(fconf): add NS load address in configuration DTB nodes

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7cb76fdf03-May-2022 Sandrine Bailleux <sandrine.bailleux@arm.com>

docs(maintainers): update measured boot code owners

Propose myself as a code owner of the measured boot module.

Also do a couple of updates along the way:

- Add the measured boot bindings documen

docs(maintainers): update measured boot code owners

Propose myself as a code owner of the measured boot module.

Also do a couple of updates along the way:

- Add the measured boot bindings document to the list of measured
boot files.

- Fix the list of FVP files. plat/arm/board/fvp/fvp_measured_boot.c
does not exist anymore. It has been replaced by
plat/arm/board/fvp/fvp_measured_{bl1,bl2,common}_boot.c files.

Change-Id: Ifb34f4f7c704b1db966b44428bbffd48c5e3c42b
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

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9a13b07f03-May-2022 Sandrine Bailleux <sandrine.bailleux@arm.com>

build(commitlint): make the scope optional

In all TF-A commit messages, the first line must comply to the
following format:

type(scope): description

Although the conventional commits specificati

build(commitlint): make the scope optional

In all TF-A commit messages, the first line must comply to the
following format:

type(scope): description

Although the conventional commits specification says that the scope
above is optional, we have made it mandatory in TF-A and the following
error message is printed if no scope is provided:

scope may not be empty [scope-empty]

However, this can be too restrictive for some types of commits. For
example, it is typically hard to choose a scope for documentation
patches which modify several documents of different natures.

Lift this restriction in the tools and leave it up to the developer to
decide whether a scope is needed or not.

Change-Id: I9d35e7790fc3fa74651794216fe8db265ad09982
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

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0d9133d402-May-2022 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge "feat(xilinx): add SPP/EMU platform support for versal" into integration

be73459a13-Apr-2022 Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>

feat(xilinx): add SPP/EMU platform support for versal

This patch adds SPP/EMU platform support for Xilinx Versal and
also updating the documentation.

Signed-off-by: Venkatesh Yadav Abbarapu <venkat

feat(xilinx): add SPP/EMU platform support for versal

This patch adds SPP/EMU platform support for Xilinx Versal and
also updating the documentation.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: Ibdadec4d00cd33ea32332299e7a00de31dc9d60b

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52ed157f19-Mar-2022 Sieu Mun Tang <sieu.mun.tang@intel.com>

fix(intel): reject non 4-byte align request size for FPGA Crypto Service (FCS)

This patch is to add size checking to make sure that
each certificate and encryption/decryption request
are 4-byte alig

fix(intel): reject non 4-byte align request size for FPGA Crypto Service (FCS)

This patch is to add size checking to make sure that
each certificate and encryption/decryption request
are 4-byte align as this driver is expecting. Unaligned
size may indicate invalid/corrupted request hence will
be rejected.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ib6f97849ec470e45679c5adc4fbfa3afd10eda90

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894c635b29-Apr-2022 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge changes I47014d72,Ibf00c386 into integration

* changes:
docs(bl31): aarch64: RESET_TO_BL31_WITH_PARAMS
feat(bl31): aarch64: RESET_TO_BL31_WITH_PARAMS

ac4ac38c15-Apr-2022 Jorge Ramirez-Ortiz <jorge@foundries.io>

docs(bl31): aarch64: RESET_TO_BL31_WITH_PARAMS

Document the RESET_TO_BL31 with parameters feature.

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Change-Id: I47014d724f2eb822b69a112c3acee5

docs(bl31): aarch64: RESET_TO_BL31_WITH_PARAMS

Document the RESET_TO_BL31 with parameters feature.

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Change-Id: I47014d724f2eb822b69a112c3acee546fbfe82d5

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25844ff715-Apr-2022 Jorge Ramirez-Ortiz <jorge@foundries.io>

feat(bl31): aarch64: RESET_TO_BL31_WITH_PARAMS

It is not always the case that RESET_TO_BL31 enabled platforms don't
execute a bootloader before BL31.

For those use cases, being able to receive argu

feat(bl31): aarch64: RESET_TO_BL31_WITH_PARAMS

It is not always the case that RESET_TO_BL31 enabled platforms don't
execute a bootloader before BL31.

For those use cases, being able to receive arguments from that first
loader (i.e: a DTB with TPM logs) might be necessary feature.

This code has been validated on iMX8mm.

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Change-Id: Ibf00c3867cb1d1012b8b376e64ccaeca1c9d2bff

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a0cad7ce29-Apr-2022 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge "fix(zynqmp): update the log message to verbose" into integration

10f7bd5029-Apr-2022 Bipin Ravi <bipin.ravi@arm.com>

Merge "fix(security): update Cortex-A15 CPU lib files for CVE-2022-23960" into integration

145f665e29-Apr-2022 Manish Pandey <manish.pandey2@arm.com>

Merge "docs(fvp): specify correct reference of the hw_config address" into integration

a5d3657423-Feb-2022 Harrison Mutai <harrison.mutai@arm.com>

docs(prerequisites): use LLVM utilities to build with clang

Makefile updated to use LLVM utilities instead of GNU utilities when
compiling with clang. `CROSS_COMPILE` is not required since this
depe

docs(prerequisites): use LLVM utilities to build with clang

Makefile updated to use LLVM utilities instead of GNU utilities when
compiling with clang. `CROSS_COMPILE` is not required since this
dependency has been removed.

Change-Id: I19706b84b9310e07935516681b86596c04ef8ad6
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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