feat(imx8mn): enable Trusty OS for imx8mn

Add trusty support for imx8mn, default load address and
size of trusty are 0xbe000000 and 0x2000000.

Signed-off-by: Ji Luo <ji.luo@nxp.com>
Signed-off-by:

feat(imx8mn): enable Trusty OS for imx8mn

Add trusty support for imx8mn, default load address and
size of trusty are 0xbe000000 and 0x2000000.

Signed-off-by: Ji Luo <ji.luo@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I63fd5159027d7400b8c6bfc03193dd1330c43140

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feat(imx8mm): enable Trusty OS on imx8mm

Add trusty support for imx8mm, default load address
and size of trusty are 0xbe000000 anx 0x2000000.

Signed-off-by: Ji Luo <ji.luo@nxp.com>
Signed-off-by: J

feat(imx8mm): enable Trusty OS on imx8mm

Add trusty support for imx8mm, default load address
and size of trusty are 0xbe000000 anx 0x2000000.

Signed-off-by: Ji Luo <ji.luo@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I3f8b1adc08933e38a39f1ab1723947319d19a703

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feat(imx8/imx8m): switch to xlat_tables_v2

spd trusty requires memory dynamic mapping feature to be
enabled, so we have to use xlat table library v2 instead
of v1.

Signed-off-by: Ji Luo <ji.luo@nxp

feat(imx8/imx8m): switch to xlat_tables_v2

spd trusty requires memory dynamic mapping feature to be
enabled, so we have to use xlat table library v2 instead
of v1.

Signed-off-by: Ji Luo <ji.luo@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I2813af9c7878b1fc2a59e27619c5b643af6a1e91

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feat(imx8m): enable the coram_s tz by default on imx8mn/mp

Enable the OCRAM_S TZ for secure protection by default on
i.MX8MN/i.MX8MP. And lock the ocram secure access configure
on i.MX8MM/i.MX8MP.

feat(imx8m): enable the coram_s tz by default on imx8mn/mp

Enable the OCRAM_S TZ for secure protection by default on
i.MX8MN/i.MX8MP. And lock the ocram secure access configure
on i.MX8MM/i.MX8MP.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I2e24f4b823ee5f804415218d5c2e371f4e4c6fe1

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feat(imx8m): enable the csu init on imx8m

Enable the CSU init on i.MX8M SoC family. The 'csu_cfg' array
is just a placeholder for now as example with limited config listed.
In real use case,user can

feat(imx8m): enable the csu init on imx8m

Enable the CSU init on i.MX8M SoC family. The 'csu_cfg' array
is just a placeholder for now as example with limited config listed.
In real use case,user can add the CSU config as needed based on system design.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I1f7999efa346f18f6625ed8c478d088ed75f7833

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feat(imx8m): add a simple csu driver for imx8m family

Add a simple CSU driver for i.MX8M family.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I0eda3561e7a38a232acdb8e043c7200c630f7e22

refactor(imx8m): replace magic number with enum type

Replace those RDC config related magic numbers with enum type

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I6245ccfa74d079179dc0f20598

refactor(imx8m): replace magic number with enum type

Replace those RDC config related magic numbers with enum type

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I6245ccfa74d079179dc0f205980c2daf5c7af786

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feat(imx8m): add imx csu/rdc enum type defines for imx8m

Add various enum type defines for CSU & RDC module for i.MX8M
family

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I70c050286919eab

feat(imx8m): add imx csu/rdc enum type defines for imx8m

Add various enum type defines for CSU & RDC module for i.MX8M
family

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I70c050286919eab51c6c553912bd4be57bc60f81

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fix(imx8m): check the validation of domain id

check the domain id to make sure it is in the valid range
to make sure no out of range access to the array.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>

fix(imx8m): check the validation of domain id

check the domain id to make sure it is in the valid range
to make sure no out of range access to the array.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: Iccd7298eea390b6e68156bb356226839a23417ea

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feat(imx8m): enable conditional build for SDEI

SDEI support on imx8m is an optional feature, so
make it conditional build, not enabled by default.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change

feat(imx8m): enable conditional build for SDEI

SDEI support on imx8m is an optional feature, so
make it conditional build, not enabled by default.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I6e7e8d77959ea352bc019f8468793992ec7ecfc4

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Merge "feat(intel): add SMPLSEL and DRVSEL setup for Stratix 10 MMC" into integration

Merge "feat(intel): implement timer init divider via cpu frequency. (#1)" into integration

Merge "docs(maintainers): add new owners for Trusty SPD" into integration

feat(plat/imx8m): do not release JR0 to NS if HAB is using it

In case JR0 is used by the HAB for secure boot, it can be used later
for authenticating kernel or other binaries.

We are checking if th

feat(plat/imx8m): do not release JR0 to NS if HAB is using it

In case JR0 is used by the HAB for secure boot, it can be used later
for authenticating kernel or other binaries.

We are checking if the HAB is using the JR by the DID set.

Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I6e9595012262ffabfc3f3d4841f446f34e48e059

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docs(maintainers): add new owners for Trusty SPD

Split TLK/Trusty SPD into two separate components and add additional
owners for Trusty SPD.

Signed-off-by: Marco Nelissen <marcone@google.com>
Chang

docs(maintainers): add new owners for Trusty SPD

Split TLK/Trusty SPD into two separate components and add additional
owners for Trusty SPD.

Signed-off-by: Marco Nelissen <marcone@google.com>
Change-Id: Ifabd1bb630fe4976e304fa29eac1c516ec6e2e18

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Merge changes Iaf21883b,I523c5d57,I57164923 into integration

* changes:
fix(ufs): read and write attribute based on spec
fix(ufs): disables controller if enabled
refactor(ufs): adds a function

Merge changes Iaf21883b,I523c5d57,I57164923 into integration

* changes:
fix(ufs): read and write attribute based on spec
fix(ufs): disables controller if enabled
refactor(ufs): adds a function for fdeviceinit

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feat(intel): implement timer init divider via cpu frequency. (#1)

Get cpu frequency and update the timer init div with it.
The timer is vary based on the cpu frequency instead of hardcoded.
The impl

feat(intel): implement timer init divider via cpu frequency. (#1)

Get cpu frequency and update the timer init div with it.
The timer is vary based on the cpu frequency instead of hardcoded.
The implementation shall apply to only Agilex and S10

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I61684d9762ad34e5a60b8b176b60c8848db4b422

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Merge "fix(st): fix NULL pointer dereference issues" into integration

Merge changes from topic "ffa_el3_spmc" into integration

* changes:
feat(spmc): enable checking of execution ctx count
feat(spmc): enable parsing of UUID from SP Manifest
feat(spmc): add parti

Merge changes from topic "ffa_el3_spmc" into integration

* changes:
feat(spmc): enable checking of execution ctx count
feat(spmc): enable parsing of UUID from SP Manifest
feat(spmc): add partition mailbox structs
feat(plat/arm): allow BL32 specific defines to be used by SPMC_AT_EL3
feat(plat/fvp): add EL3 SPMC #defines
test(plat/fvp/lsp): add example logical partition
feat(spmc/lsp): add logical partition framework

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fix(st): add missing header include

This issue is triggered when enabling -Wmissing-prototypes:
plat/st/common/bl2_io_storage.c:114:5: warning: no previous prototype
for 'open_fip' [-Wmissing-proto

fix(st): add missing header include

This issue is triggered when enabling -Wmissing-prototypes:
plat/st/common/bl2_io_storage.c:114:5: warning: no previous prototype
for 'open_fip' [-Wmissing-prototypes]
114 | int open_fip(const uintptr_t spec)
| ^~~~~~~~
plat/st/common/bl2_io_storage.c:119:5: warning: no previous prototype
for 'open_storage' [-Wmissing-prototypes]
119 | int open_storage(const uintptr_t spec)
| ^~~~~~~~~~~~

Add missing stm32mp_io_storage.h header include, where those functions
prototypes are defined.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I2af69fadfc4780553f41b338cd93b731210672a6

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Merge changes from topic "xlnx_zynqmp_misra" into integration

* changes:
fix(zynqmp): resolve misra R14.4 warnings
fix(zynqmp): resolve misra R16.3 warnings
fix(zynqmp): resolve misra R15.7 wa

Merge changes from topic "xlnx_zynqmp_misra" into integration

* changes:
fix(zynqmp): resolve misra R14.4 warnings
fix(zynqmp): resolve misra R16.3 warnings
fix(zynqmp): resolve misra R15.7 warnings
fix(zynqmp): resolve misra R15.6 warnings
fix(zynqmp): resolve misra 7.2 warnings
fix(zynqmp): resolve misra R10.3

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Merge "feat(brbe): add BRBE support for NS world" into integration

Merge changes from topic "ja/boot_protocol" into integration

* changes:
fix(sptool): update Optee FF-A manifest
feat(sptool): delete c version of the sptool
feat(sptool): use python version of

Merge changes from topic "ja/boot_protocol" into integration

* changes:
fix(sptool): update Optee FF-A manifest
feat(sptool): delete c version of the sptool
feat(sptool): use python version of sptool
feat(sptool): python version of the sptool
refactor(sptool): use SpSetupActions in sp_mk_generator.py
feat(sptool): add python SpSetupActions framework

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fix(zynqmp): define and enable ARM_XLAT_TABLES_LIB_V1

Enable ARM_XLAT_TABLES_LIB_V1 as ZynqMP is using
v1 library of translation tables.

With upstream patch d323af9e3d903d981b42f954844a95a6bfef91ab

fix(zynqmp): define and enable ARM_XLAT_TABLES_LIB_V1

Enable ARM_XLAT_TABLES_LIB_V1 as ZynqMP is using
v1 library of translation tables.

With upstream patch d323af9e3d903d981b42f954844a95a6bfef91ab,
the usage of MAP_REGION_FLAT is referring to definition in file
include/lib/xlat_tables/xlat_tables_v2.h but while preparing
xlat tables in lib/xlat_tables/xlat_tables_common.c it is referring
to include/lib/xlat_tables/xlat_tables.h which is v1 xlat tables.
Also, ZynqMP was using v1 so defined ARM_XLAT_TABLES_LIB_V1 to
use v1 xlat tables everywhere.
This fixes the issue of xlat tables failures as it takes v2
library mmap_region structure in some files and v1 in other
files.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: Ibc0e1c536e19f4edd6a6315bf1b0dfcec33e2fdc

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fix(st): fix NULL pointer dereference issues

The get_bl_mem_params_node() function could return NULL. Add asserts to
check the return value is not NULL.
This corrects coverity issues:
pager_mem_par

fix(st): fix NULL pointer dereference issues

The get_bl_mem_params_node() function could return NULL. Add asserts to
check the return value is not NULL.
This corrects coverity issues:
pager_mem_params = get_bl_mem_params_node(BL32_EXTRA1_IMAGE_ID);
>>> CID 378360: (NULL_RETURNS)
>>> Dereferencing "pager_mem_params", which is known to be "NULL".

paged_mem_params = get_bl_mem_params_node(BL32_EXTRA2_IMAGE_ID);
>>> CID 378360: (NULL_RETURNS)
>>> Dereferencing "paged_mem_params", which is known to be "NULL".

tos_fw_mem_params = get_bl_mem_params_node(TOS_FW_CONFIG_ID);
>>> CID 378360: (NULL_RETURNS)
>>> Dereferencing "tos_fw_mem_params", which is known to be "NULL".


Do the same for other occurrences of get_bl_mem_params_node() return not
checked, in the functions plat_get_bl_image_load_info() and
bl2_plat_handle_pre_image_load().

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I79165b1628fcee3da330f2db4ee5e1dafcb1b21f

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