History log of /rk3399_ARM-atf/ (Results 7601 – 7625 of 18314)
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9293278c17-May-2022 Sandrine Bailleux <sandrine.bailleux@arm.com>

docs(maintainers): remove Jimmy Brisson from code owners

Jimmy Brisson is no longer part of the TF-A core team at Arm.

Change-Id: I2966c513a0c2cda438a05dedd42149d16190cbf6
Signed-off-by: Sandrine B

docs(maintainers): remove Jimmy Brisson from code owners

Jimmy Brisson is no longer part of the TF-A core team at Arm.

Change-Id: I2966c513a0c2cda438a05dedd42149d16190cbf6
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

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1b7c82ca13-May-2022 Sandrine Bailleux <sandrine.bailleux@arm.com>

docs(threat-model): remove some redundant text in threat #08

The threat description was repeating the threat title.

Change-Id: I67de2c0aab6e86bf33eb91e7562e075fcb76259b
Signed-off-by: Sandrine Bail

docs(threat-model): remove some redundant text in threat #08

The threat description was repeating the threat title.

Change-Id: I67de2c0aab6e86bf33eb91e7562e075fcb76259b
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

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50075fdc10-May-2022 Sandrine Bailleux <sandrine.bailleux@arm.com>

build(changelog): add new scope for the threat model

Change-Id: I884f31f7f4b5515c420839ff37d401faa69f5fff
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

3d6cc21012-May-2022 Sandrine Bailleux <sandrine.bailleux@arm.com>

docs(threat-model): revamp threat #9

Reword the description of threat #9 to make it more future-proof for
Arm CCA. By avoiding specific references to secure or non-secure
contexts, in favour of "wor

docs(threat-model): revamp threat #9

Reword the description of threat #9 to make it more future-proof for
Arm CCA. By avoiding specific references to secure or non-secure
contexts, in favour of "worlds" and "security contexts", we make the
description equally applicable to 2-world and 4-world architectures.

Note that there are other threats that would benefit from such a
similar revamp but this is out of scope of this patch.

Also list malicious secure world code as a potential threat
agent. This seems to be an oversight in the first version of the
threat model (i.e. this change is not related to Arm CCA).

Change-Id: Id8c8424b0a801104c4f3dc70e344ee702d2b259a
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

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4365b30c12-May-2022 Sandrine Bailleux <sandrine.bailleux@arm.com>

docs(threat-model): make experimental features out of scope

By nature, experimental features are incomplete pieces of work,
sometimes going under rapid change. Typically, the threat model
implicatio

docs(threat-model): make experimental features out of scope

By nature, experimental features are incomplete pieces of work,
sometimes going under rapid change. Typically, the threat model
implications have not been fully considered yet.

Change-Id: Ice8d4273a789558e912f82cde592da4747b37fdf
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

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f10dd3e010-May-2022 Sandrine Bailleux <sandrine.bailleux@arm.com>

docs(threat-model): cosmetic changes

- Add empty lines after titles.

- Reduce number of highlighting characters to fit title length.

- Remove most ``monospaced text``.
I think most of it loo

docs(threat-model): cosmetic changes

- Add empty lines after titles.

- Reduce number of highlighting characters to fit title length.

- Remove most ``monospaced text``.
I think most of it looked weird in the rendered HTML version and
it had no obvious meaning.

Change-Id: I5f746a3de035d8ac59eec0af491c187bfe86dad7
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

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944e7ea916-May-2022 Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>

fix(zynqmp): resolve misra 8.3 warnings

MISRA Violation: MISRA-C:2012 R.8.3
- Declaration uses a different parameter name than the one present in the
definition.

Signed-off-by: Venkatesh Yadav Abba

fix(zynqmp): resolve misra 8.3 warnings

MISRA Violation: MISRA-C:2012 R.8.3
- Declaration uses a different parameter name than the one present in the
definition.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: Id0521afd7383df13870710b7dd2894e788896e5e

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420c400a16-May-2022 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge changes I2fcf13b7,I153ccb43 into integration

* changes:
feat(n1sdp): add support for nt_fw_config
feat(n1sdp): enable trusted board boot on n1sdp

9bc52d3302-Mar-2022 Juan Pablo Conde <juanpablo.conde@arm.com>

refactor(security): upgrade tools to OpenSSL 3.0

Host tools cert_tool and encrypt_fw refactored to be fully
compatible with OpenSSL v3.0.

Changes were made following the OpenSSL 3.0 migration guide

refactor(security): upgrade tools to OpenSSL 3.0

Host tools cert_tool and encrypt_fw refactored to be fully
compatible with OpenSSL v3.0.

Changes were made following the OpenSSL 3.0 migration guide:
https://www.openssl.org/docs/man3.0/man7/migration_guide.html
In some cases, those changes are straightforward and only
a small modification on the types or API calls was needed
(e.g.: replacing BN_pseudo_rand() with BN_rand(). Both identical
since v1.1.0).
The use of low level APIs is now deprecated. In some cases,
the new API provides a simplified solution for our goals and
therefore the code was simplified accordingly (e.g.: generating
RSA keys through EVP_RSA_gen() without the need of handling the
exponent). However, in some cases, a more
sophisticated approach was necessary, as the use of a context
object was required (e.g.: when retrieving the digest value from
an SHA file).

Signed-off-by: Juan Pablo Conde <juanpablo.conde@arm.com>
Change-Id: I978e8578fe7ab3e71307450ebe7e7812fbcaedb6

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610eeac816-May-2022 Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>

fix(zynqmp): resolve misra R8.4 warnings

MISRA Violation: MISRA-C:2012 R.8.4
- Function definition does not have a visible prototype.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xil

fix(zynqmp): resolve misra R8.4 warnings

MISRA Violation: MISRA-C:2012 R.8.4
- Function definition does not have a visible prototype.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I50a2c1adf2e099217770ac665f135302f990b162

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b1470ccc16-May-2022 Olivier Deprez <olivier.deprez@arm.com>

Merge changes from topic "ffa_el3_spmc" into integration

* changes:
feat(spmd): allow forwarding of FFA_FRAG_RX/TX calls
feat(spmc): add support for FFA_SPM_ID_GET
feat(spmc): add support for

Merge changes from topic "ffa_el3_spmc" into integration

* changes:
feat(spmd): allow forwarding of FFA_FRAG_RX/TX calls
feat(spmc): add support for FFA_SPM_ID_GET
feat(spmc): add support for forwarding a secure interrupt to the SP
feat(spmc): add support for FF-A power mgmt. messages in the EL3 SPMC

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c8113bf716-May-2022 Olivier Deprez <olivier.deprez@arm.com>

Merge changes from topic "ffa_el3_spmc" into integration

* changes:
feat(spmc): enable the SPMC to pass the linear core ID in a register
feat(spmc): add FFA_RX_RELEASE handler
feat(spmc): add

Merge changes from topic "ffa_el3_spmc" into integration

* changes:
feat(spmc): enable the SPMC to pass the linear core ID in a register
feat(spmc): add FFA_RX_RELEASE handler
feat(spmc): add FFA_RUN handler
feat(spmc): support FFA_ID_GET ABI
feat(spmc): add FFA_FEATURES handler
feat(spmc): add FFA_PARTITION_INFO_GET handler
feat(spmc): enable handling FF-A RX/TX Mapping ABIs
docs(maintainers): introduce SPMC maintainer section

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cad90b5612-May-2022 Etienne Carriere <etienne.carriere@linaro.org>

fix(scmi-msg): base: fix protocol list querying

Corrects the function reporting the SCMI protocols supported by the
platform to not assume 8 protocol IDs at most can be returned. Indeed
the number o

fix(scmi-msg): base: fix protocol list querying

Corrects the function reporting the SCMI protocols supported by the
platform to not assume 8 protocol IDs at most can be returned. Indeed
the number of protocol IDs returned depends on the SCMI output buffer
size.

Change-Id: Idafbe02d2b25b3bcacaf25977c560c0ac5bb8d62
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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d323f0cf12-May-2022 Etienne Carriere <etienne.carriere@linaro.org>

fix(scmi-msg): base: fix protocol list response size

Corrects the size of the SCMI response payload when querying the list
of the supported protocol. This response payload size depends on the
number

fix(scmi-msg): base: fix protocol list response size

Corrects the size of the SCMI response payload when querying the list
of the supported protocol. This response payload size depends on the
number of protocols enumerated by the response.

Change-Id: Ib01eb5cec6c6656dfd7d88ccdd5a720c1deee7a3
Reported-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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642db98423-Sep-2021 Marc Bonnici <marc.bonnici@arm.com>

feat(spmd): allow forwarding of FFA_FRAG_RX/TX calls

Enable the SPMD to forward FFA_FRAG_RX/TX calls between
the normal world and the SPMC.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change

feat(spmd): allow forwarding of FFA_FRAG_RX/TX calls

Enable the SPMD to forward FFA_FRAG_RX/TX calls between
the normal world and the SPMC.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I097a48552827a8527dd3efe1155bc601d7cbf887

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46872e0125-Nov-2021 Marc Bonnici <marc.bonnici@arm.com>

feat(spmc): add support for FFA_SPM_ID_GET

Enable a Secure Partition to query the ID assigned to the SPMC.
The SPMD will take care of any calls from the normal world
therefore we should not need to

feat(spmc): add support for FFA_SPM_ID_GET

Enable a Secure Partition to query the ID assigned to the SPMC.
The SPMD will take care of any calls from the normal world
therefore we should not need to handle this case in the SPMC.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I97903e920e928df385addbb2d383f24e602bf2db

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a921da5e13-May-2022 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge changes If2408af3,If485ff27 into integration

* changes:
feat(versal): add SMCCC call TF_A_PM_REGISTER_SGI
feat(versal): add support to reset SGI

729d779304-Oct-2021 Achin Gupta <achin.gupta@arm.com>

feat(spmc): add support for forwarding a secure interrupt to the SP

This patch adds support for forwarding a secure interrupt that
preempts the normal world to a SP for top-half interrupt handling.

feat(spmc): add support for forwarding a secure interrupt to the SP

This patch adds support for forwarding a secure interrupt that
preempts the normal world to a SP for top-half interrupt handling.

Signed-off-by: Achin Gupta <achin.gupta@arm.com>
Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: Iaa6e96f4cf8922ba5b6d128a19359df15e44158d

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0dc2b51613-May-2022 Olivier Deprez <olivier.deprez@arm.com>

Merge changes from topic "ns/save_fpregs_context" into integration

* changes:
feat(sgi): enable fpregs context save and restore
feat(spm_mm): add support to save and restore fp regs

f014300415-Dec-2021 Marc Bonnici <marc.bonnici@arm.com>

feat(spmc): enable the SPMC to pass the linear core ID in a register

Add TF-A implementation defined behaviour to provide the linear core
ID in the x4 register when bringing up an SP.

Signed-off-by

feat(spmc): enable the SPMC to pass the linear core ID in a register

Add TF-A implementation defined behaviour to provide the linear core
ID in the x4 register when bringing up an SP.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I6cb215841097b264d252ec0262b0b7272be99d41

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59bd2ad812-Apr-2022 Marc Bonnici <marc.bonnici@arm.com>

feat(spmc): add support for FF-A power mgmt. messages in the EL3 SPMC

This patch adds support for forwarding the following PSCI messages
received by the SPMC at EL3 to the S-EL1 SP if the SP has ind

feat(spmc): add support for FF-A power mgmt. messages in the EL3 SPMC

This patch adds support for forwarding the following PSCI messages
received by the SPMC at EL3 to the S-EL1 SP if the SP has indicated
that it wishes to receive the appropriate message via its manifest.

1. A PSCI CPU_OFF message in response to a cpu hot unplug request
from the OS.
2. A message to indicate warm boot of a cpu in response to a cpu
hot plug request from the OS.
3. A PSCI CPU_SUSPEND message in response to a cpu idle event
initiated from the OS.
4. A message to indicate warm boot of a cpu from a shallow power
state in response to a cpu resume power event.

This patch also implements the FFA_SECONDARY_EP_REGISTER function to
enable the SP specify its secondary entrypoint.

Signed-off-by: Achin Gupta <achin.gupta@arm.com>
Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I375d0655b2c6fc27445facc39213d1d0678557f4

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f0c25a0812-Apr-2022 Marc Bonnici <marc.bonnici@arm.com>

feat(spmc): add FFA_RX_RELEASE handler

Enable a partition to release its RX buffer and the SPMC
to update the appropriate state tracking.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-I

feat(spmc): add FFA_RX_RELEASE handler

Enable a partition to release its RX buffer and the SPMC
to update the appropriate state tracking.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I5fb6d92244b5ed5f032269b29b102aa874bf3ae3

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aad20c8531-Aug-2021 Marc Bonnici <marc.bonnici@arm.com>

feat(spmc): add FFA_RUN handler

Enable the SPMC to handle the FFA_RUN ABI and update
the state tracking accordingly.

Change-Id: I3e8a3fa3ec9b03830055d2fbd6124b8ff1ed4103
Signed-off-by: Marc Bonnici

feat(spmc): add FFA_RUN handler

Enable the SPMC to handle the FFA_RUN ABI and update
the state tracking accordingly.

Change-Id: I3e8a3fa3ec9b03830055d2fbd6124b8ff1ed4103
Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>

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d5fe923524-Nov-2021 Marc Bonnici <marc.bonnici@arm.com>

feat(spmc): support FFA_ID_GET ABI

Allow for a partition to retrieve its own partition ID.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I1a19ac30b86736d818673c239b2f8fd2d6128c06

55a2963813-Dec-2021 Marc Bonnici <marc.bonnici@arm.com>

feat(spmc): add FFA_FEATURES handler

Enable the spmc to report the features that it currently supports.
Populated with the currently implemented functionality.

Signed-off-by: Marc Bonnici <marc.bon

feat(spmc): add FFA_FEATURES handler

Enable the spmc to report the features that it currently supports.
Populated with the currently implemented functionality.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I00e51ded284efd87cd50a0e9416dbc33f22ced85

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