History log of /rk3399_ARM-atf/ (Results 7051 – 7075 of 18314)
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a291687d29-Sep-2022 Joanna Farley <joanna.farley@arm.com>

Merge "fix(zynqmp): resolve misra 4.6 warnings" into integration

3d30955628-Sep-2022 Anand Saminathan <anans@google.com>

fix(ufs): retry commands on unit attention

Unit Attention Condition (UAC) gets set on a warm reset. Sending any
command (other than INQUIRY and REPORT LUNs) clears UAC, so its good to
add some retri

fix(ufs): retry commands on unit attention

Unit Attention Condition (UAC) gets set on a warm reset. Sending any
command (other than INQUIRY and REPORT LUNs) clears UAC, so its good to
add some retries when UAC is encountered

Signed-off-by: Anand Saminathan <anans@google.com>
Change-Id: Ia03b916d68565d0f3d25086b7f6d8c51d557b64f

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711ce52b29-Sep-2022 Sandrine Bailleux <sandrine.bailleux@arm.com>

Merge "feat(rss): add new comms protocols" into integration

00e8f79c27-Sep-2022 Manish Pandey <manish.pandey2@arm.com>

fix(ras): trap "RAS error record" accesses only for NS

RAS_TRAP_LOWER_EL_ERR_ACCESS was used to prevent access to RAS error
record registers (RAS ERR* & RAS ERX*) from lower EL's in any security
sta

fix(ras): trap "RAS error record" accesses only for NS

RAS_TRAP_LOWER_EL_ERR_ACCESS was used to prevent access to RAS error
record registers (RAS ERR* & RAS ERX*) from lower EL's in any security
state. To give more fine grain control per world basis re-purpose this
macro to RAS_TRAP_NS_ERR_REC_ACCESS, which will enable the trap only
if Error record registers are accessed from NS.
This will also help in future scenarios when RAS handling(in Firmware
first handling paradigm)can be offloaded to a secure partition.

This is first patch in series to refactor RAS framework in TF-A.

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: Ifa7f60bc8c82c9960adf029001bc36c443016d5d

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3a3722c928-Sep-2022 Manish Pandey <manish.pandey2@arm.com>

Merge "fix(tc): resolve the static-checks errors" into integration

8e51ccca23-Sep-2022 AlexeiFedorov <Alexei.Fedorov@arm.com>

fix(rmmd): return X4 output value

Return values contained in 'smc_result' structure
are shifted down by one register:
X1 written by RMM is returned to NS in X0 and
X5 is returned in X4.

Signed-off-

fix(rmmd): return X4 output value

Return values contained in 'smc_result' structure
are shifted down by one register:
X1 written by RMM is returned to NS in X0 and
X5 is returned in X4.

Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>
Change-Id: I92907ac3ff3bac8554643ae7c198a4a758c38cb3

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066450ab28-Sep-2022 Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>

fix(tc): resolve the static-checks errors

Converted the space indentation to tabs to fix the
errors listed under tf-static-checks CI job.

Change-Id: Ie911a5befd0eeaa5a2019245cc3c43ad375cd068
Signed

fix(tc): resolve the static-checks errors

Converted the space indentation to tabs to fix the
errors listed under tf-static-checks CI job.

Change-Id: Ie911a5befd0eeaa5a2019245cc3c43ad375cd068
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>

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3125901915-Jun-2022 Raef Coles <raef.coles@arm.com>

feat(rss): add new comms protocols

The current comms protocol (where arguments and return data is embedded
into the MHU message) is now protocol v0. Protocol v1 embeds pointers
into the message, and

feat(rss): add new comms protocols

The current comms protocol (where arguments and return data is embedded
into the MHU message) is now protocol v0. Protocol v1 embeds pointers
into the message, and has the RSS retrieve the data via DMA.

Change-Id: I08d7f09c4eaea673769fde9eee194447a99f1b78
Signed-off-by: Raef Coles <raef.coles@arm.com>

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7c49438826-Sep-2022 Manish V Badarkhe <Manish.Badarkhe@arm.com>

fix(semihosting): fix seek call failure check

The code checks that the semihosting seek call return value is not
zero instead of a negative value when there is an error condition.
This defect has be

fix(semihosting): fix seek call failure check

The code checks that the semihosting seek call return value is not
zero instead of a negative value when there is an error condition.
This defect has been fixed.

In [1], possible return values for semihosting seek calls are
mentioned.

[1]: https://github.com/ARM-software/abi-aa/blob/main/semihosting/
semihosting.rst#sys-seek-0x0a

Change-Id: I70f09e98323e9c5bf4eeda322ac065e855e256fc
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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18af644228-Sep-2022 Chunlei Xu <chunlei.xu@nxp.com>

feat(ls1043ardb): update ddr configure for ls1043ardb-pd

DDR4 Chip is EOL during redesign of ls1043ardb pd version. The replacement from MT is MT40A1G8SA-062E:R.
New ddr configure is compatible with

feat(ls1043ardb): update ddr configure for ls1043ardb-pd

DDR4 Chip is EOL during redesign of ls1043ardb pd version. The replacement from MT is MT40A1G8SA-062E:R.
New ddr configure is compatible with both pd and old version of ls1043ardb.

Signed-off-by: Chunlei Xu <chunlei.xu@nxp.com>
Change-Id: I714c091a2cf15046438d0723fb55a4410c386ef4

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c5862af728-Sep-2022 Jorge Troncoso <jatron@google.com>

chore(libc): clean up includes in lib/libc/printf.c

stddef.h is needed for the definition of size_t
stdio.h is needed for the declaration of putchar

Signed-off-by: Jorge Troncoso <jatron@google.com

chore(libc): clean up includes in lib/libc/printf.c

stddef.h is needed for the definition of size_t
stdio.h is needed for the declaration of putchar

Signed-off-by: Jorge Troncoso <jatron@google.com>
Change-Id: I72dac843dbbfc440cff0f9e9d13669b78a812abc

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58aebb6a27-Sep-2022 Joanna Farley <joanna.farley@arm.com>

Merge "fix(libc): pri*ptr macros for aarch64" into integration

0f2ab75f27-Sep-2022 Sandrine Bailleux <sandrine.bailleux@arm.com>

Merge "feat(tc): add RTC PL031 device tree node" into integration

14ec900a27-Sep-2022 Manish V Badarkhe <manish.badarkhe@arm.com>

Merge "docs(maintainers): add myself as TC code owner" into integration

8fecda3c21-Sep-2022 Anders Dellien <anders.dellien@arm.com>

docs(maintainers): add myself as TC code owner

Signed-off-by: Anders Dellien <anders.dellien@arm.com>
Change-Id: Ic67334bf1a979cb7b7355d0dcca7eb94752c4611

d307229d27-Jul-2022 K <kayo@illumium.org>

fix(libc): pri*ptr macros for aarch64

This fix solves problems with using PRI*PTR on aarch64 like so:
error: format '%x' expects argument of type 'unsigned int', but
argument 3 has type 'uintptr_t'

fix(libc): pri*ptr macros for aarch64

This fix solves problems with using PRI*PTR on aarch64 like so:
error: format '%x' expects argument of type 'unsigned int', but
argument 3 has type 'uintptr_t' {aka 'long unsigned int'}

Change-Id: I135d3e5cea5459f138b20331b5e9472e2e9e566c
Signed-off-by: K <kayo@illumium.org>

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cdb6211422-Sep-2022 HariBabu Gattem <haribabu.gattem@amd.com>

fix(zynqmp): resolve misra 4.6 warnings

MISRA Violation: MISRA-C:2012 R.4.6
- Using basic numerical type int rather than a typedef
that includes size and signedness information.

Signed-off-by: Hari

fix(zynqmp): resolve misra 4.6 warnings

MISRA Violation: MISRA-C:2012 R.4.6
- Using basic numerical type int rather than a typedef
that includes size and signedness information.

Signed-off-by: HariBabu Gattem <haribabu.gattem@amd.com>
Change-Id: I3779f7b6e074e33cb66ace3bef2117029badce1e

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d8d0ea9a26-Sep-2022 Sandrine Bailleux <sandrine.bailleux@arm.com>

Merge "docs(fwu): update firmware update design" into integration

2aaed86023-Sep-2022 Joanna Farley <joanna.farley@arm.com>

Merge "refactor(libc): clean up dependencies in libc" into integration

14a0704015-Oct-2021 Yann Gautier <yann.gautier@foss.st.com>

feat(stm32mp1): add early console in SP_min

Allow early console to be used at the beginning of SP_min, before
the clocks and UART have been reconfigured.

Signed-off-by: Yann Gautier <yann.gautier@f

feat(stm32mp1): add early console in SP_min

Allow early console to be used at the beginning of SP_min, before
the clocks and UART have been reconfigured.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I53d66938d42fcec830d9b81e5ef62b3790d0c3b3

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5223d88013-Sep-2022 Yann Gautier <yann.gautier@foss.st.com>

feat(st): properly manage early console

The new flag STM32MP_RECONFIGURE_CONSOLE is managed in platform.mk.
It is used in stm32mp_setup_early_console() when calling
plat_crash_console_init(). This c

feat(st): properly manage early console

The new flag STM32MP_RECONFIGURE_CONSOLE is managed in platform.mk.
It is used in stm32mp_setup_early_console() when calling
plat_crash_console_init(). This call is also under:
"#if defined(IMAGE_BL2)"
as this crash console init shouldn't be done by default in BL32.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Ib6b89db83d80095b662a2016e18ceb3fa8668435

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ea69dcdc13-Sep-2022 Yann Gautier <yann.gautier@foss.st.com>

feat(st-uart): manage STM32MP_RECONFIGURE_CONSOLE

If the flag STM32MP_RECONFIGURE_CONSOLE is set in BL32, the UART init
should be skipped if the UART clock is set to zero. This will be used
when con

feat(st-uart): manage STM32MP_RECONFIGURE_CONSOLE

If the flag STM32MP_RECONFIGURE_CONSOLE is set in BL32, the UART init
should be skipped if the UART clock is set to zero. This will be used
when configuring the default console, after an early console has been
configured.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Icbc640c7bdd6342f9c3ec1586a0d0c64127b18b8

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156709dd13-Sep-2022 Yann Gautier <yann.gautier@foss.st.com>

docs(st): introduce STM32MP_RECONFIGURE_CONSOLE

This flag will be used in BL32, to reconfigure UART parameters for
the early or crash console. By default, it is zero, as UART is
already configured i

docs(st): introduce STM32MP_RECONFIGURE_CONSOLE

This flag will be used in BL32, to reconfigure UART parameters for
the early or crash console. By default, it is zero, as UART is
already configured in BL2.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I7b28ff489479ab04a2fade027933524cdd36e959

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00606df009-Jun-2022 Yann Gautier <yann.gautier@foss.st.com>

feat(st): add trace for early console

When the early console is configured with STM32MP_EARLY_CONSOLE,
display a message indicating it is enabled.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.

feat(st): add trace for early console

When the early console is configured with STM32MP_EARLY_CONSOLE,
display a message indicating it is enabled.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Iafdfa5afef27eba823d707841853a8a46de0b42d

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484e846a07-Mar-2022 Yann Gautier <yann.gautier@foss.st.com>

fix(stm32mp1): enable crash console in FIQ handler

When a FIQ occurs and is trapped by SP_min, it is an unrecoverable
error. As kernel may have switched the UART console off, we should
re-enable it

fix(stm32mp1): enable crash console in FIQ handler

When a FIQ occurs and is trapped by SP_min, it is an unrecoverable
error. As kernel may have switched the UART console off, we should
re-enable it with plat_crash_console_init() for those failing states.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ib02e1271b6213f8e383a062b74494abf8826188f

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