Merge "fix(tc): fix c1_pro power down abandon" into integration

fix(tc): fix c1_pro power down abandon

Following merge of [1] and [2] the fix to power down abandon for Arm
C1-Pro core got lost. Restore it.

[1] https://review.trustedfirmware.org/c/TF-A/trusted-f

fix(tc): fix c1_pro power down abandon

Following merge of [1] and [2] the fix to power down abandon for Arm
C1-Pro core got lost. Restore it.

[1] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/43191
[2] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/42920

Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: I7da12e5ffc61248922adaf629eb52a5283993188

show more ...

fix(cm): deprecate use of NS_TIMER_SWITCH

On AArch64, secure world has it's own EL3 physical timer registers
accessible to secure EL1 in absence of S-EL2. With S-EL2 there is
virtualized view availa

fix(cm): deprecate use of NS_TIMER_SWITCH

On AArch64, secure world has it's own EL3 physical timer registers
accessible to secure EL1 in absence of S-EL2. With S-EL2 there is
virtualized view available for EL1 timer registers. So it is
unreasonable for secure world to use non-secure EL1 physical timer
registers. Moreover, the non-secure operating system (Linux in our case)
relies heavily on these EL1 physical timer registers for scheduling
decisions. If NS_TIMER_SWITCH is enabled, it simply breaks the preemption
model of the non-secure world by disabling non-secure timer interrupts
leading to RCU stalls being observed on long running secure world tasks.

The only arch timer register which will benefit from context management
is cntkctl_el1: Counter-timer Kernel Control Register. This enables the
secure and non-secure worlds to independently control accesses to EL0
for counter-timer registers. This is something that OP-TEE uses to
enable ftrace feature for Trusted Applications and SPM_MM uses for EL0
access as well.

Lets enable context management of cntkctl_el1 by default and deprecate
conditional context management of non-secure EL1 physical timer
registers for whom there isn't any upstream user. With that deprecate
this NS_TIMER_SWITCH build option which just adds confusion for the
platform maintainers. It will be eventually dropped following
deprecation policy of TF-A.

Reported-by: Stauffer Thomas MTANA <thomas.stauffer@mt.com>
Reported-by: Andrew Davis <afd@ti.com>
Change-Id: Ifb3a919dc0bf8c05c38895352de5fe94b4f4387e
Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>

show more ...

Merge "chore(versal2): rename versal2 to Versal Gen 2" into integration

Merge "feat(versal): add support to clear PM specific data" into integration

Merge "fix(versal-net): fix coverity violation prevent buffer overrun" into integration

Merge "chore(tc): align core names to Arm Lumex" into integration

chore(tc): align core names to Arm Lumex

Adopt core names aligned to Arm Lumex [1]

Nevis => C1-Nano
Gelas => C1-Pro
Travis => C1-Ultra
Alto => C1-Premium

C1-Pro TRM: https://developer.arm.com/docu

chore(tc): align core names to Arm Lumex

Adopt core names aligned to Arm Lumex [1]

Nevis => C1-Nano
Gelas => C1-Pro
Travis => C1-Ultra
Alto => C1-Premium

C1-Pro TRM: https://developer.arm.com/documentation/107771/0102/
C1-Ultra TRM: https://developer.arm.com/documentation/108014/0100/
C1-Premium TRM: https://developer.arm.com/documentation/109416/0100/
C1-Nano TRM: https://developer.arm.com/documentation/107753/0001/

[1]:
https://www.arm.com/product-filter?families=c1%20cpus
https://www.arm.com/products/mobile/compute-subsystems/lumex

Signed-off-by: Min Yao Ng <minyao.ng@arm.com>
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: Id4b487ef6a6fd1b00b75b09c5d06d81bce50a15d
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

show more ...

Merge changes from topic "ti-am62lxx-boot-notif" into integration

* changes:
feat(ti): am62lx init: boot notif and version msg
feat(ti): add support for boot notification msg
feat(ti): add mmu

Merge changes from topic "ti-am62lxx-boot-notif" into integration

* changes:
feat(ti): am62lx init: boot notif and version msg
feat(ti): add support for boot notification msg
feat(ti): add mmu regions for am62l soc
feat(ti): build generic timer

show more ...

Merge "feat(cpus): add pabandon support to Nevis" into integration

Merge changes from topic "xlnx_misra_fix_gen_common" into integration

* changes:
fix(bl31): add missing curly braces
fix(xilinx): match function type as its declared
fix(platforms): typedef op

Merge changes from topic "xlnx_misra_fix_gen_common" into integration

* changes:
fix(bl31): add missing curly braces
fix(xilinx): match function type as its declared
fix(platforms): typedef operands to match data type
fix(platforms): declare unused parameters as void
fix(platforms): add essential bool type
fix(platforms): fix misra violation 10.1

show more ...

feat(cpus): add pabandon support to Nevis

Nevis' TRM says that a powerdown attempt may be abandoned for a handful
of reasons. Add support for handling this.

It also says that if the SME2 engine is

feat(cpus): add pabandon support to Nevis

Nevis' TRM says that a powerdown attempt may be abandoned for a handful
of reasons. Add support for handling this.

It also says that if the SME2 engine is not properly disconnected, then
a powerdown request will be rejected. Require ERRATA_SME_POWER_DOWN be
set to avoid this.

Just like Gelas/Travis, the 11.28 model doesn't reset the bit, so a
workaround is necessary.

Change-Id: I0d5de1b0e772f6b4d656e841fb4bcf8fd859f293
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

show more ...

Merge "refactor(lib): add cache unit alignment attribute to cpu_context_t" into integration

Merge "feat(cpus): fix external LLC presence bit in Neoverse N3" into integration

Merge "fix(el3-spmc): update event log related include" into integration

Merge "fix(cpufeat): configure CPTR_EL2.ZEN and CPTR_EL2.TZ to match Linux" into integration

docs(drtm): update to latest specification and remove build/run section

- Updated reference to the latest Arm DRTM Architecture
Specification (DEN0113).
- Removed the outdated "Build and Run" sect

docs(drtm): update to latest specification and remove build/run section

- Updated reference to the latest Arm DRTM Architecture
Specification (DEN0113).
- Removed the outdated "Build and Run" section to avoid
duplication, since this test is already covered in the
TF-A CI run.

Change-Id: I33f080711872c8b07df02d835b5c5c6b652e557c
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

show more ...

fix(el3-spmc): update event log related include

This header provides APIs for managing an event log in a transfer list.
It was made part of LibTL, and removed in (b67e984) when we moved to
using Lib

fix(el3-spmc): update event log related include

This header provides APIs for managing an event log in a transfer list.
It was made part of LibTL, and removed in (b67e984) when we moved to
using LibEventLog as a submodule. This was missed during that update.

Change-Id: I279e23b25db40c04e9f2aae23e10ebddfe99419c
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

show more ...

fix(bl31): add missing curly braces

This corrects the MISRA violation C2012-15.6:
The body of an iteration-statement or a selection-statement shall
be a compound-statement.
Enclosed statement body w

fix(bl31): add missing curly braces

This corrects the MISRA violation C2012-15.6:
The body of an iteration-statement or a selection-statement shall
be a compound-statement.
Enclosed statement body within the curly braces.

Change-Id: I00ef5173176b4e02d448a976a100912daac3d733
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

show more ...

fix(xilinx): match function type as its declared

This corrects the MISRA violation C2012-8.3:
matching the type of function definition as per its declaration.

Change-Id: Iee582e3bdb3d51fd53938009d2

fix(xilinx): match function type as its declared

This corrects the MISRA violation C2012-8.3:
matching the type of function definition as per its declaration.

Change-Id: Iee582e3bdb3d51fd53938009d29a921569616566
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

show more ...

fix(platforms): typedef operands to match data type

This corrects the MISRA violation C2012-10.3:
The value of an expression shall not be assigned to an object with a
narrower essential type or of a

fix(platforms): typedef operands to match data type

This corrects the MISRA violation C2012-10.3:
The value of an expression shall not be assigned to an object with a
narrower essential type or of a different essential type category.
The condition is explicitly checked against 0U, appending 'U' and
typecasting for unsigned comparison.

Change-Id: I1ed3b7fc1866b34f1086e449ffe648f53c33b008
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

show more ...

fix(platforms): declare unused parameters as void

This corrects the MISRA violation C2012-2.7:
There should be no unused parameters in functions.
Declared unused function parameters as void.

Change

fix(platforms): declare unused parameters as void

This corrects the MISRA violation C2012-2.7:
There should be no unused parameters in functions.
Declared unused function parameters as void.

Change-Id: I8a98d35a4db1494120eaf39bc0f2315deed81664
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

show more ...

fix(platforms): add essential bool type

This corrects the MISRA violation C2012-14.4:
The value 1 does not have an essentially boolean type, it's an integer
constant. Therefore using 'true' from std

fix(platforms): add essential bool type

This corrects the MISRA violation C2012-14.4:
The value 1 does not have an essentially boolean type, it's an integer
constant. Therefore using 'true' from stdbool.h resolves the issue.

Change-Id: If40cb8f583f8eb549dadaa744976741b30ee7d42
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

show more ...

fix(platforms): fix misra violation 10.1

This corrects the MISRA violation C2012-10.1:
Operands shall not be of an inappropriate essential type.
The condition is explicitly checked against boolean v

fix(platforms): fix misra violation 10.1

This corrects the MISRA violation C2012-10.1:
Operands shall not be of an inappropriate essential type.
The condition is explicitly checked against boolean value.
In this scenario, using 'false' rather than '0'resolves the issue.

Change-Id: Icf3d37784181a65d00f6602e8f5e2bf4c65ac9cb
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

show more ...

Merge "fix(lfa): include string.h in lfa_main.c" into integration