chore: reformat sphinx configuration

Format the configuration file to follow our coding guidelines and common
Python style conventions.

Change-Id: Ic83372287db08df0662f562f7683a02ddff0bac8
Signed-o

chore: reformat sphinx configuration

Format the configuration file to follow our coding guidelines and common
Python style conventions.

Change-Id: Ic83372287db08df0662f562f7683a02ddff0bac8
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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Merge "feat(xlat): detect 4KB and 16KB page support when FEAT_LPA2 is present" into integration

Merge "fix(fiptool): move juno plat_fiptool.mk" into integration

feat(qemu-sbsa): handle GIC base

QEMU provides GIC information in DeviceTree (on platform version 0.1+).
Read it and provide to next firmware level via SMC.

Signed-off-by: Marcin Juszkiewicz <marci

feat(qemu-sbsa): handle GIC base

QEMU provides GIC information in DeviceTree (on platform version 0.1+).
Read it and provide to next firmware level via SMC.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Change-Id: I383919bd172acc8873292a0c5e4469651dc96fb9

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feat(qemu-sbsa): handle platform version

QEMU provides platform version information via DT. We want to use it
in firmware to handle differences between platform versions.

Signed-off-by: Marcin Jusz

feat(qemu-sbsa): handle platform version

QEMU provides platform version information via DT. We want to use it
in firmware to handle differences between platform versions.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Change-Id: I8def66dac9dd5d7ab0e459baa40e27a11b65f0ba

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feat(xlat): detect 4KB and 16KB page support when FEAT_LPA2 is present

At the moment, TF-A does not need to access VAs or PAs larger than
48 bits, so this patch just enables proper detection of supp

feat(xlat): detect 4KB and 16KB page support when FEAT_LPA2 is present

At the moment, TF-A does not need to access VAs or PAs larger than
48 bits, so this patch just enables proper detection of support
for 4KB and 16KB granularity with 52 bits address support.

Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com>
Change-Id: Iccebbd5acc21f09dbb234ef21a802300e290ec18

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Merge changes from topic "cot_cca_nvctr" into integration

* changes:
feat(fvp): mock support for CCA NV ctr
feat(auth): add CCA NV ctr to CCA CoT
feat(build): pass CCA NV ctr option to cert_cr

Merge changes from topic "cot_cca_nvctr" into integration

* changes:
feat(fvp): mock support for CCA NV ctr
feat(auth): add CCA NV ctr to CCA CoT
feat(build): pass CCA NV ctr option to cert_create
feat(cert-create): add new option for CCA NV ctr

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Merge "fix(measured-boot): don't strip last non-0 char" into integration

Merge changes from topic "hm/memmap-feat" into integration

* changes:
build(bl32): add symbols for memory layout
build(bl31): add symbols for memory layout
build(bl2): add symbols for memory l

Merge changes from topic "hm/memmap-feat" into integration

* changes:
build(bl32): add symbols for memory layout
build(bl31): add symbols for memory layout
build(bl2): add symbols for memory layout
build(bl1): add symbols for memory layout
refactor: improve readability of symbol table

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Merge changes from topic "sb/maintainters-process" into integration

* changes:
docs: clarify maintainers election process
docs: consolidate code review process documentation

docs: clarify maintainers election process

Add a new page in TF-A documentation for clarifying the process to
elect a new maintainer. This builds on top of the Trusted Firmware
process [1], with the

docs: clarify maintainers election process

Add a new page in TF-A documentation for clarifying the process to
elect a new maintainer. This builds on top of the Trusted Firmware
process [1], with the following TF-A specific details:

- Must have contributed to the project for at least a couple of years.
- Must dedicate at least 2 hours a week for maintainer duties.
- Details about the election process. In particular, setting a
one-calendar-week deadline for other maintainers to raise
objections.

[1] https://developer.trustedfirmware.org/w/collaboration/project-maintenance-process/

Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Change-Id: Ibef08bbbd4d18cd7aea13e01ba570972a7ee808d

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docs: consolidate code review process documentation

From the page listing the maintainers and code owners [1], add a link
to the code review guidelines page [2], which in turn has a link to
the tf.o

docs: consolidate code review process documentation

From the page listing the maintainers and code owners [1], add a link
to the code review guidelines page [2], which in turn has a link to
the tf.org code review process [3].

Before that patch, both pages [1] and [2] had a link to
[3]. Hopefully, this change will guide the reader better so they don't
miss out on any information.

Additionally, move some of the information from the top of page [1]
into page [2] and add extra details about the code review process used
in TF-A and how that get translated in Gerrit.

[1] https://trustedfirmware-a.readthedocs.io/en/latest/about/maintainers.html
[2] https://trustedfirmware-a.readthedocs.io/en/latest/process/code-review-guidelines.html
[3] https://developer.trustedfirmware.org/w/collaboration/project-maintenance-process/

Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Change-Id: I56562a72443f03fff16077dadc411ef4ee78666d

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fix(psci): add optional pwr_domain_validate_suspend to plat_psci_ops_t

This patch adds a new optional member `pwr_domain_validate_suspend` to
the `plat_psci_ops_t` structure that allows a platform t

fix(psci): add optional pwr_domain_validate_suspend to plat_psci_ops_t

This patch adds a new optional member `pwr_domain_validate_suspend` to
the `plat_psci_ops_t` structure that allows a platform to optionally
perform platform specific validations in OS-initiated mode. This is
conditionally compiled into the build depending on the value of the
`PSCI_OS_INIT_MODE` build option.

In https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/17682,
the return type of the `pwr_domain_suspend` handler was updated from
`void` to `int` to allow a platform to optionally perform platform
specific validations in OS-initiated mode. However, when an error code
other than `PSCI_E_SUCCESS` is returned, the current exit path does not
undo the operations in `psci_suspend_to_pwrdown_start`, and as a result,
the system ends up in an unexpected state.

The fix in this patch prevents the need to undo the operations in
`psci_suspend_to_pwrdown_start`, by allowing the platform to first
perform any necessary platform specific validations before the PSCI
generic code proceeds to the point of no return where the CPU_SUSPEND
request is expected to complete successfully.

Change-Id: I05d92c7ea3f5364da09af630d44d78252185db20
Signed-off-by: Wing Li <wingers@google.com>

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fix(sc7280): update pwr_domain_suspend

Change-Id: I0ee6598e9a9a01aea49e05307c68bde9993debba
Signed-off-by: Wing Li <wingers@google.com>

fix(fvp): update pwr_domain_suspend

Change-Id: Ied4063ac6e685368818b2296c2d1800f4b272b86
Signed-off-by: Wing Li <wingers@google.com>

Merge changes from topic "bk/errata_refactor" into integration

* changes:
feat(cpus): wrappers to propagate AArch32 errata info
feat(cpus): add a way to automatically report errata
feat(cpus):

Merge changes from topic "bk/errata_refactor" into integration

* changes:
feat(cpus): wrappers to propagate AArch32 errata info
feat(cpus): add a way to automatically report errata
feat(cpus): add a concise way to implement AArch64 errata
refactor(cpus): convert print_errata_status to C
refactor(cpus): rename errata_report.h to errata.h
refactor(cpus): move cpu_ops field defines to a header

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fix(spi-nand): add Quad Enable management

The framework currently supports QE feature only for Macronix devices.
Kioxia devices also support this feature, but this feature can not be
set based on th

fix(spi-nand): add Quad Enable management

The framework currently supports QE feature only for Macronix devices.
Kioxia devices also support this feature, but this feature can not be
set based on the manufacturer ID as Kioxia first SPI NAND generation
does not support the QE feature when the second generation does.

Use a flag to manage QE feature. This flag will be added at board level
to manage the device.

Change-Id: I7a3683a2df8739967b17b4abbec32c51bf206b93
Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>

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fix(measured-boot): don't strip last non-0 char

With the current implementation of stripping the last null
byte from a string, there was no way to get the TF-M measured
boot test suite to pass. It w

fix(measured-boot): don't strip last non-0 char

With the current implementation of stripping the last null
byte from a string, there was no way to get the TF-M measured
boot test suite to pass. It would expect the size of the string
passed into extend measurement to be unaffected by the call.

This fix should allow passing a string with the null char
pre-stripped, allowing the tests to exclude the null char in
their test data and not have the length decremented.

Further, This patch adds an early exit if either the version
or sw_type is larger than its buffer. Without this check,
it may be possible to pass a length one more than the maximum,
and if the last element is a null, the length will be truncated
to fit. This is instead suppsed to return an error.

Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com>
Change-Id: I98e1bb53345574d4645513009883c6e7b6612531

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Merge "feat: define memory ranges for tc platform" into integration

fix(st-clock): disabling CKPER clock is not functional on stm32mp13

The mask used to configure the CKPER MUX was wrong and unnecessary.

Change-Id: I40098f2a27b9e5ba8706ab5377d23f578c09838b
Signed-o

fix(st-clock): disabling CKPER clock is not functional on stm32mp13

The mask used to configure the CKPER MUX was wrong and unnecessary.

Change-Id: I40098f2a27b9e5ba8706ab5377d23f578c09838b
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>

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fix(st-uart): skip console flush if UART is disabled

Check the USART_CR1_UE bit and if it is 0, the UART is not enabled,
or not clocked (but the read won't freeze the bus and will return 0).
In this

fix(st-uart): skip console flush if UART is disabled

Check the USART_CR1_UE bit and if it is 0, the UART is not enabled,
or not clocked (but the read won't freeze the bus and will return 0).
In this case skip the console flush.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I5d1ef7e51612b4795e314b2f2da04a514b6c96a0

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fix(st): flush UART at the end of uart_read()

Add a flush to ensure that the programmer get time to read the last
command sent.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ic1f718d

fix(st): flush UART at the end of uart_read()

Add a flush to ensure that the programmer get time to read the last
command sent.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ic1f718d2754f27945f12c04563663b46274810a7

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fix(stm32mp1): use the BSEC nodes compatible for stm32mp13

Device tree alignment with kernel and latest binding for BSEC node:
the rev2.0 is used on STM32MP13x devices with the new compatible
compat

fix(stm32mp1): use the BSEC nodes compatible for stm32mp13

Device tree alignment with kernel and latest binding for BSEC node:
the rev2.0 is used on STM32MP13x devices with the new compatible
compatible = "st,stm32mp13-bsec".

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I76f86f2951eff4af91d22dfb926969fd842a36ce

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fix(stm32mp13-fdts): correct the BSEC nodes compatible

Device tree alignment with kernel and latest binding for BSEC node:
the rev2.0 is used on STM32MP13x devices with the new compatible
compatible

fix(stm32mp13-fdts): correct the BSEC nodes compatible

Device tree alignment with kernel and latest binding for BSEC node:
the rev2.0 is used on STM32MP13x devices with the new compatible
compatible = "st,stm32mp13-bsec".

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I62c4090ae5d5c1de901e6df1e8ea5d1a3296a272

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fix(stm32mp1-fdts): move /omit-if-no-ref/ to overlay files

To keep (as much as possible) alignment with Linux DT, move the
/omit-if-no-ref/ keywords to DT overlay files (fdts/stm32mp1*-bl*.dtsi).
Th

fix(stm32mp1-fdts): move /omit-if-no-ref/ to overlay files

To keep (as much as possible) alignment with Linux DT, move the
/omit-if-no-ref/ keywords to DT overlay files (fdts/stm32mp1*-bl*.dtsi).
This also ease checks for ST tools.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Ib467a6b65f05a84c9678799ad32e1820249b4ed1

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