History log of /rk3399_ARM-atf/ (Results 4076 – 4100 of 18314)
Revision Date Author Comments
(<<< Hide modified files)
(Show modified files >>>)
7ef0b83724-Feb-2024 Andrey Skvortsov <andrej.skvortzov@gmail.com>

fix(build): don't rely on that gcc-ar is in the same directory as gcc

ccache - a fast C/C++ compiler cache.
ccache wraps gcc and g++ compilers, but not other tools like ar.
If ccache is installed, t

fix(build): don't rely on that gcc-ar is in the same directory as gcc

ccache - a fast C/C++ compiler cache.
ccache wraps gcc and g++ compilers, but not other tools like ar.
If ccache is installed, then build fails with

```
make: /usr/lib/ccache/aarch64-linux-gnu-gcc-ar: No such file or directory
```

Change-Id: I555c178aeaa0cf411cdf67b4a81e7952be762d0f
Signed-off-by: Andrey Skvortsov <andrej.skvortzov@gmail.com>
Signed-off-by: Chris Kay <chris.kay@arm.com>

show more ...

9a79c9e404-Mar-2024 Bipin Ravi <bipin.ravi@arm.com>

Merge changes from topic "fix-lto-build-all" into integration

* changes:
build(fpga): correctly handle gcc as linker for LTO
fix(build): enforce single partition for LTO build
fix(rockchip): a

Merge changes from topic "fix-lto-build-all" into integration

* changes:
build(fpga): correctly handle gcc as linker for LTO
fix(build): enforce single partition for LTO build
fix(rockchip): add support for building with LTO enabled

show more ...

bcfc297619-Feb-2024 Salman Nabi <salman.nabi@arm.com>

refactor(allwinner): console runtime switch on bl31 exit

Flush the FIFO before switching to runtime. This is so that there are
no lingering chars in the FIFO when we move to the runtime console.

TF

refactor(allwinner): console runtime switch on bl31 exit

Flush the FIFO before switching to runtime. This is so that there are
no lingering chars in the FIFO when we move to the runtime console.

TF-A plans to refactor the console_Switch_state(CONSOLE_FLAG_RUNTIME)
and console_flush() calls and make them the last calls in bl31_main()
(before BL31 exits). Until then they are being left as the last calls
in bl31_plat_runtime_setup() for testing before refactoring.

This patch only affects the Allwinner platform.

Change-Id: I15b4a459a280822a01c60e3b0c856b530db6efab
Signed-off-by: Salman Nabi <salman.nabi@arm.com>

show more ...

c864af9819-Feb-2024 Salman Nabi <salman.nabi@arm.com>

refactor(arm): console runtime switch on bl31 exit

Any BL31 setup and Runtime initialization within BL31 is still part of
the BOOT process. As such, the console flush and switch must be the
last cal

refactor(arm): console runtime switch on bl31 exit

Any BL31 setup and Runtime initialization within BL31 is still part of
the BOOT process. As such, the console flush and switch must be the
last calls before BL31 exit. Flush the console print buffer before
switching to runtime. This is so that there is no lingering chars in
the print buffer when we move to the runtime console.

This patch adds console flush before switching to runtime in
bl31_plat_runtime_setup() function (before BL31 exits). The plan is to
move flush and switch calls to bl31_main before BL31 exits, until then
console_flush() in bl31_main.c has been left as is.

This patch affects the Arm platform only.

Change-Id: I4d367b9e9640686ac15246ad24318ae4685c12c5
Signed-off-by: Salman Nabi <salman.nabi@arm.com>

show more ...

b90bbd1a28-Feb-2024 Salman Nabi <salman.nabi@arm.com>

refactor(console): flush before console_switch_state

TF-A plans to move console_flush() and
console_switch_state(CONSOLE_FLAG_RUNTIME) to the end of bl31_main()
before BL31 exits.

Add console_flush

refactor(console): flush before console_switch_state

TF-A plans to move console_flush() and
console_switch_state(CONSOLE_FLAG_RUNTIME) to the end of bl31_main()
before BL31 exits.

Add console_flush() in the generic implementation of
bl31_plat_runtime_setup() call so that platforms can implement or
follow the generic pattern to test this implementation before
console_flush() and console_switch_state() move to bl31_main().

This patch affects the generic implementation of
bl31_plat_runtime_setup()

Change-Id: I92b4176022bfb84558dec5a83386e8ecef49516a
Signed-off-by: Salman Nabi <salman.nabi@arm.com>

show more ...

6c7a039404-Mar-2024 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge "fix(spm): reduce verbosity on passing tf-a-tests" into integration

bd435c5204-Mar-2024 Manish V Badarkhe <manish.badarkhe@arm.com>

Merge changes from topic "topics/fwu_metadata_v2_migration" into integration

* changes:
style(fwu): change the metadata fields to align with specification
style(partition): use GUID values for G

Merge changes from topic "topics/fwu_metadata_v2_migration" into integration

* changes:
style(fwu): change the metadata fields to align with specification
style(partition): use GUID values for GPT partition fields
feat(st): add logic to boot the platform from an alternate bank
feat(st): add a function to clear the FWU trial state counter
feat(fwu): add a function to obtain an alternate FWU bank to boot
feat(fwu): add some sanity checks for the FWU metadata
feat(fwu): modify the check for getting the FWU bank's state
feat(st): get the state of the active bank directly
feat(fwu): add a config flag for including image info in the FWU metadata
feat(fwu): migrate FWU metadata structure to version 2
feat(fwu): document the config flag for including image info in the FWU metadata
feat(fwu): update the URL links for the FWU specification

show more ...

27b0440a02-Mar-2024 Manish Pandey <manish.pandey2@arm.com>

Merge changes from topic "sgi_to_nrd" into integration

* changes:
refactor(sgi): replace references to "SGI"/"sgi" for neoverse_rd
refactor(sgi): rename "CSS_SGI"" macro prefixes to "NRD"
refa

Merge changes from topic "sgi_to_nrd" into integration

* changes:
refactor(sgi): replace references to "SGI"/"sgi" for neoverse_rd
refactor(sgi): rename "CSS_SGI"" macro prefixes to "NRD"
refactor(sgi): move apis and types to "nrd" prefix
refactor(sgi): replace build-option prefix to "NRD"
refactor(sgi): move neoverse_rd out of css
refactor(sgi): move from "sgi" to "neoverse_rd"
feat(sgi): remove unused SGI_PLAT build-option
fix(sgi): align to misra rule for braces
feat(rde1edge): remove support for RD-E1-Edge
fix(rdn2): populate TOS_CONFIG only when SPMC_AT_EL3 is enabled
fix(board): update spi_id max for sgi multichip platforms

show more ...


docs/about/maintainers.rst
docs/plat/arm/arm-build-options.rst
docs/plat/index.rst
plat/arm/board/neoverse_rd/common/arch/aarch64/nrd_helper.S
plat/arm/board/neoverse_rd/common/include/nrd_base_platform_def.h
plat/arm/board/neoverse_rd/common/include/nrd_dmc620_tzc_regions.h
plat/arm/board/neoverse_rd/common/include/nrd_plat.h
plat/arm/board/neoverse_rd/common/include/nrd_ras.h
plat/arm/board/neoverse_rd/common/include/nrd_sdei.h
plat/arm/board/neoverse_rd/common/include/nrd_soc_css_def.h
plat/arm/board/neoverse_rd/common/include/nrd_soc_css_def_v2.h
plat/arm/board/neoverse_rd/common/include/nrd_soc_platform_def.h
plat/arm/board/neoverse_rd/common/include/nrd_soc_platform_def_v2.h
plat/arm/board/neoverse_rd/common/include/nrd_variant.h
plat/arm/board/neoverse_rd/common/include/plat_macros.S
plat/arm/board/neoverse_rd/common/nrd-common.mk
plat/arm/board/neoverse_rd/common/nrd_bl31_setup.c
plat/arm/board/neoverse_rd/common/nrd_image_load.c
plat/arm/board/neoverse_rd/common/nrd_interconnect.c
plat/arm/board/neoverse_rd/common/nrd_plat.c
plat/arm/board/neoverse_rd/common/nrd_plat_v2.c
plat/arm/board/neoverse_rd/common/nrd_topology.c
plat/arm/board/neoverse_rd/common/ras/nrd_ras_common.c
plat/arm/board/neoverse_rd/common/ras/nrd_ras_cpu.c
plat/arm/board/neoverse_rd/common/ras/nrd_ras_sram.c
plat/arm/board/neoverse_rd/platform/rdn1edge/fdts/rdn1edge_fw_config.dts
plat/arm/board/neoverse_rd/platform/rdn1edge/fdts/rdn1edge_nt_fw_config.dts
plat/arm/board/neoverse_rd/platform/rdn1edge/fdts/rdn1edge_tb_fw_config.dts
plat/arm/board/neoverse_rd/platform/rdn1edge/include/platform_def.h
plat/arm/board/neoverse_rd/platform/rdn1edge/platform.mk
plat/arm/board/neoverse_rd/platform/rdn1edge/rdn1edge_err.c
plat/arm/board/neoverse_rd/platform/rdn1edge/rdn1edge_plat.c
plat/arm/board/neoverse_rd/platform/rdn1edge/rdn1edge_security.c
plat/arm/board/neoverse_rd/platform/rdn1edge/rdn1edge_topology.c
plat/arm/board/neoverse_rd/platform/rdn1edge/rdn1edge_trusted_boot.c
plat/arm/board/neoverse_rd/platform/rdn2/fdts/rdn2_fw_config.dts
plat/arm/board/neoverse_rd/platform/rdn2/fdts/rdn2_nt_fw_config.dts
plat/arm/board/neoverse_rd/platform/rdn2/fdts/rdn2_stmm_sel0_manifest.dts
plat/arm/board/neoverse_rd/platform/rdn2/fdts/rdn2_tb_fw_config.dts
plat/arm/board/neoverse_rd/platform/rdn2/include/platform_def.h
plat/arm/board/neoverse_rd/platform/rdn2/include/rdn2_ras.h
plat/arm/board/neoverse_rd/platform/rdn2/platform.mk
plat/arm/board/neoverse_rd/platform/rdn2/rdn2_err.c
plat/arm/board/neoverse_rd/platform/rdn2/rdn2_plat.c
plat/arm/board/neoverse_rd/platform/rdn2/rdn2_ras.c
plat/arm/board/neoverse_rd/platform/rdn2/rdn2_security.c
plat/arm/board/neoverse_rd/platform/rdn2/rdn2_topology.c
plat/arm/board/neoverse_rd/platform/rdn2/rdn2_trusted_boot.c
plat/arm/board/neoverse_rd/platform/rdv1/fdts/rdv1_fw_config.dts
plat/arm/board/neoverse_rd/platform/rdv1/fdts/rdv1_nt_fw_config.dts
plat/arm/board/neoverse_rd/platform/rdv1/fdts/rdv1_tb_fw_config.dts
plat/arm/board/neoverse_rd/platform/rdv1/include/platform_def.h
plat/arm/board/neoverse_rd/platform/rdv1/platform.mk
plat/arm/board/neoverse_rd/platform/rdv1/rdv1_err.c
plat/arm/board/neoverse_rd/platform/rdv1/rdv1_plat.c
plat/arm/board/neoverse_rd/platform/rdv1/rdv1_security.c
plat/arm/board/neoverse_rd/platform/rdv1/rdv1_topology.c
plat/arm/board/neoverse_rd/platform/rdv1/rdv1_trusted_boot.c
plat/arm/board/neoverse_rd/platform/rdv1mc/fdts/rdv1mc_fw_config.dts
plat/arm/board/neoverse_rd/platform/rdv1mc/fdts/rdv1mc_nt_fw_config.dts
plat/arm/board/neoverse_rd/platform/rdv1mc/fdts/rdv1mc_tb_fw_config.dts
plat/arm/board/neoverse_rd/platform/rdv1mc/include/platform_def.h
plat/arm/board/neoverse_rd/platform/rdv1mc/platform.mk
plat/arm/board/neoverse_rd/platform/rdv1mc/rdv1mc_err.c
plat/arm/board/neoverse_rd/platform/rdv1mc/rdv1mc_plat.c
plat/arm/board/neoverse_rd/platform/rdv1mc/rdv1mc_security.c
plat/arm/board/neoverse_rd/platform/rdv1mc/rdv1mc_topology.c
plat/arm/board/neoverse_rd/platform/rdv1mc/rdv1mc_trusted_boot.c
plat/arm/board/neoverse_rd/platform/sgi575/fdts/sgi575_fw_config.dts
plat/arm/board/neoverse_rd/platform/sgi575/fdts/sgi575_nt_fw_config.dts
plat/arm/board/neoverse_rd/platform/sgi575/fdts/sgi575_tb_fw_config.dts
plat/arm/board/neoverse_rd/platform/sgi575/include/platform_def.h
plat/arm/board/neoverse_rd/platform/sgi575/platform.mk
plat/arm/board/neoverse_rd/platform/sgi575/sgi575_err.c
plat/arm/board/neoverse_rd/platform/sgi575/sgi575_plat.c
plat/arm/board/neoverse_rd/platform/sgi575/sgi575_security.c
plat/arm/board/neoverse_rd/platform/sgi575/sgi575_topology.c
plat/arm/board/neoverse_rd/platform/sgi575/sgi575_trusted_boot.c
262dc9f727-Feb-2024 Bipin Ravi <biprav01@u203721.austin.arm.com>

fix(cpus): workaround for Cortex-A715 erratum 2429384

Cortex-A715 erratum 2429384 is a cat B erratum that applies to
revision r1p0 and is fixed in r1p1. The workaround is to set
bit[27] of CPUACTLR2

fix(cpus): workaround for Cortex-A715 erratum 2429384

Cortex-A715 erratum 2429384 is a cat B erratum that applies to
revision r1p0 and is fixed in r1p1. The workaround is to set
bit[27] of CPUACTLR2_EL1. There is no workaround for revision
r0p0.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN2148827/latest

Change-Id: I3cdb1b71567542174759f6946e9c81f77d0d993d
Signed-off-by: Bipin Ravi <biprav01@u203721.austin.arm.com>

show more ...

d0decb0201-Mar-2024 Mark Dykes <mark.dykes@arm.com>

Merge "fix(cpus): workaround for Cortex-X3 erratum 2372204" into integration

b2bca9eb01-Mar-2024 Manish V Badarkhe <manish.badarkhe@arm.com>

Merge changes from topic "smmuv3_fix" into integration

* changes:
feat(smmu): separate out smmuv3_security_init from smmuv3_init
feat(smmu): fix to perform INV_ALL before enabling GPC

c6e7454001-Mar-2024 Manish Pandey <manish.pandey2@arm.com>

Merge "refactor(qemu): console runtime switch on bl31 exit" into integration

1c408d3c01-Mar-2024 Manish Pandey <manish.pandey2@arm.com>

Merge changes from topic "imx8ulp_support" into integration

* changes:
docs(maintainers): add the maintainers for imx8ulp
docs(imx8ulp): add imx8ulp platform
fix(imx8ulp): increase the mmap re

Merge changes from topic "imx8ulp_support" into integration

* changes:
docs(maintainers): add the maintainers for imx8ulp
docs(imx8ulp): add imx8ulp platform
fix(imx8ulp): increase the mmap region num
feat(imx8ulp): adjust the dram mapped region
feat(imx8ulp): ddrc switch auto low power and software interface
feat(imx8ulp): add some delay before cmc1 access
feat(imx8ulp): add a flag check for the ddr status
fix(imx8ulp): add sw workaround for csi/hotplug test hang
feat(imx8ulp): adjust the voltage when sys dvfs enabled
feat(imx8ulp): enable the DDR frequency scaling support
fix(imx8ulp): fix suspend/resume issue when DBD owner is s400 only
feat(imx8ulp): update XRDC for ELE to access DDR with CA35 DID
feat(imx8ulp): add memory region policy
feat(imx8ulp): protect TEE region for secure access only
feat(imx8ulp): add trusty support
feat(imx8ulp): add OPTEE support
feat(imx8ulp): update the upower config for power optimization
feat(imx8ulp): allow RTD to reset APD through MU
feat(imx8ulp): not power off LPAV PD when LPAV owner is RTD
feat(imx8ulp): add system power off support
feat(imx8ulp): add APD power down mode(PD) support in system suspend
feat(imx8ulp): add the basic support for idle & system suspned
feat(imx8ulp): enable 512KB cache after resume on imx8ulp
feat(imx8ulp): add the initial XRDC support
feat(imx8ulp): allocated caam did for the non secure world
feat(imx8ulp): add i.MX8ULP basic support
build(changelog): add new scopes for nxp imx8ulp platform
feat(scmi): add scmi sensor support

show more ...

8d08a1df02-Feb-2024 Sughosh Ganu <sughosh.ganu@linaro.org>

style(fwu): change the metadata fields to align with specification

Change the names of some FWU metadata structure members to have them
align with the wording used in the corresponding specification

style(fwu): change the metadata fields to align with specification

Change the names of some FWU metadata structure members to have them
align with the wording used in the corresponding specification. Use
the GUID type instead of UUID as the fields described in the
specification are GUIDs. Make corresponding changes to the code that
accesses these fields. No functional changes are introduced by the
patch.

Change-Id: Id3544ed1633811b0eeee2bf99477f9b7e6667044
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>

show more ...

37e81a6002-Feb-2024 Sughosh Ganu <sughosh.ganu@linaro.org>

style(partition): use GUID values for GPT partition fields

The GPT partition uses GUID values for identification of partition
types and partitions. Change the relevant functions to use GUID values
i

style(partition): use GUID values for GPT partition fields

The GPT partition uses GUID values for identification of partition
types and partitions. Change the relevant functions to use GUID values
instead of UUID's.

Change-Id: I30df66a8a02fb502e04b0285f34131b65977988e
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>

show more ...

6166051420-Feb-2024 Sughosh Ganu <sughosh.ganu@linaro.org>

feat(st): add logic to boot the platform from an alternate bank

In a few scenarios, there is a need to boot the platform from an
alernate bank which is not the active bank. Call the API
fwu_get_aler

feat(st): add logic to boot the platform from an alternate bank

In a few scenarios, there is a need to boot the platform from an
alernate bank which is not the active bank. Call the API
fwu_get_alernate_boot_bank() to select an alternate bank to boot the
platform from. Calling this API function might be required in a couple
of cases. One, in the unlikely scenario of the active bank being in an
invalid state, or if the number of times the platform boots in trial
state exceeds a pre-set count.

Also add a debug print that indicates the bank that
the platform is booting from.

Change-Id: I688406540e64d1719af8d5c121821f5bb6335c06
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>

show more ...

6e99fee420-Feb-2024 Sughosh Ganu <sughosh.ganu@linaro.org>

feat(st): add a function to clear the FWU trial state counter

Add an API stm32_clear_fwu_trial_boot_cnt() function to clear the
trial state counter. This is called in the corner case scenario when
t

feat(st): add a function to clear the FWU trial state counter

Add an API stm32_clear_fwu_trial_boot_cnt() function to clear the
trial state counter. This is called in the corner case scenario when
the active index is in an Invalid state, thus needing a reset of the
trial state counter.

Change-Id: I2980135da88d0d947c222655c7958b51eb572d69
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>

show more ...

26aab79507-Feb-2024 Sughosh Ganu <sughosh.ganu@linaro.org>

feat(fwu): add a function to obtain an alternate FWU bank to boot

Add a function fwu_get_alternate_boot_bank() to return a valid bank to
boot from. This function can be called by a platform to get a

feat(fwu): add a function to obtain an alternate FWU bank to boot

Add a function fwu_get_alternate_boot_bank() to return a valid bank to
boot from. This function can be called by a platform to get an
alternate bank to try to boot the platform in the unlikely scenario of
the active bank being in an invalid state, or if the number of times
the platform boots in trial state exceeds a pre-set count.

Change-Id: I4bcd88e68e334c452882255bf028e01b090369d1
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>

show more ...

d2566cfb17-Jan-2024 Sughosh Ganu <sughosh.ganu@linaro.org>

feat(fwu): add some sanity checks for the FWU metadata

Add some sanity checks on the values read from the FWU metadata
structure. This ensures that values in the metadata structure are
inline with c

feat(fwu): add some sanity checks for the FWU metadata

Add some sanity checks on the values read from the FWU metadata
structure. This ensures that values in the metadata structure are
inline with certain config symbol values.

Change-Id: Ic4415da9048ac3980f8f811ed7852beb90683f7d
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>

show more ...

56724d0901-Feb-2024 Sughosh Ganu <sughosh.ganu@linaro.org>

feat(fwu): modify the check for getting the FWU bank's state

The version 2 of the FWU metadata structure has a field bank_state in
the top level of the structure which can be used to check if a give

feat(fwu): modify the check for getting the FWU bank's state

The version 2 of the FWU metadata structure has a field bank_state in
the top level of the structure which can be used to check if a given
bank is in the either of Trial State, Accepted State, or in an Invalid
State. This is different from the binary states of Valid/Accepted
States that the bank could be in, as defined in the earlier version of
the specification.

Replace the fwu_is_trial_run_state() API with
fwu_get_active_bank_state() to get the state the current active bank
is in. The value returned by this API is then used by the caller to
take appropriate action.

Change-Id: I764f486840a3713bfe5f8e03d0634bfe09b23590
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>

show more ...

588b01b501-Feb-2024 Sughosh Ganu <sughosh.ganu@linaro.org>

feat(st): get the state of the active bank directly

With version 2 of the FWU metadata structure, the state that a bank is
in can be obtained from the bank_state field in the top level
structure. Re

feat(st): get the state of the active bank directly

With version 2 of the FWU metadata structure, the state that a bank is
in can be obtained from the bank_state field in the top level
structure. Read the state of the active bank by referencing this field
directly, instead of making an API call.

Change-Id: Ib22c56acbe172923b1323c544801ded81f1598ec
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>

show more ...

11d05a7701-Feb-2024 Sughosh Ganu <sughosh.ganu@linaro.org>

feat(fwu): add a config flag for including image info in the FWU metadata

The version 2 of the FWU metadata structure is designed such that the
information on the updatable images can be omitted fro

feat(fwu): add a config flag for including image info in the FWU metadata

The version 2 of the FWU metadata structure is designed such that the
information on the updatable images can be omitted from the metadata
structure. Add a configuration flag, PSA_FWU_METADATA_FW_STORE_DESC,
which is used to select whether the metadata structure has this
information included or not. It's value is set to 1 by default.

Change-Id: I4463a20c94d2c745ddb0b2cc8932c12d418fbd42
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>

show more ...

a89d58bb01-Feb-2024 Sughosh Ganu <sughosh.ganu@linaro.org>

feat(fwu): migrate FWU metadata structure to version 2

The latest version of the FWU specification [1] has changes to the
metadata structure. This is version 2 of the structure.

Primary changes inc

feat(fwu): migrate FWU metadata structure to version 2

The latest version of the FWU specification [1] has changes to the
metadata structure. This is version 2 of the structure.

Primary changes include
- bank_state field in the top level structure
- Total metadata size in the top level structure
- Image description structures now optional
- Number of banks and images per bank values part of the structure

Make changes to the structure to align with version 2 of the structure
defined in the specification. These changes also remove support for
version 1 of the metadata structure.

[1] - https://developer.arm.com/documentation/den0118/latest/

Change-Id: I84b4e742e463cae92375dde8b4603b4a581d62d8
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>

show more ...

7ae1619601-Feb-2024 Sughosh Ganu <sughosh.ganu@linaro.org>

feat(fwu): document the config flag for including image info in the FWU metadata

The version 2 of the FWU metadata structure is designed such that the
information on the updatable images can be omit

feat(fwu): document the config flag for including image info in the FWU metadata

The version 2 of the FWU metadata structure is designed such that the
information on the updatable images can be omitted from the metadata
structure. Add a config flag, PSA_FWU_METADATA_FW_STORE_DESC, which is
used to select whether the metadata structure has this information
included or not. It's value is set to 1 by default.

Change-Id: Id6c99455db768edd59b0a316051432a900d30076
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>

show more ...

e106a78e01-Feb-2024 Sughosh Ganu <sughosh.ganu@linaro.org>

feat(fwu): update the URL links for the FWU specification

Update the links for accessing the FWU Multi Bank update specification
to point to the latest revision of the specification.

Change-Id: I25

feat(fwu): update the URL links for the FWU specification

Update the links for accessing the FWU Multi Bank update specification
to point to the latest revision of the specification.

Change-Id: I25f35556a94ca81ca0a7463aebfcbc2d84595e8f
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>

show more ...

1...<<161162163164165166167168169170>>...733