| 5de1ace5 | 15-Nov-2024 |
Karl Li <karl.li@mediatek.com> |
feat(mt8196): turn on APU smpu protection
1. Turn on APU SMPU protection on MT8196. 2. Remove unused header file.
Change-Id: I58637b8dda4bf68253bc2329580963a8bd9cca8b Signed-off-by: Karl Li <karl.l
feat(mt8196): turn on APU smpu protection
1. Turn on APU SMPU protection on MT8196. 2. Remove unused header file.
Change-Id: I58637b8dda4bf68253bc2329580963a8bd9cca8b Signed-off-by: Karl Li <karl.li@mediatek.com>
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| 823a57e1 | 03-Dec-2024 |
Karl Li <karl.li@mediatek.com> |
feat(mt8196): enable APU spmi operation
Enable APU spmi operation after spmi module ready
Change-Id: I4bb1a50a635e8798b049295dbbf98967daff5997 Signed-off-by: Karl Li <karl.li@mediatek.com> |
| 4794746e | 31-Dec-2024 |
Yong Wu <yong.wu@mediatek.com> |
feat(mt8196): add Mediatek MMinfra stub implementation
Implement stub functions for the MMinfra (Multimedia Infrastructure) driver to ensure that the build can pass when a prebuilt library is not av
feat(mt8196): add Mediatek MMinfra stub implementation
Implement stub functions for the MMinfra (Multimedia Infrastructure) driver to ensure that the build can pass when a prebuilt library is not available.
Change-Id: Iadac654950c868d3743b13a1d6f7ab5d1015fb86 Signed-off-by: Yong Wu <yong.wu@mediatek.com>
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| 49d8c112 | 02-Dec-2024 |
ot_chhao.chang <ot_chhao.chang@mediatek.com> |
feat(mt8196): enable cirq for MediaTek MT8196
- Add CIRQ related information.
Signed-off-by: ot_chhao.chang <ot_chhao.chang@mediatek.com> Change-Id: I758e933f9d53f7bfb16e3d7feb1c7f53516b1da6 |
| cf084b36 | 30-Jan-2025 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "fix(gicv3): do not assume redistributors are powered down" into integration |
| ff821025 | 29-Jan-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge "feat(mediatek): add gic driver" into integration |
| 35c54de1 | 29-Jan-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge "refactor(mediatek): refactor the data type of the return value" into integration |
| 206dd2bb | 29-Jan-2025 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "fix(tc): fix compilation error" into integration |
| c2673bff | 29-Jan-2025 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(build): do not force PLAT in plat_helpers.mk" into integration |
| 27f70832 | 29-Jan-2025 |
Yann Gautier <yann.gautier@st.com> |
Merge "fix(xilinx): remove unused write_icc_asgi1r_el1()" into integration |
| 1c12cd10 | 24-Jan-2025 |
Michal Simek <michal.simek@amd.com> |
fix(xilinx): remove unused write_icc_asgi1r_el1()
The commit 427e46ddea1e ("fix(xilinx): fix sending sgi to linux") removed code which called write_icc_asgi1r_el1() but function itself wasn't remove
fix(xilinx): remove unused write_icc_asgi1r_el1()
The commit 427e46ddea1e ("fix(xilinx): fix sending sgi to linux") removed code which called write_icc_asgi1r_el1() but function itself wasn't removed.
Signed-off-by: Michal Simek <michal.simek@amd.com> Change-Id: I95a1424b0546f3f4a5e4611de34441b96e70b7d3
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| 26a520b2 | 29-Jan-2025 |
Leo Yan <leo.yan@arm.com> |
fix(tc): fix compilation error
When the SPD_spmd configuration is disabled, the compiler complaints:
plat/arm/board/tc/tc_bl2_dpe.c:234:22: error: unused variable 'array_size' [-Werror=unused-varia
fix(tc): fix compilation error
When the SPD_spmd configuration is disabled, the compiler complaints:
plat/arm/board/tc/tc_bl2_dpe.c:234:22: error: unused variable 'array_size' [-Werror=unused-variable] 234 | const size_t array_size = ARRAY_SIZE(tc_dpe_metadata); | ^~~~~~~~~~ plat/arm/board/tc/tc_bl2_dpe.c:233:16: error: unused variable 'i' [-Werror=unused-variable] 233 | size_t i; | ^ cc1: all warnings being treated as errors
Move variable declarations into the code chunk protected by the SPD_spmd configuration.
Change-Id: I1a3889938e2d4ec5efec516e9ef54034f9d711b2 Signed-off-by: Leo Yan <leo.yan@arm.com>
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| 99f6790c | 28-Aug-2024 |
Jackson Cooper-Driver <jackson.cooper-driver@arm.com> |
feat(tc): add SLC MSC nodes to TC4 DT
These specify the addresses of the MPAM registers in the MCN block. Note that these are enabled for TC4 FPGA only as the MPAM devices are not available on FVP.
feat(tc): add SLC MSC nodes to TC4 DT
These specify the addresses of the MPAM registers in the MCN block. Note that these are enabled for TC4 FPGA only as the MPAM devices are not available on FVP.
Signed-off-by: Jackson Cooper-Driver <jackson.cooper-driver@arm.com> Signed-off-by: Icen.Zeyada <Icen.Zeyada2@arm.com> Change-Id: I105cd21952c2bd4fac5a06c84c0a93217b5e1312
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| 967999d0 | 28-Aug-2024 |
Jackson Cooper-Driver <jackson.cooper-driver@arm.com> |
refactor(tc): clarify msc0 DT node
This node specifies the location of the MPAM registers for the DSU. Rename the node to clarify this.
Signed-off-by: Jackson Cooper-Driver <jackson.cooper-driver@a
refactor(tc): clarify msc0 DT node
This node specifies the location of the MPAM registers for the DSU. Rename the node to clarify this.
Signed-off-by: Jackson Cooper-Driver <jackson.cooper-driver@arm.com> Signed-off-by: Icen.Zeyada <Icen.Zeyada2@arm.com> Change-Id: Ie870a7f31acbc44dd943e76896219b9bbdd7d5b4
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| 604b8797 | 28-Jan-2025 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "fix(el3-spmc): move ERROR line inside conditional" into integration |
| eb2215d2 | 28-Jan-2025 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "feat(el3-spmc): use spmd_smc_switch_state after secure interrupt" into integration |
| 2c09bf93 | 28-Jan-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge changes I3f63d597,I40fc21f5 into integration
* changes: feat(mt8196): add mtcmos driver feat(mt8196): add DCM driver |
| cf2df874 | 28-Jan-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge changes I1126311e,I6ae5b5b4,I1b907256,I9facb6bf,Ie51cffeb, ... into integration
* changes: feat(mt8196): add vcore dvfs drivers feat(mt8196): add LPM v2 support feat(mt8196): add SPM com
Merge changes I1126311e,I6ae5b5b4,I1b907256,I9facb6bf,Ie51cffeb, ... into integration
* changes: feat(mt8196): add vcore dvfs drivers feat(mt8196): add LPM v2 support feat(mt8196): add SPM common version support feat(mt8196): add SPM common driver support feat(mt8196): add SPM basic features support feat(mt8196): add SPM features support feat(mt8196): enable PMIC low power setting feat(mt8196): add mcdi driver feat(mt8196): add pwr_ctrl module for CPU power management feat(mt8196): add mcusys moudles for power management feat(mt8196): add CPC module for power management feat(mt8196): add topology module for power management feat(mt8196): add SPMI driver feat(mt8196): add PMIC driver
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| 1f913a6e | 18-Dec-2024 |
Guangjie Song <guangjie.song@mediatek.com> |
feat(mt8196): add mtcmos driver
add mtcmos driver for ufs power control
Signed-off-by: Guangjie Song <guangjie.song@mediatek.com> Change-Id: I3f63d5976906aaca91a71a147497e9345339774d |
| e578702f | 31-Oct-2024 |
Guangjie Song <guangjie.song@mediatek.com> |
feat(mt8196): add DCM driver
DCM means dynamic clock management, and it can dynamically slow down or gate clocks during CPU or bus idle.
Add MCUSYS or bus related DCM drivers. Enable MCUSYS or bus
feat(mt8196): add DCM driver
DCM means dynamic clock management, and it can dynamically slow down or gate clocks during CPU or bus idle.
Add MCUSYS or bus related DCM drivers. Enable MCUSYS or bus related DCM by default.
Signed-off-by: Guangjie Song <guangjie.song@mediatek.com> Change-Id: I40fc21f5808962ca46870a2f3b9963dc8088f877
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| fc45c16b | 28-Jan-2025 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "fix(rdv3): fix comment for DRAM1 carveout size" into integration |
| c2f05915 | 28-Jan-2025 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "upstream_sp_num" into integration
* changes: fix(tc): enable certificate on the last secure partition feat(sptool): populate secure partition number in makefile |
| 1ce2c745 | 03-Sep-2024 |
Jagdish Gediya <jagdish.gediya@arm.com> |
feat(tc): update CPU PMU nodes for tc4
CPU PMU types are not same for all CPUs on TC platforms, so define the PMU node per microarchitecture.
Signed-off-by: Jagdish Gediya <jagdish.gediya@arm.com>
feat(tc): update CPU PMU nodes for tc4
CPU PMU types are not same for all CPUs on TC platforms, so define the PMU node per microarchitecture.
Signed-off-by: Jagdish Gediya <jagdish.gediya@arm.com> Signed-off-by: Icen.Zeyada <Icen.Zeyada2@arm.com> Change-Id: Ibbe8dacda695ccb45965c7f4680d4b03cffdb815
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| 64187603 | 28-Jan-2025 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "fix(stm32mp2): correct early/crash console init" into integration |
| 2e361319 | 29-Oct-2024 |
Ben Horgan <ben.horgan@arm.com> |
fix(tc): enable certificate on the last secure partition
Distros (e.g. Buildroot and Android) can have different secure partition layout.
This commit iterates the DPE metadata table and finds index
fix(tc): enable certificate on the last secure partition
Distros (e.g. Buildroot and Android) can have different secure partition layout.
This commit iterates the DPE metadata table and finds index (i) for the first entry of the secure partition, connecting with the defined secure partition number NUM_SP, so the last secure partition index is:
i + NUM_SP - 1
Instead of setting the certificate in hard code, dynamically enables the certificate for the last secure partition base on calculated index.
Signed-off-by: Ben Horgan <ben.horgan@arm.com> Signed-off-by: Leo Yan <leo.yan@arm.com> Change-Id: Idd11b4f463bf5ccc8d82cd06bd21deeebbda67d9
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