Allow CSS to redefine function `plat_arm_calc_core_pos`

Currently all ARM CSS platforms which include css_helpers.S use the same
strong definition of `plat_arm_calc_core_pos`. This patch allows thes

Allow CSS to redefine function `plat_arm_calc_core_pos`

Currently all ARM CSS platforms which include css_helpers.S use the same
strong definition of `plat_arm_calc_core_pos`. This patch allows these CSS
platforms to define their own strong definition of this function.

* Replace the strong definition of `plat_arm_calc_core_pos` in
css_helpers.S with a utility function `css_calc_core_pos_swap_cluster`
does the same thing (swaps cluster IDs). ARM CSS platforms may choose
to use this function or not.

* Add a Juno strong definition of `plat_arm_calc_core_pos`, which uses
`css_calc_core_pos_swap_cluster`.

Change-Id: Ib5385ed10e44adf6cd1398a93c25973eb3506d9d

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Merge pull request #413 from jcastillo-arm/jc/tbb_cert_opt

Certificate create tool flexibility improvements

Merge pull request #414 from jcastillo-arm/jc/io_ret_values

Use standard error code definitions

Use standard errno definitions in load_auth_image()

This patch replaces custom definitions used as return values for
the load_auth_image() function with standard error codes defined
in errno.h. The

Use standard errno definitions in load_auth_image()

This patch replaces custom definitions used as return values for
the load_auth_image() function with standard error codes defined
in errno.h. The custom definitions have been removed.

It also replaces the usage of IO framework error custom definitions,
which have been deprecated. Standard errno definitions are used
instead.

Change-Id: I1228477346d3876151c05b470d9669c37fd231be

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IO Framework: use standard errno codes as return values

This patch redefines the values of IO_FAIL, IO_NOT_SUPPORTED and
IO_RESOURCES_EXHAUSTED to match the corresponding definitions in
errno.h:

IO Framework: use standard errno codes as return values

This patch redefines the values of IO_FAIL, IO_NOT_SUPPORTED and
IO_RESOURCES_EXHAUSTED to match the corresponding definitions in
errno.h:

#define IO_FAIL (-ENOENT)
#define IO_NOT_SUPPORTED (-ENODEV)
#define IO_RESOURCES_EXHAUSTED (-ENOMEM)

NOTE: please note that the IO_FAIL, IO_NOT_SUPPORTED and
IO_RESOURCES_EXHAUSTED definitions are considered deprecated
and their usage should be avoided. Callers should rely on errno.h
definitions when checking the return values of IO functions.

Change-Id: Ic8491aa43384b6ee44951ebfc053a3ded16a80be

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cert_create: specify command line options in the CoT

This patch introduces a new API that allows to specify command
line options in the Chain of Trust description. These command line
options may be

cert_create: specify command line options in the CoT

This patch introduces a new API that allows to specify command
line options in the Chain of Trust description. These command line
options may be used to specify parameters related to the CoT (i.e.
keys or certificates), instead of keeping a hardcoded list of
options in main.c.

Change-Id: I282b0b01cb9add557b26bddc238a28253ce05e44

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cert_create: improve command line argument check

The certificate generation tool currently checks if all command
line options required to create all certificates in the CoT have
been specified. This

cert_create: improve command line argument check

The certificate generation tool currently checks if all command
line options required to create all certificates in the CoT have
been specified. This prevents using the tool to create individual
certificates when the whole CoT is not required.

This patch improves the checking function so only those options
required by the certificates specified in the command line are
verified.

Change-Id: I2c426a8e2e2dec85b15f2d98fd4ba949c1aed385

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Merge pull request #410 from soby-mathew/sm/psci_handler_reorg

Reorganise PSCI PM handler setup on ARM Standard platforms

Merge pull request #411 from jcastillo-arm/jc/plat_bl1_exit

Jc/plat bl1 exit

Merge pull request #409 from sandrine-bailleux/sb/break-down-bl1-sync-exceptions

Break down BL1 AArch64 synchronous exception handler

Add optional bl1_plat_prepare_exit() API

This patch adds an optional API to the platform port:

void bl1_plat_prepare_exit(void);

This function is called prior to exiting BL1 in response to the

Add optional bl1_plat_prepare_exit() API

This patch adds an optional API to the platform port:

void bl1_plat_prepare_exit(void);

This function is called prior to exiting BL1 in response to the
RUN_IMAGE_SMC request raised by BL2. It should be used to perform
platform specific clean up or bookkeeping operations before
transferring control to the next image.

A weak empty definition of this function has been provided to
preserve platform backwards compatibility.

Change-Id: Iec09697de5c449ae84601403795cdb6aca166ba1

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Reorganise PSCI PM handler setup on ARM Standard platforms

This patch does the following reorganization to psci power management (PM)
handler setup for ARM standard platform ports :

1. The mailbox

Reorganise PSCI PM handler setup on ARM Standard platforms

This patch does the following reorganization to psci power management (PM)
handler setup for ARM standard platform ports :

1. The mailbox programming required during `plat_setup_psci_ops()` is identical
for all ARM platforms. Hence the implementation of this API is now moved
to the common `arm_pm.c` file. Each ARM platform now must define the
PLAT_ARM_TRUSTED_MAILBOX_BASE macro, which in current platforms is the same
as ARM_SHARED_RAM_BASE.

2. The PSCI PM handler callback structure, `plat_psci_ops`, must now be
exported via `plat_arm_psci_pm_ops`. This allows the common implementation
of `plat_setup_psci_ops()` to return a platform specific `plat_psci_ops`.
In the case of CSS platforms, a default weak implementation of the same is
provided in `css_pm.c` which can be overridden by each CSS platform.

3. For CSS platforms, the PSCI PM handlers defined in `css_pm.c` are now
made library functions and a new header file `css_pm.h` is added to export
these generic PM handlers. This allows the platform to reuse the
adequate CSS PM handlers and redefine others which need to be customized
when overriding the default `plat_arm_psci_pm_ops` in `css_pm.c`.

Change-Id: I277910f609e023ee5d5ff0129a80ecfce4356ede

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Break down BL1 AArch64 synchronous exception handler

The AArch64 synchronous exception vector code in BL1 is almost
reaching its architectural limit of 32 instructions. This means
there is very litt

Break down BL1 AArch64 synchronous exception handler

The AArch64 synchronous exception vector code in BL1 is almost
reaching its architectural limit of 32 instructions. This means
there is very little space for this code to grow.

This patch reduces the size of the exception vector code by
moving most of its code in a function to which we branch from
SynchronousExceptionA64.

Change-Id: Ib35351767a685fb2c2398029d32e54026194f7ed

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Merge pull request #408 from sandrine-bailleux/sb/cassert

Make CASSERT() macro callable from anywhere

Merge pull request #407 from sandrine-bailleux/sb/fix-arm-bl1-setup-include

Fix #include path in ARM platform BL1 setup code

Make CASSERT() macro callable from anywhere

The CASSERT() macro introduces a typedef for the sole purpose of
triggering a compilation error if the condition to check is false.
This typedef is not us

Make CASSERT() macro callable from anywhere

The CASSERT() macro introduces a typedef for the sole purpose of
triggering a compilation error if the condition to check is false.
This typedef is not used afterwards. As a consequence, when the
CASSERT() macro is called from withing a function block, the compiler
complains and outputs the following error message:

error: typedef 'msg' locally defined but not used [-Werror=unused-local-typedefs]

This patch adds the "unused" attribute for the aforementioned
typedef. This silences the compiler warning and thus makes the
CASSERT() macro callable from within function blocks as well.

Change-Id: Ie36b58fcddae01a21584c48bb6ef43ec85590479

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Fix #include path in ARM platform BL1 setup code

This patch fixes the relative path to the 'bl1_private.h' header file
included from 'arm_bl1_setup.c'. Note that, although the path was
incorrect, it

Fix #include path in ARM platform BL1 setup code

This patch fixes the relative path to the 'bl1_private.h' header file
included from 'arm_bl1_setup.c'. Note that, although the path was
incorrect, it wasn't causing a compilation error because the header
file still got included through an alternative include search path.

Change-Id: I28e4f3dbe50e3550ca6cad186502c88a9fb5e260

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Merge pull request #405 from vwadekar/tlkd-resume-fid-v3

TLKD: pass results with TLK_RESUME_FID function ID

Merge pull request #406 from sandrine-bailleux/sb/cci-init-fix-assertion

Fix debug assertion in deprecated CCI-400 driver

Fix debug assertion in deprecated CCI-400 driver

This patch fixes a copy and paste issue that resulted in the cluster
indexes not being checked as intended. Note that this fix applies to
the depreca

Fix debug assertion in deprecated CCI-400 driver

This patch fixes a copy and paste issue that resulted in the cluster
indexes not being checked as intended. Note that this fix applies to
the deprecated CCI-400 driver, not the unified one.

Change-Id: I497132a91c236690e5eaff908f2db5c8c65e85ab

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TLKD: pass results with TLK_RESUME_FID function ID

TLK sends the "preempted" event to the NS world along with an
identifier for certain use cases. The NS world driver is then
expected to take approp

TLKD: pass results with TLK_RESUME_FID function ID

TLK sends the "preempted" event to the NS world along with an
identifier for certain use cases. The NS world driver is then
expected to take appropriate action depending on the identifier
value. Upon completion, the NS world driver then sends the
results to TLK (via x1-x3) with the TLK_RESUME_FID function ID.

This patch uses the already present code to pass the results
from the NS world to TLK for the TLK_RESUME_FID function ID.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Merge pull request #402 from soby-mathew/sm/psci_cpu_off

PSCI: Update state only if CPU_OFF is not denied by SPD

PSCI: Update state only if CPU_OFF is not denied by SPD

This patch fixes an issue in the PSCI framework where the affinity info
state of a core was being set to OFF even when the SPD had denied the

PSCI: Update state only if CPU_OFF is not denied by SPD

This patch fixes an issue in the PSCI framework where the affinity info
state of a core was being set to OFF even when the SPD had denied the
CPU_OFF request. Now, the state remains set to ON instead.

Fixes ARM-software/tf-issues#323

Change-Id: Ia9042aa41fae574eaa07fd2ce3f50cf8cae1b6fc

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Merge pull request #401 from sandrine-bailleux/sb/fix-sp804-bug-v2

Bug fix in the SP804 dual timer driver

Merge pull request #400 from vwadekar/tlkd-pm-handlers-v5

Send power management events to the Trusted OS (TLK)