| fbab861f | 27-May-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge "feat(smcc): introduce a new vendor_el3 service for ACS SMC handler" into integration |
| e551dbd2 | 15-May-2025 |
Boyan Karatotev <boyan.karatotev@arm.com> |
fix(imx8ulp): fix variable may be used uninitialized error
When building with LTO, the compiler discovers that it is possible to use the `volt` variable without writing to it. This happens when upow
fix(imx8ulp): fix variable may be used uninitialized error
When building with LTO, the compiler discovers that it is possible to use the `volt` variable without writing to it. This happens when upower_pmic_i2c_read() returns error. Check its return value and panic() if something went wrong so the error doesn't propagate silently.
Change-Id: I46d460892a2eb24596373ad7a5b07f730a0753de Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
show more ...
|
| db0d5350 | 15-May-2025 |
Boyan Karatotev <boyan.karatotev@arm.com> |
fix(qemu): fix variable may be used uninitialized error
When building with LTO, the compiler discovers that it is possible to use the `ns_buf_base` variable without writing to it. This happens on er
fix(qemu): fix variable may be used uninitialized error
When building with LTO, the compiler discovers that it is possible to use the `ns_buf_base` variable without writing to it. This happens on error by dt_add_ns_buf_node(). Check its return value and panic() if something went wrong so the error doesn't propagate silently.
Change-Id: Ia6aa83b0b9301b2db7bfa6ecd66396c37a57e816 Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
show more ...
|
| 9fad664e | 18-Mar-2025 |
Olivier Deprez <olivier.deprez@arm.com> |
fix(mhu): shift by minor revision offset
Fix version check in mhu_v3_x_driver_init swapping MHU_ARCH_MINOR_REV_MASK by MHU_ARCH_MINOR_REV_OFF as hinted by coverity:
(1) Event result_independent_of_
fix(mhu): shift by minor revision offset
Fix version check in mhu_v3_x_driver_init swapping MHU_ARCH_MINOR_REV_MASK by MHU_ARCH_MINOR_REV_OFF as hinted by coverity:
(1) Event result_independent_of_operands: "(aidr & (15U /* 0xfU << 0U */)) >> (15U /* 0xfU << 0U */)" is 0 regardless of the values of its operands. This occurs as the operand of assignment.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I4307ae0fdc48831dade983a040671730369377ff
show more ...
|
| fe524532 | 27-May-2025 |
Yann Gautier <yann.gautier@st.com> |
Merge "docs(versal-net): update documentation for SDEI" into integration |
| 0d003ff5 | 26-May-2025 |
Yann Gautier <yann.gautier@st.com> |
Merge "chore(fvp): remove unused macro definition" into integration |
| bc11248a | 26-May-2025 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "xlnx_versal_misra_fixes_series_3" into integration
* changes: fix(xilinx): resolve misra rule 16.3 violations fix(xilinx): resolve misra rule 2.5 violations fix(xilin
Merge changes from topic "xlnx_versal_misra_fixes_series_3" into integration
* changes: fix(xilinx): resolve misra rule 16.3 violations fix(xilinx): resolve misra rule 2.5 violations fix(xilinx): resolve misra rule 4.6 violations fix(xilinx): resolve misra rule 12.2 violations fix(xilinx): resolve misra rule 10.1 violations fix(xilinx): resolve misra rule 8.13 violations fix(xilinx): resolve misra rule 4.5 violations fix(xilinx): resolve misra rule 16.4 violations
show more ...
|
| 236422ad | 26-May-2025 |
Joanna Farley <joanna.farley@arm.com> |
Merge "fix(xilinx): resolve violations generated with IPI_CRC_CHECK enabled" into integration |
| a335cd91 | 22-Apr-2025 |
Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com> |
fix(xilinx): resolve misra rule 16.3 violations
Fixed below MISRA violation: - MISRA Violation: MISRA-C:2012 R.16.3: - An unconditional break statement shall terminate every switch-clause. - Fix:
fix(xilinx): resolve misra rule 16.3 violations
Fixed below MISRA violation: - MISRA Violation: MISRA-C:2012 R.16.3: - An unconditional break statement shall terminate every switch-clause. - Fix: - Added break statement in default clause to comply with MISRA.
Change-Id: Ie1ed38be671d5788096b2addba8e9a8fbcc4f2ec Signed-off-by: Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>
show more ...
|
| 93db9e61 | 16-Apr-2025 |
Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com> |
fix(xilinx): resolve misra rule 2.5 violations
Fixed below MISRA violation: - MISRA Violation: MISRA-C:2012 R.2.5: - A project should not contain unused macro declarations. - Fix: - Removed unus
fix(xilinx): resolve misra rule 2.5 violations
Fixed below MISRA violation: - MISRA Violation: MISRA-C:2012 R.2.5: - A project should not contain unused macro declarations. - Fix: - Removed unused macro declarations.
Change-Id: I2b9deda95d1a3927ab8b4e2c8a41bd85acb62be3 Signed-off-by: Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>
show more ...
|
| 6df7184e | 10-Apr-2025 |
Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com> |
fix(xilinx): resolve misra rule 4.6 violations
Fixed below MISRA violation: - MISRA Violation: MISRA-C:2012 R.4.6: - Typedefs that indicate size and signedness should be used in place of the b
fix(xilinx): resolve misra rule 4.6 violations
Fixed below MISRA violation: - MISRA Violation: MISRA-C:2012 R.4.6: - Typedefs that indicate size and signedness should be used in place of the basic numerical types. - Fix: - Used typedefs that indicate size and signedness in place of basic numerical types and updated return type of function wherever needed.
Change-Id: Ifde2379ee3f9d5ab30ef695d99f59591af575aba Signed-off-by: Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>
show more ...
|
| f78c5970 | 10-Apr-2025 |
Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com> |
fix(xilinx): resolve misra rule 12.2 violations
Fixed below MISRA violation: - MISRA Violation: MISRA-C:2012 R.12.2: - The right hand operand of a shift operator shall lie in the range zero to
fix(xilinx): resolve misra rule 12.2 violations
Fixed below MISRA violation: - MISRA Violation: MISRA-C:2012 R.12.2: - The right hand operand of a shift operator shall lie in the range zero to one less than the width in bits of the essential type of the left hand operand. - Fix: - Type casted left operand to a larger width than shift.
Change-Id: I662ff57e52d1260e2f1a0de595f19a9143714892 Signed-off-by: Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>
show more ...
|
| 7d0eb0e1 | 23-Apr-2025 |
Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com> |
fix(xilinx): resolve violations generated with IPI_CRC_CHECK enabled
Fix below MISRA violations generated with IPI_CRC_CHECK enabled: - MISRA-C rule 8.3 - Made same parameter names in function dec
fix(xilinx): resolve violations generated with IPI_CRC_CHECK enabled
Fix below MISRA violations generated with IPI_CRC_CHECK enabled: - MISRA-C rule 8.3 - Made same parameter names in function declaration and definition. - MISRA-C rule 12.2 - Type casted left operand to a larger width than shift. - MISRA-C rule 15.6 - Added braces for if statements.
Change-Id: I90c5723e77431cc29b9896425ce1be94df44c042 Signed-off-by: Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>
show more ...
|
| c314a0b3 | 09-Apr-2025 |
Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com> |
fix(xilinx): resolve misra rule 10.1 violations
Fixed below MISRA violation: - MISRA Violation: MISRA-C:2012 R.10.1: - Operands shall not be of an inappropriate essential type. - Fix: - Made ope
fix(xilinx): resolve misra rule 10.1 violations
Fixed below MISRA violation: - MISRA Violation: MISRA-C:2012 R.10.1: - Operands shall not be of an inappropriate essential type. - Fix: - Made operands of the same type.
Change-Id: I30a01cc0938603defba7572e9f4dd9ebe6d74a9c Signed-off-by: Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>
show more ...
|
| cd60ab79 | 09-Apr-2025 |
Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com> |
fix(xilinx): resolve misra rule 8.13 violations
Fixed below MISRA violation: - MISRA Violation: MISRA-C:2012 R.8.13: - A pointer should point to a const-qualified type whenever possible. - Fix:
fix(xilinx): resolve misra rule 8.13 violations
Fixed below MISRA violation: - MISRA Violation: MISRA-C:2012 R.8.13: - A pointer should point to a const-qualified type whenever possible. - Fix: - Made constant pointer wherever the object it points to doesn't change.
Change-Id: I16c87dcc2b3a49c70c1e60f25aa361f1f13bda13 Signed-off-by: Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>
show more ...
|
| 2993166d | 09-Apr-2025 |
Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com> |
fix(xilinx): resolve misra rule 4.5 violations
Fixed below MISRA violation: - MISRA Violation: MISRA-C:2012 R.4.5: - Identifiers in the same name space with overlapping visibility should be ty
fix(xilinx): resolve misra rule 4.5 violations
Fixed below MISRA violation: - MISRA Violation: MISRA-C:2012 R.4.5: - Identifiers in the same name space with overlapping visibility should be typographically unambiguous. - Fix: - Renamed PM_RET_ERROR_NOFEATURE to PM_RET_ERROR_IOCTL_NOT_SUPPORTED and removed unnecessary macro definitions.
Change-Id: I6f03e619979685df7418fbccad7b0934d136776e Signed-off-by: Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>
show more ...
|
| ea3ec865 | 09-Apr-2025 |
Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com> |
fix(xilinx): resolve misra rule 16.4 violations
Fixed below MISRA violation: - MISRA Violation: MISRA-C:2012 R.16.4: - Every switch statement shall have a non-empty default label. - Fix: - Modif
fix(xilinx): resolve misra rule 16.4 violations
Fixed below MISRA violation: - MISRA Violation: MISRA-C:2012 R.16.4: - Every switch statement shall have a non-empty default label. - Fix: - Modified logic to comply with MISRA guidelines.
Change-Id: Ifd5f27763481f532affad6eb39ce6319dd6e95fc Signed-off-by: Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>
show more ...
|
| 00669dcd | 14-May-2025 |
Andrei Stefanescu <andrei.stefanescu@nxp.com> |
fix(xlat): change MT_DEVICE to map to nGnRnE
Previously, MT_DEVICE memory was mapped to nGnRE instead of nGnRnE. This could cause issues if a platform with USE_COHERENT_MEM=1 mapped the coherent mem
fix(xlat): change MT_DEVICE to map to nGnRnE
Previously, MT_DEVICE memory was mapped to nGnRE instead of nGnRnE. This could cause issues if a platform with USE_COHERENT_MEM=1 mapped the coherent memory region as MT_DEVICE. A core with stage 1 translation enabled would access the region with the attributes nGnRE and a core with stage 1 disabled would access the region with attributes nGnRnE.
This would result in accesses to a memory location with mismatched memory attributes.
This commit changes MT_DEVICE to nGnRnE. This shouldn't introduce any issues as nGnRnE has stronger ordering requirements.
Change-Id: Idf2e0bbea3ddb5e469a72a41f5fdb71c030d54b8 Signed-off-by: Andrei Stefanescu <andrei.stefanescu@nxp.com>
show more ...
|
| 5be0e225 | 06-May-2025 |
Yidi Lin <yidilin@chromium.org> |
feat(mt8196): add SMMU SID stub implementation
Add stub implementation for SMMU SID driver.
Change-Id: Ia29fd72fb40e7ce372a27a748e0caac3300f045f Signed-off-by: Yidi Lin <yidilin@chromium.org> |
| e86fb819 | 06-May-2025 |
Yidi Lin <yidilin@chromium.org> |
feat(mt8196): add SLBC SiP handler
Add SLBC SiP handler to service MTK_SLBC_KERNEL_OP_CPU_DCC request.
Change-Id: I31b359ceb1faf0401ee34343a8f338d5804d9d68 Signed-off-by: Yidi Lin <yidilin@chromium
feat(mt8196): add SLBC SiP handler
Add SLBC SiP handler to service MTK_SLBC_KERNEL_OP_CPU_DCC request.
Change-Id: I31b359ceb1faf0401ee34343a8f338d5804d9d68 Signed-off-by: Yidi Lin <yidilin@chromium.org>
show more ...
|
| 4488b229 | 06-May-2025 |
Yidi Lin <yidilin@chromium.org> |
feat(mt8196): add CPU QoS stub implementation
Add stub implementation for CPU QoS driver.
Change-Id: I1296aaff34c860ac878ad2ac26b511fb2411510e Signed-off-by: Yidi Lin <yidilin@chromium.org> |
| 00105882 | 28-Apr-2025 |
Yidi Lin <yidilin@chromium.org> |
refactor(mediatek): update EMI stub implementation
Refactor EMI stub implementation with following changes. - Move the SiP call handlers to TF-A upstream. - Move EMI definition used by APUSYS to pla
refactor(mediatek): update EMI stub implementation
Refactor EMI stub implementation with following changes. - Move the SiP call handlers to TF-A upstream. - Move EMI definition used by APUSYS to platform_def.h. - Remove CONFIG_MTK_APUSYS_EMI_SUPPORT.
Change-Id: I30e1ee7f2ea2d6dc3415adba91cbe310af9b5eeb Signed-off-by: Yidi Lin <yidilin@chromium.org>
show more ...
|
| 97881aac | 02-May-2025 |
Yidi Lin <yidilin@chromium.org> |
feat(mediatek): add APIs exposed to the static library
To decrease the static library's dependency on TF-A, add API wrappers for mmap_add_dynamic_region and mmap_remove_dynamic_region. mtk_bl31_map_
feat(mediatek): add APIs exposed to the static library
To decrease the static library's dependency on TF-A, add API wrappers for mmap_add_dynamic_region and mmap_remove_dynamic_region. mtk_bl31_map_to_sip_error is also added for translating mtk_bl31_status codes to their corresponding MKT_SIP_E* error codes.
Change-Id: Ib4a3593ee8b481b076430d054c08f33cc3b2fa08 Signed-off-by: Yidi Lin <yidilin@chromium.org>
show more ...
|
| c33b98d7 | 23-Apr-2025 |
Yidi Lin <yidilin@chromium.org> |
feat(mt8196): add MMinfra support
Add MMinfra support for MT8196.
Change-Id: I5504764d05fecace4f0d3981785ff1bc8ae13d00 Signed-off-by: Yidi Lin <yidilin@chromium.org> |
| 31a69d9a | 30-Apr-2025 |
Yidi Lin <yidilin@chromium.org> |
feat(mt8196): add UFS functions used by the static library
Those functions are used by the static library. To reduce the proprietary code's reliance on other drivers, these functions should be moved
feat(mt8196): add UFS functions used by the static library
Those functions are used by the static library. To reduce the proprietary code's reliance on other drivers, these functions should be moved to the upstream repository.
Change-Id: I6a9430c24bb1f9c1d473b43e65168b620e6bd6b9 Signed-off-by: Yidi Lin <yidilin@chromium.org>
show more ...
|