xref: /rk3399_ARM-atf/plat/mediatek/include/mtk_bl31_interface.h (revision 97881aacebc2bff6b1992b035d986ec2708fe7ec)
1 /*
2  * Copyright (c) 2025, MediaTek Inc. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef __MTK_BL31_INTERFACE_H__
8 #define __MTK_BL31_INTERFACE_H__
9 
10 #include <stdbool.h>
11 #include <stdint.h>
12 
13 enum mtk_bl31_status {
14 	MTK_BL31_STATUS_SUCCESS = 0,
15 	MTK_BL31_STATUS_INVALID_PARAM = -1,
16 	MTK_BL31_STATUS_NOT_SUPPORTED = -2,
17 	MTK_BL31_STATUS_INVALID_RANGE = -3,
18 	MTK_BL31_STATUS_PERMISSION_DENY = -4,
19 	MTK_BL31_STATUS_LOCK_FAIL = -5,
20 };
21 
22 int mtk_bl31_map_to_sip_error(enum mtk_bl31_status status);
23 
24 enum mtk_bl31_memory_type {
25 	MTK_BL31_DEV_RW_SEC = 0,
26 };
27 
28 int mtk_bl31_mmap_add_dynamic_region(unsigned long long base_pa, size_t size,
29 				     enum mtk_bl31_memory_type attr);
30 int mtk_bl31_mmap_remove_dynamic_region(uintptr_t base_va, size_t size);
31 
32 /* UFS definitions */
33 enum ufs_mtk_mphy_op {
34 	UFS_MPHY_BACKUP = 0,
35 	UFS_MPHY_RESTORE,
36 };
37 
38 enum ufs_notify_change_status {
39 	PRE_CHANGE,
40 	POST_CHANGE,
41 };
42 
43 /* UFS interfaces */
44 void ufs_mphy_va09_cg_ctrl(bool enable);
45 void ufs_device_reset_ctrl(bool rst_n);
46 void ufs_crypto_hie_init(void);
47 void ufs_ref_clk_status(uint32_t on, enum ufs_notify_change_status stage);
48 void ufs_sram_pwr_ctrl(bool on);
49 void ufs_device_pwr_ctrl(bool vcc_on, uint64_t ufs_version);
50 void ufs_mphy_ctrl(enum ufs_mtk_mphy_op op);
51 void ufs_mtcmos_ctrl(bool on);
52 
53 /* UFS functions implemented in the public ATF repo */
54 int ufs_rsc_ctrl_mem(bool hold);
55 int ufs_rsc_ctrl_pmic(bool hold);
56 void ufs_device_pwr_ctrl_soc(bool vcc_on, uint64_t ufs_version);
57 int ufs_spm_mtcmos_power(bool on);
58 int ufs_phy_spm_mtcmos_power(bool on);
59 bool ufs_is_clk_status_off(void);
60 void ufs_set_clk_status(bool on);
61 
62 #endif /* __MTK_BL31_INTERFACE_H__ */
63