feat(mediatek): add APIs exposed to the static library

To decrease the static library's dependency on TF-A, add API wrappers
for mmap_add_dynamic_region and mmap_remove_dynamic_region.
mtk_bl31_map_

feat(mediatek): add APIs exposed to the static library

To decrease the static library's dependency on TF-A, add API wrappers
for mmap_add_dynamic_region and mmap_remove_dynamic_region.
mtk_bl31_map_to_sip_error is also added for translating mtk_bl31_status
codes to their corresponding MKT_SIP_E* error codes.

Change-Id: Ib4a3593ee8b481b076430d054c08f33cc3b2fa08
Signed-off-by: Yidi Lin <yidilin@chromium.org>

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feat(mt8196): add MMinfra support

Add MMinfra support for MT8196.

Change-Id: I5504764d05fecace4f0d3981785ff1bc8ae13d00
Signed-off-by: Yidi Lin <yidilin@chromium.org>

feat(mt8196): add UFS functions used by the static library

Those functions are used by the static library. To reduce the
proprietary code's reliance on other drivers, these functions should be
moved

feat(mt8196): add UFS functions used by the static library

Those functions are used by the static library. To reduce the
proprietary code's reliance on other drivers, these functions should be
moved to the upstream repository.

Change-Id: I6a9430c24bb1f9c1d473b43e65168b620e6bd6b9
Signed-off-by: Yidi Lin <yidilin@chromium.org>

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Merge "docs: remove Chris from LTS maintainers" into integration

Merge "docs(changelog): changelog for v2.13 release" into integration

Merge "fix(fvp): increase EventLog size for OP-TEE with multiple SPs" into integration

docs: remove Chris from LTS maintainers

Change-Id: If371cd2e9ef3383702d23456cb73ff1194f95e80
Signed-off-by: Chris Palmer <palmer@google.com>

docs(changelog): changelog for v2.13 release

Generated this change-log using below command:
npm run release -- --skip.commit --skip.tag --release-as 2.13.0

Change-Id: Ibb0623f04c641b65a03deaffd50a5

docs(changelog): changelog for v2.13 release

Generated this change-log using below command:
npm run release -- --skip.commit --skip.tag --release-as 2.13.0

Change-Id: Ibb0623f04c641b65a03deaffd50a5a8b65637419
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

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fix(fvp): increase EventLog size for OP-TEE with multiple SPs

When OP-TEE runs with multiple Secure Partitions (SPs), a larger
EventLog size is required to accommodate the additional measurements.
T

fix(fvp): increase EventLog size for OP-TEE with multiple SPs

When OP-TEE runs with multiple Secure Partitions (SPs), a larger
EventLog size is required to accommodate the additional measurements.
This patch updates the configuration to allocate sufficient memory
in such cases.

In the future, the Maximum EventLog size should be calculated based
on the maximum number of images loaded by BL2. That enhancement can
be addressed in a separate patch.

Change-Id: Ibd9bed0a5b1029158142711fd08809729dd05b08
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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fix(intel): support SMC 64bit return args in SiPSVC V3

Update SiPSVC V3 framework to support 64bit SMC return
arguments and other miscellaneous debug prints.

Change-Id: I659a0aea8e24eb5876e69327e44

fix(intel): support SMC 64bit return args in SiPSVC V3

Update SiPSVC V3 framework to support 64bit SMC return
arguments and other miscellaneous debug prints.

Change-Id: I659a0aea8e24eb5876e69327e44a667d2a54c241
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@altera.com>

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fix(intel): verify data size in AES GCM and GCM-GHASH modes

On the Agilex5 platform, in the FCS AES GCM and GCM-GHASH
modes enc/dec data size should be 0 or multiple of 16bytes.

Change-Id: I23e51bf

fix(intel): verify data size in AES GCM and GCM-GHASH modes

On the Agilex5 platform, in the FCS AES GCM and GCM-GHASH
modes enc/dec data size should be 0 or multiple of 16bytes.

Change-Id: I23e51bf942771e74d16f8a87fbfdbf36ef3c3893
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@altera.com>

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fix(intel): update FCS AES method for GCM block modes

On the Agilex5 platform, AES enc/dec with GCM and GCM-GHASH
modes, the source and destination size should be in multiples
of 16 bytes. For other

fix(intel): update FCS AES method for GCM block modes

On the Agilex5 platform, AES enc/dec with GCM and GCM-GHASH
modes, the source and destination size should be in multiples
of 16 bytes. For other platforms and other modes, it should
be in multiples of 32 bytes.

Change-Id: I0fa9adafb5d7fc4c794a4acb9339cf8259df0c78
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@altera.com>

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fix(intel): update initialization to prevent warnings message

This patch is used to solve TF-A build warning with build option
ENABLE_LTO=1

Change-Id: Id427e9d6f96e21fc132fb5af60e9499e1bbecea3
Sign

fix(intel): update initialization to prevent warnings message

This patch is used to solve TF-A build warning with build option
ENABLE_LTO=1

Change-Id: Id427e9d6f96e21fc132fb5af60e9499e1bbecea3
Signed-off-by: Jit Loon Lim <jit.loon.lim@altera.com>

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feat(intel): update CPUECTLR_EL1 to boost ethernet performance

This patch is the workaround for Agilex5 Ethernet for performance
boost.

Change-Id: I702f0cb0beff8b3ea119205ec41dd4e825e9126b
Signed-o

feat(intel): update CPUECTLR_EL1 to boost ethernet performance

This patch is the workaround for Agilex5 Ethernet for performance
boost.

Change-Id: I702f0cb0beff8b3ea119205ec41dd4e825e9126b
Signed-off-by: Jit Loon Lim <jit.loon.lim@altera.com>

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Merge "docs(changelog): add missing scopes" into integration

fix(allwinner): fix variable may be used uninitialized error

When building with LTO, the compiler observes that i2c_read() can return
without writing val, declaring the variable may be used unnitial

fix(allwinner): fix variable may be used uninitialized error

When building with LTO, the compiler observes that i2c_read() can return
without writing val, declaring the variable may be used unnitialized.
However, there is a sufficient error check that will prevent an actual
use. So calm the compiler by giving a safe default.

Change-Id: I558618467ae324a6b5b495ec9d204935135f226d
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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fix(lx2160): set snoop-delayed exclusive handling on A72 cores

Snoop requests should not be responded to during atomic operations. This
can be handled by the interconnect using its global monitor or

fix(lx2160): set snoop-delayed exclusive handling on A72 cores

Snoop requests should not be responded to during atomic operations. This
can be handled by the interconnect using its global monitor or by the
core's SCU delaying to check for the corresponding atomic monitor state.

Similar to commit 5668db72b ("feat(ti): set snoop-delayed exclusive
handling on A72 cores") enable the snoop-delayed exclusive handling
bit to inform the core it needs to delay responses to perform this check.

Change-Id: I984f3d08b7a608f59f38e01461aeb448f2ef5af1
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>

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docs(changelog): add missing scopes

Add missing platform scopes, this is based on contribution to platform
since 2.12.0 release.

Also update deprecation list with incorrect/invalid scopes used sinc

docs(changelog): add missing scopes

Add missing platform scopes, this is based on contribution to platform
since 2.12.0 release.

Also update deprecation list with incorrect/invalid scopes used since
last release to avoid future usage.

Change-Id: I852da1c91669079eb7fc3fdfe1e4f7ae602d46cf
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

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feat(mt8189): add IOMMU enable control in SiP service

Add SiP service for multimedia & infra master to enable/disable
MM & INFRA IOMMU in secure world

Signed-off-by: Friday Yang <friday.yang@mediat

feat(mt8189): add IOMMU enable control in SiP service

Add SiP service for multimedia & infra master to enable/disable
MM & INFRA IOMMU in secure world

Signed-off-by: Friday Yang <friday.yang@mediatek.corp-partner.google.com>
Change-Id: I90b4843731968671b89e3062872e1cd9aec52370

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Merge "docs(changelog): add vendor subsections for FDTs" into integration

Merge "docs(juno): revert SCP version for Juno to 2.14.0" into integration

docs(juno): revert SCP version for Juno to 2.14.0

Updated the Juno platform documentation to reflect testing with SCP
version 2.14.0 instead of 2.15.0. The version used in testing was
reverted in [1

docs(juno): revert SCP version for Juno to 2.14.0

Updated the Juno platform documentation to reflect testing with SCP
version 2.14.0 instead of 2.15.0. The version used in testing was
reverted in [1] due to instability in the tftf-manual-reboot tests
caused by upgrading to v2.15 and v2.16.

[1] https://review.trustedfirmware.org/c/ci/tf-a-ci-scripts/+/37997

Change-Id: I48c2b51a33950ad096e021d7bdd9cdb6a1303f8c
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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docs(changelog): add vendor subsections for FDTs

To ease sorting fdts patches in changelog, add platform vendor
subsections. There is no dedicated scope.

Signed-off-by: Yann Gautier <yann.gautier@s

docs(changelog): add vendor subsections for FDTs

To ease sorting fdts patches in changelog, add platform vendor
subsections. There is no dedicated scope.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I4dea2e81cf3f7a970a8531d542d7fe15a99656e5

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Merge changes I16ebfde5,I88da6fcc,I332f8504 into integration

* changes:
docs(n1sdp): update PSCI instrumentation data
docs(juno): update PSCI instrumentation data
fix(docs): update the instrum

Merge changes I16ebfde5,I88da6fcc,I332f8504 into integration

* changes:
docs(n1sdp): update PSCI instrumentation data
docs(juno): update PSCI instrumentation data
fix(docs): update the instrumentation procedure

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fix(lx2160): add DDRC missing DIMMs

LX2160a has 2 DDRC. Let's assume 2 DIMMs.

Without such modification, only half of the memory if available on the
board.

Inspired from plat/nxp/soc-lx2160a/lx216

fix(lx2160): add DDRC missing DIMMs

LX2160a has 2 DDRC. Let's assume 2 DIMMs.

Without such modification, only half of the memory if available on the
board.

Inspired from plat/nxp/soc-lx2160a/lx2160ardb/platform.mk

Change-Id: Iea4c11de104a2999fdff0da7f8e7a3baada0fd3d
Signed-off-by: Vincent Jardin <vjardin@free.fr>

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