| c9e40ec5 | 31-May-2019 |
Paul Beesley <paul.beesley@arm.com> |
Merge changes from topic "jts/docs" into integration
* changes: Removing IRC related info from the documentation Further fixes to documentation links |
| 008c843c | 31-May-2019 |
John Tsichritzis <john.tsichritzis@arm.com> |
Removing IRC related info from the documentation
Change-Id: I5cf8c70a304bf5869cbeb12fa8d39171cff48ebd Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com> |
| e9eed3f1 | 30-May-2019 |
Paul Beesley <paul.beesley@arm.com> |
Merge "rockchip: drop rockchip-specific imported linker symbols for bl31" into integration |
| c4e4df35 | 17-May-2019 |
Paul Beesley <paul.beesley@arm.com> |
doc: Enable automatic labels for page titles
Automatic labelling of document titles is a prerequisite for converting the format of cross-document links. Sphinx will generate (via the enabled extensi
doc: Enable automatic labels for page titles
Automatic labelling of document titles is a prerequisite for converting the format of cross-document links. Sphinx will generate (via the enabled extension) a hidden link target for each document title and this can be referred to later, from another page, to link to the target.
The plugin options being used require Sphinx >= 2.0.0 so a requirements.txt file has been added. This file is used with the pip package manager for Python so that the correct dependencies are installed.
Change-Id: Ic2049db5804aa4a6447608ba4299de958ce0a87d Signed-off-by: Paul Beesley <paul.beesley@arm.com>
show more ...
|
| f6ad51c8 | 28-May-2019 |
John Tsichritzis <john.tsichritzis@arm.com> |
Further fixes to documentation links
Change-Id: Ib021c721652d96f6c06ea18741f19a72bba1d00f Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com> |
| 84167417 | 29-May-2019 |
Paul Beesley <paul.beesley@arm.com> |
Merge "Cortex-A55: workarounds for errata 1221012" into integration |
| 3e6945e9 | 29-May-2019 |
Heiko Stuebner <heiko@sntech.de> |
rockchip: drop rockchip-specific imported linker symbols for bl31
In the rockchip bl31 setup the __RO_START__ and __RO_END__ symbols are currently imported into special BL31_RO_* constants while the
rockchip: drop rockchip-specific imported linker symbols for bl31
In the rockchip bl31 setup the __RO_START__ and __RO_END__ symbols are currently imported into special BL31_RO_* constants while the general code also imports them as BL_CODE_BASE and BL_CODE_END.
So we can just use the general symbols and can drop the duplication.
Signed-off-by: Heiko Stuebner <heiko@sntech.de> Change-Id: Ibf1b48ad80bed897247a1690a32711030479262d
show more ...
|
| 5a408104 | 29-May-2019 |
Paul Beesley <paul.beesley@arm.com> |
Merge "Beautify "make help"" into integration |
| bac571ac | 29-May-2019 |
Paul Beesley <paul.beesley@arm.com> |
Merge "Makefile: Add default warning flags" into integration |
| 9af07df0 | 28-May-2019 |
Ambroise Vincent <ambroise.vincent@arm.com> |
Cortex-A55: workarounds for errata 1221012
The workaround is added to the Cortex-A55 cpu specific file. The workaround is disabled by default and have to be explicitly enabled by the platform integr
Cortex-A55: workarounds for errata 1221012
The workaround is added to the Cortex-A55 cpu specific file. The workaround is disabled by default and have to be explicitly enabled by the platform integrator.
Change-Id: I3e6fd10df6444122a8ee7d08058946ff1cc912f8 Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
show more ...
|
| 4d384eb4 | 28-May-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge "plat: imx8m: Add the aipstz init to config peripheral access" into integration |
| 68b8ab0b | 28-May-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge changes from topic "for-upstream" into integration
* changes: ti: k3: common: Set L2 latency on A72 cores ti: k3: common: Add support for J721E |
| 89a4d269 | 28-May-2019 |
John Tsichritzis <john.tsichritzis@arm.com> |
Merge "Fix documentation links" into integration |
| 566d15e8 | 28-May-2019 |
John Tsichritzis <john.tsichritzis@arm.com> |
Fix documentation links
Change-Id: Ic09e74f22b43fba51ee17cd02b5e1dc5d8e0bb63 Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com> |
| 508a48bb | 24-May-2019 |
Paul Beesley <paul.beesley@arm.com> |
Merge "Add support for Branch Target Identification" into integration |
| c0e9d433 | 24-May-2019 |
Paul Beesley <paul.beesley@arm.com> |
Merge changes from topic "jts/docs" into integration
* changes: Docs fixes Update security documentation |
| 9fc59639 | 24-May-2019 |
Alexei Fedorov <Alexei.Fedorov@arm.com> |
Add support for Branch Target Identification
This patch adds the functionality needed for platforms to provide Branch Target Identification (BTI) extension, introduced to AArch64 in Armv8.5-A by add
Add support for Branch Target Identification
This patch adds the functionality needed for platforms to provide Branch Target Identification (BTI) extension, introduced to AArch64 in Armv8.5-A by adding BTI instruction used to mark valid targets for indirect branches. The patch sets new GP bit [50] to the stage 1 Translation Table Block and Page entries to denote guarded EL3 code pages which will cause processor to trap instructions in protected pages trying to perform an indirect branch to any instruction other than BTI. BTI feature is selected by BRANCH_PROTECTION option which supersedes the previous ENABLE_PAUTH used for Armv8.3-A Pointer Authentication and is disabled by default. Enabling BTI requires compiler support and was tested with GCC versions 9.0.0, 9.0.1 and 10.0.0. The assembly macros and helpers are modified to accommodate the BTI instruction. This is an experimental feature. Note. The previous ENABLE_PAUTH build option to enable PAuth in EL3 is now made as an internal flag and BRANCH_PROTECTION flag should be used instead to enable Pointer Authentication. Note. USE_LIBROM=1 option is currently not supported.
Change-Id: Ifaf4438609b16647dc79468b70cd1f47a623362e Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
show more ...
|
| 00296576 | 24-May-2019 |
Ambroise Vincent <ambroise.vincent@arm.com> |
Makefile: Add default warning flags
The flags are taken from the different warning levels of the build system when they do not generate any error with the current upstreamed platforms.
Change-Id: I
Makefile: Add default warning flags
The flags are taken from the different warning levels of the build system when they do not generate any error with the current upstreamed platforms.
Change-Id: Ia70cff83bedefb6d2f0dd266394ef77fe47e7f65 Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
show more ...
|
| a16fd37f | 24-May-2019 |
John Tsichritzis <john.tsichritzis@arm.com> |
Docs fixes
1) Fix links in "about" page 2) Put back the "contents" page with adjusted links
Change-Id: Id09140b91df5cf0a275149801d05d8cfeeda1c6e Signed-off-by: John Tsichritzis <john.tsichritzis@ar
Docs fixes
1) Fix links in "about" page 2) Put back the "contents" page with adjusted links
Change-Id: Id09140b91df5cf0a275149801d05d8cfeeda1c6e Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
show more ...
|
| 55f14059 | 21-May-2019 |
John Tsichritzis <john.tsichritzis@arm.com> |
Update security documentation
1) Replace references to "Arm Trusted Firmware" with "TF-A" 2) Update issue tracker link
Change-Id: I12d827d49f6cc34e46936d7f7ccf44e32b26a0bd Signed-off-by: John Tsich
Update security documentation
1) Replace references to "Arm Trusted Firmware" with "TF-A" 2) Update issue tracker link
Change-Id: I12d827d49f6cc34e46936d7f7ccf44e32b26a0bd Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
show more ...
|
| bbb24f61 | 21-May-2019 |
John Tsichritzis <john.tsichritzis@arm.com> |
Introduce BTI support in ROMLIB
When TF-A is compiled with BTI enabled, the branches in the ROMLIB jumptable must be preceded by a "bti j" instruction.
Moreover, when the additional "bti" instructi
Introduce BTI support in ROMLIB
When TF-A is compiled with BTI enabled, the branches in the ROMLIB jumptable must be preceded by a "bti j" instruction.
Moreover, when the additional "bti" instruction is inserted, the jumptable entries have a distance of 8 bytes between them instead of 4. Hence, the wrappers are also modified accordinly.
If TF-A is compiled without BTI enabled, the ROMLIB jumptable and wrappers are generated as before.
Change-Id: Iaa59897668f8e59888d39046233300c2241d8de7 Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
show more ...
|
| 7c23126c | 21-May-2019 |
John Tsichritzis <john.tsichritzis@arm.com> |
Beautify "make help"
Changes to make the help text a bit more readable: 1) The "usage" part is now a one-liner 2) The supported platforms list is printed separately
Change-Id: I93e48a6cf1d28f0ef9f3
Beautify "make help"
Changes to make the help text a bit more readable: 1) The "usage" part is now a one-liner 2) The supported platforms list is printed separately
Change-Id: I93e48a6cf1d28f0ef9f3db16ce17725e4dff33c9 Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
show more ...
|
| 570948d3 | 23-May-2019 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "plat/meson/gxl: BL31: remove BL2 dependency" into integration |
| ced17112 | 23-May-2019 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "pb/sphinx-doc" into integration
* changes: doc: Use proper note and warning annotations doc: Refactor contributor acknowledgements doc: Reorganise images and update l
Merge changes from topic "pb/sphinx-doc" into integration
* changes: doc: Use proper note and warning annotations doc: Refactor contributor acknowledgements doc: Reorganise images and update links doc: Set correct syntax highlighting style doc: Add minimal glossary doc: Remove per-page contents lists doc: Make checkpatch ignore rst files doc: Format security advisory titles and headings doc: Reformat platform port documents doc: Normalise section numbering and headings doc: Reword document titles
show more ...
|
| 1665bcd0 | 23-May-2019 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "drivers: scmi: scmi_sq: Modify wrong payload length" into integration |