| d90bb650 | 23-Jun-2025 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "build(handoff)!: switch to LibTL submodule" into integration |
| 9e7679ed | 23-Jun-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge "feat(tc): add support for configuring DSU settings" into integration |
| 0f39b7e6 | 23-Jun-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge "fix(nxp-crypto): restricts generating nxp_mkvb via ns-world" into integration |
| 51dbe464 | 23-Jun-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge "fix(sptool): handle load-address-relative-offset property" into integration |
| 4c3bd4a4 | 23-Jun-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge "docs(interrupt): corrected func name in interrupt-framework-design" into integration |
| fd4e6026 | 14-May-2025 |
Arvind Ram Prakash <arvind.ramprakash@arm.com> |
feat(tc): add support for configuring DSU settings
This patch allows tc platforms to update DSU CLUSTERPWRDN_EL1 and CLUSTERPWRCTLR_EL1 settings. TC22 and TC23 use the DSU-120. Currently we use the
feat(tc): add support for configuring DSU settings
This patch allows tc platforms to update DSU CLUSTERPWRDN_EL1 and CLUSTERPWRCTLR_EL1 settings. TC22 and TC23 use the DSU-120. Currently we use the reset values as default settings as per the DSU-120 TRM.
Reference: https://developer.arm.com/documentation/102547/0201
Change-Id: I48e0b5bd5881612e9b8b804948260f69c25c34d9 Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
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| f8901e38 | 23-Jun-2025 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "feat(dsu): support power control and autonomous powerdown config" into integration |
| 29ef8d7e | 23-Jun-2025 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "xlnx_fix_gen_op_datatype" into integration
* changes: fix(services): typecast operands to match data type fix(psci): typecast operands to match data type fix(common):
Merge changes from topic "xlnx_fix_gen_op_datatype" into integration
* changes: fix(services): typecast operands to match data type fix(psci): typecast operands to match data type fix(common): typecast operands to match data type fix(arm-drivers): typecast operands to match data type fix(bl31): typecast operands to match data type
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| d16ad813 | 24-Apr-2024 |
Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com> |
fix(services): typecast operands to match data type
This corrects the MISRA violation C2012-10.3: The value of an expression shall not be assigned to an object with a narrower essential type or of a
fix(services): typecast operands to match data type
This corrects the MISRA violation C2012-10.3: The value of an expression shall not be assigned to an object with a narrower essential type or of a different essential type category. The condition is explicitly checked against 0U, appending 'U' and typecasting for unsigned comparison.
Change-Id: I202cff6a02554fc15965c3906bbb81db97c01d18 Signed-off-by: Nithin G <nithing@amd.com> Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
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| f6166f7f | 24-Apr-2024 |
Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com> |
fix(psci): typecast operands to match data type
This corrects the MISRA violation C2012-10.3: The value of an expression shall not be assigned to an object with a narrower essential type or of a dif
fix(psci): typecast operands to match data type
This corrects the MISRA violation C2012-10.3: The value of an expression shall not be assigned to an object with a narrower essential type or of a different essential type category. The condition is explicitly checked against 0U, appending 'U' and typecasting for unsigned comparison.
Change-Id: Ic4a109cb55fdf9b60c8d26df68f61811b59a1a9f Signed-off-by: Nithin G <nithing@amd.com> Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
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| f3ecd836 | 24-Apr-2024 |
Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com> |
fix(common): typecast operands to match data type
This corrects the MISRA violation C2012-10.3: The value of an expression shall not be assigned to an object with a narrower essential type or of a d
fix(common): typecast operands to match data type
This corrects the MISRA violation C2012-10.3: The value of an expression shall not be assigned to an object with a narrower essential type or of a different essential type category. The condition is explicitly checked against 0U, appending 'U' and typecasting for unsigned comparison.
Change-Id: I350ba1dfd1af872c6d237aa7b46221fc10a2ef67 Signed-off-by: Nithin G <nithing@amd.com> Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
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| 0cd8e55f | 24-Apr-2024 |
Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com> |
fix(arm-drivers): typecast operands to match data type
This corrects the MISRA violation C2012-10.3: The value of an expression shall not be assigned to an object with a narrower essential type or o
fix(arm-drivers): typecast operands to match data type
This corrects the MISRA violation C2012-10.3: The value of an expression shall not be assigned to an object with a narrower essential type or of a different essential type category. The condition is explicitly checked against 0U, appending 'U' and typecasting for unsigned comparison.
Change-Id: I6464ba742af81a2fffe9782d032275486d32f3a1 Signed-off-by: Nithin G <nithing@amd.com> Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
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| 2fa4dee6 | 24-Apr-2024 |
Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com> |
fix(bl31): typecast operands to match data type
This corrects the MISRA violation C2012-10.3: The value of an expression shall not be assigned to an object with a narrower essential type or of a dif
fix(bl31): typecast operands to match data type
This corrects the MISRA violation C2012-10.3: The value of an expression shall not be assigned to an object with a narrower essential type or of a different essential type category. The condition is explicitly checked against 0U, appending 'U' and typecasting for unsigned comparison.
Change-Id: I36d794f7134f4432bd8249e3fe347727819e335d Signed-off-by: Nithin G <nithing@amd.com> Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
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| 5d772a44 | 23-Jun-2025 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes Iea4c11de,Icae1fb08 into integration
* changes: fix(lx2160): add DDRC missing DIMMs fix(nxp): driver crypto caam |
| 66a7f2a6 | 23-Jun-2025 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(libc): replace true-false with explicit comparisons" into integration |
| 66dec05e | 22-Mar-2025 |
lianghong.liu <lianghong01.liu@horizon.auto> |
docs(interrupt): corrected func name in interrupt-framework-design
This change corrected the function name of determining the type of interrupt.
Change-Id: I88f2464eb16cebc05549267fea5380d0b83feb66
docs(interrupt): corrected func name in interrupt-framework-design
This change corrected the function name of determining the type of interrupt.
Change-Id: I88f2464eb16cebc05549267fea5380d0b83feb66 Signed-off-by: lianghong.liu <lianghong01.liu@horizon.auto>
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| d52ff2b3 | 07-May-2025 |
Arvind Ram Prakash <arvind.ramprakash@arm.com> |
feat(dsu): support power control and autonomous powerdown config
This patch allows platforms to enable certain DSU settings to ensure memory retention and control over cache power requests. We also
feat(dsu): support power control and autonomous powerdown config
This patch allows platforms to enable certain DSU settings to ensure memory retention and control over cache power requests. We also move the driver out of css into drivers/arm. Platforms can configure the CLUSTERPWRCTLR and CLUSTERPWRDN registers [1] to improve power efficiency.
These registers enable finer-grained control of DSU power state transitions, including powerdown and retention.
IMP_CLUSTERPWRCTLR_EL1 provides: - Functional retention: Allows configuration of the duration of inactivity before the DSU uses CLUSTERPACTIVE to request functional retention.
- Cache power request: These bits are output on CLUSTERPACTIVE[19:16] to indicate to the power controller which cache portions must remain powered.
IMP_CLUSTERPWRDN_EL1 includes: - Powerdown: Triggers full cluster powerdown, including control logic.
- Memory retention: Requests memory retention mode, keeping L3 RAM contents while powering off the rest of the DSU.
The DSU-120 TRM [2] provides the full field definitions, which are used as references in the `dsu_driver_data` structure.
References: [1]: https://developer.arm.com/documentation/100453/latest/ [2]: https://developer.arm.com/documentation/102547/0201/?lang=en
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com> Change-Id: I2eba808b8f2a27797782a333c65dd092b03208fe
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| b5d0740e | 13-May-2025 |
Harrison Mutai <harrison.mutai@arm.com> |
build(handoff)!: switch to LibTL submodule
Removes in-tree Transfer List implementation and updates all references to use the external LibTL submodule. Updates include paths, Makefile macros, and pl
build(handoff)!: switch to LibTL submodule
Removes in-tree Transfer List implementation and updates all references to use the external LibTL submodule. Updates include paths, Makefile macros, and platform integration logic to link with LibTL as a static library.
If you cloned TF-A without the `--recurse-submodules` flag, you can ensure that this submodule is present by running:
git submodule update --init --recursive
BREAKING-CHANGE: LibTL is now included in TF-A as a submodule. Please run `git submodule update --init --recursive` if you encounter issues after migrating to the latest version of TF-A.
Change-Id: I1fa31f7b730066c27985d968698e553b00b07c38 Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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| 711f42b2 | 20-Jun-2025 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "mb/lfa-core-work" into integration
* changes: docs(maintainers): add myself as code owner for LFA service docs(lfa): update porting guide with LFA platform APIs feat(
Merge changes from topic "mb/lfa-core-work" into integration
* changes: docs(maintainers): add myself as code owner for LFA service docs(lfa): update porting guide with LFA platform APIs feat(lfa): add LFA holding pen logic feat(lfa): add initial implementation for LFA_ACTIVATE feat(lfa): add initial implementation for LFA_PRIME feat(fvp): implement platform API for load and auth image feat(lfa): implement LFA_CANCEL SMC feat(fvp): implement platform API for LFA cancel operation feat(lfa): implement LFA_GET_INVENTORY SMC feat(fvp): implement platform API for LFA activation pending check feat(lfa): implement LFA_GET_INFO SMC and integrate LFA build feat(fvp): initialize LFA component activators in platform layer feat(rmm): add placeholder activator callbacks for LFA feat(bl31): add placeholder activator implementation for LFA feat(lfa): add activation handler interface for component activation feat(fvp): implement LFA get components API feat(lfa): create LFA SMC handler template
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| 38bfb44c | 20-Jun-2025 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "fix(imx8mp): remove ERR050463 VPUMIX workaround" into integration |
| d0ce1ac5 | 20-Jun-2025 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "s32g274a/sd_support" into integration
* changes: feat(s32g274a): move fip in a dedicated partition feat(s32g274ardb): initialize the IO buffer feat(s32g274ardb): init
Merge changes from topic "s32g274a/sd_support" into integration
* changes: feat(s32g274a): move fip in a dedicated partition feat(s32g274ardb): initialize the IO buffer feat(s32g274ardb): initialize the uSDHC driver feat(s32g274ardb): set the system counter rate feat(s32g274ardb): init the generic timer for BL2 fix(nxp-mmc): handle response for CMD0 refactor(mmc): replace 0 with MMC_RESPONSE_NONE feat(mmc): add define for no response
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| d2eba0f8 | 04-Jun-2025 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
docs(maintainers): add myself as code owner for LFA service
Add myself as a maintainer for the LFA service to reflect current ownership and contribution responsibilities.
Change-Id: I11971dfc300eee
docs(maintainers): add myself as code owner for LFA service
Add myself as a maintainer for the LFA service to reflect current ownership and contribution responsibilities.
Change-Id: I11971dfc300eee978c29e91264b5f7f2ee96ee30 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| b30eb04b | 15-Apr-2025 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
docs(lfa): update porting guide with LFA platform APIs
Add details about the LFA platform APIs to the porting guide, providing guidance on their usage and integration.
Change-Id: I3888c88ac64934217
docs(lfa): update porting guide with LFA platform APIs
Add details about the LFA platform APIs to the porting guide, providing guidance on their usage and integration.
Change-Id: I3888c88ac649342172332b02b3e685df1e833b97 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| ff7daec6 | 15-Apr-2025 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
feat(lfa): add LFA holding pen logic
Add LFA holding logic to be used by the LFA activate SMC call to manage CPU rendezvous. All CPUs are expected to invoke the LFA activate call for the rendezvous,
feat(lfa): add LFA holding pen logic
Add LFA holding logic to be used by the LFA activate SMC call to manage CPU rendezvous. All CPUs are expected to invoke the LFA activate call for the rendezvous, until then, they will remain on a holding lock. When the final CPU calls LFA activate, it will release the holding lock after completing the activation process on that CPU, allowing the activation process on secondary CPUs to proceed.
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: Iff9e40dd87420245fe5844e286d0685c1f0db289
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| 07de22d2 | 16-May-2025 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
feat(lfa): add initial implementation for LFA_ACTIVATE
This patch introduces the overall handling of the LFA_ACTIVATE call, including input validation and invocation flow. While this covers the core
feat(lfa): add initial implementation for LFA_ACTIVATE
This patch introduces the overall handling of the LFA_ACTIVATE call, including input validation and invocation flow. While this covers the core implementation, per-component-specific handling will be developed in a separate patch. The respective component callbacks are invoked as part of this logic.
Change-Id: Ie9d4584fc0c0abc9a9faffed62165b4461efed3a Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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