Merge changes I70b68b06,I7b180c3e,Id4ad925d,Ie31933e0,Ie8fe1f1d, ... into integration

* changes:
refactor(tc): rename TC_FPGA_ANDROID_IMG_IN_RAM
fix(tc): modify ethernet configuration for TC4 FP

Merge changes I70b68b06,I7b180c3e,Id4ad925d,Ie31933e0,Ie8fe1f1d, ... into integration

* changes:
refactor(tc): rename TC_FPGA_ANDROID_IMG_IN_RAM
fix(tc): modify ethernet configuration for TC4 FPGA
fix(tc): modify gpio controller base addr for TC4 FPGA
fix(tc): modify DPU configuration in dts for TC4 FPGA
fix(tc): modify mmc configuration for TC4 FPGA
feat(tc): configure UART for TC4 FPGA

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feat(mt8196): add vcore dvfs drivers

- VCORE DVFS is the feature to change VCORE/DDR Freq for power saving
- When there are no requests for using Vcore/DRAM, Vcore DVFS will
- lower the voltage and

feat(mt8196): add vcore dvfs drivers

- VCORE DVFS is the feature to change VCORE/DDR Freq for power saving
- When there are no requests for using Vcore/DRAM, Vcore DVFS will
- lower the voltage and frequency of Vcore/DRAM to achieve power saving.

Signed-off-by: Kunlong Wang <kunlong.wang@mediatek.com>
Change-Id: I1126311e8b3943cc54fb13e15973b9e1b74c129e

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feat(mt8196): add LPM v2 support

LPM means low power module, it will connect idle and SPM to achieve
lower power consumption in some scenarios, and this patch is LPM
second version

Signed-off-by: W

feat(mt8196): add LPM v2 support

LPM means low power module, it will connect idle and SPM to achieve
lower power consumption in some scenarios, and this patch is LPM
second version

Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.corp-partner.google.com>
Change-Id: I6ae5b5b4c2056d08c29efab5116be3a92351d8f1

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feat(mt8196): add SPM common version support

This patch provides common APIs for communication with other subsystems
as well as common APIs for collecting the clock and power status of
each subsyste

feat(mt8196): add SPM common version support

This patch provides common APIs for communication with other subsystems
as well as common APIs for collecting the clock and power status of
each subsystem.

Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.com>
Change-Id: I1b907256f53578a58d74d66beec7140edf41f687

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feat(mt8196): add SPM common driver support

This patch mainly initializes the SPM and provides common APIs for SPM
to enable the use of its various features.

Signed-off-by: Wenzhen Yu <wenzhen.yu@m

feat(mt8196): add SPM common driver support

This patch mainly initializes the SPM and provides common APIs for SPM
to enable the use of its various features.

Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.com>
Change-Id: I9facb6bf9962bb2d5fcacd945846bfaeb4c87a55

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feat(mt8196): add SPM basic features support

This patch mainly collects and organizes SPM state information to
facilitate debugging when issues arise.

Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek

feat(mt8196): add SPM basic features support

This patch mainly collects and organizes SPM state information to
facilitate debugging when issues arise.

Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.com>
Change-Id: Ie51cffeb1d683d65d88701fc63c426b20b22492f

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feat(mt8196): add SPM features support

When the system is in idle or suspend state, SPM will turn off some
unused system resources. This patch enables this feature to achieve
power saving.

Signed-o

feat(mt8196): add SPM features support

When the system is in idle or suspend state, SPM will turn off some
unused system resources. This patch enables this feature to achieve
power saving.

Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.com>
Change-Id: Ia9764b91073c4765d41fe7fcd8e4a21372c290f1

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feat(mt8196): enable PMIC low power setting

During suspend, it is necessary to set some power rails of the PMIC
to enter low power mode to achieve power saving.

Signed-off-by: Wenzhen Yu <wenzhen.y

feat(mt8196): enable PMIC low power setting

During suspend, it is necessary to set some power rails of the PMIC
to enter low power mode to achieve power saving.

Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.com>
Change-Id: Iaeadd15270e0209f027fab80f478ad621bd59ea7

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fix(versal2): modify function to have single return

This corrects the MISRA violation C2012-15.5:
A function should have a single point of exit at the end.
Introduced a temporary variable to store t

fix(versal2): modify function to have single return

This corrects the MISRA violation C2012-15.5:
A function should have a single point of exit at the end.
Introduced a temporary variable to store the return value to
ensure single return for the function.

Change-Id: Ib152831e84f5ead5b57fd713ebfedb1f3340a727
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(versal-net): modify function to have single return

This corrects the MISRA violation C2012-15.5:
A function should have a single point of exit at the end.
Introduced a temporary variable to stor

fix(versal-net): modify function to have single return

This corrects the MISRA violation C2012-15.5:
A function should have a single point of exit at the end.
Introduced a temporary variable to store the return value to
ensure single return for the function.

Change-Id: Ib8b3339f32031a3657f6c349763a20a99fd828e7
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(versal): modify function to have single return

This corrects the MISRA violation C2012-15.5:
A function should have a single point of exit at the end.
Introduced a temporary variable to store th

fix(versal): modify function to have single return

This corrects the MISRA violation C2012-15.5:
A function should have a single point of exit at the end.
Introduced a temporary variable to store the return value to
ensure single return for the function.

Change-Id: Iffbd8770fd4ff2f2176062469d22961cbaa160b4
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(xilinx): modify function to have single return

This corrects the MISRA violation C2012-15.5:
A function should have a single point of exit at the end.
Introduced a temporary variable to store th

fix(xilinx): modify function to have single return

This corrects the MISRA violation C2012-15.5:
A function should have a single point of exit at the end.
Introduced a temporary variable to store the return value to
ensure single return for the function.

Change-Id: Ice3eb939664ffc62c1f586b641e37481f10ffff6
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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feat(mt8196): add mcdi driver

Add MCDI driver to manage CPU idle states and optimize power consumption.

Signed-off-by: Kai Liang <kai.liang@mediatek.com>
Change-Id: I3a2e163730dd997dd72f2ebc1375dea

feat(mt8196): add mcdi driver

Add MCDI driver to manage CPU idle states and optimize power consumption.

Signed-off-by: Kai Liang <kai.liang@mediatek.com>
Change-Id: I3a2e163730dd997dd72f2ebc1375dea38d728cb7

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feat(mt8196): add pwr_ctrl module for CPU power management

Implement pwr_ctrl module to manage CPU power.

Signed-off-by: Kai Liang <kai.liang@mediatek.com>
Change-Id: I73a7a8a2d0b120b7225c2f3239901

feat(mt8196): add pwr_ctrl module for CPU power management

Implement pwr_ctrl module to manage CPU power.

Signed-off-by: Kai Liang <kai.liang@mediatek.com>
Change-Id: I73a7a8a2d0b120b7225c2f323990176397b6e4a5

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feat(mt8196): add mcusys moudles for power management

And mcusys drivers to enhance CPU power state control.

Signed-off-by: Kai Liang <kai.liang@mediatek.com>
Change-Id: I7d84407cebc16a5ab233597815

feat(mt8196): add mcusys moudles for power management

And mcusys drivers to enhance CPU power state control.

Signed-off-by: Kai Liang <kai.liang@mediatek.com>
Change-Id: I7d84407cebc16a5ab23359781574e9d02e90c58b

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feat(mt8196): add CPC module for power management

Add Centralized Power Control (CPC) module to manage CPU power states.

Signed-off-by: Kai Liang <kai.liang@mediatek.com>
Change-Id: I21215514301814

feat(mt8196): add CPC module for power management

Add Centralized Power Control (CPC) module to manage CPU power states.

Signed-off-by: Kai Liang <kai.liang@mediatek.com>
Change-Id: I212155143018141c89427032f6a7d21243e750b7

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feat(mt8196): add topology module for power management

Add topology module to support CPU power state control.

Signed-off-by: Kai Liang <kai.liang@mediatek.com>
Change-Id: I0cc1e5a426762b1b29bff1e9

feat(mt8196): add topology module for power management

Add topology module to support CPU power state control.

Signed-off-by: Kai Liang <kai.liang@mediatek.com>
Change-Id: I0cc1e5a426762b1b29bff1e940e077643da02e5e

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feat(mt8196): add SPMI driver

Add SPMI and PMIF driver for PMIC communication

Change-Id: Iad1d90381d6dad6b3e92fd9d6a3ce02fa11d15f1
Signed-off-by: Hope Wang <hope.wang@mediatek.corp-partner.google.c

feat(mt8196): add SPMI driver

Add SPMI and PMIF driver for PMIC communication

Change-Id: Iad1d90381d6dad6b3e92fd9d6a3ce02fa11d15f1
Signed-off-by: Hope Wang <hope.wang@mediatek.corp-partner.google.com>

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feat(mt8196): add PMIC driver

1. Add PMIC shutdown API
2. Add PMIC low power settings

Change-Id: I634a60fa3e2a74a6031df9fe59e2f52956ef7114
Signed-off-by: Hope Wang <hope.wang@mediatek.corp-partner.

feat(mt8196): add PMIC driver

1. Add PMIC shutdown API
2. Add PMIC low power settings

Change-Id: I634a60fa3e2a74a6031df9fe59e2f52956ef7114
Signed-off-by: Hope Wang <hope.wang@mediatek.corp-partner.google.com>

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fix(xilinx): dcc console tests failing

The commit a6485b2b3b2c ("refactor(delay-timer): add timer
callback functions") is breaking DCC console due to uninitialized
timer ops structure. Fix it by mov

fix(xilinx): dcc console tests failing

The commit a6485b2b3b2c ("refactor(delay-timer): add timer
callback functions") is breaking DCC console due to uninitialized
timer ops structure. Fix it by moving generic delay timer init
prior to console setup to make sure that time is setup before DCC
console setup.

Fixes: a6485b2b3b2c ("refactor(delay-timer): add timer callback
functions")

Change-Id: I67910332773741c0b08f02feb232efab6356db12
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

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refactor(bl32): flush before console switch state

Move console_switch_state(CONSOLE_FLAG_RUNTIME) to sp_min_main() so
that this becomes the last call before bl32/sp_min exits. This also
ensures that

refactor(bl32): flush before console switch state

Move console_switch_state(CONSOLE_FLAG_RUNTIME) to sp_min_main() so
that this becomes the last call before bl32/sp_min exits. This also
ensures that console_flush() is called before switching console state
to runtime.

This patch mimics the behavior of console_switch_state() call in BL31
per this patch
https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/26771/4.

Change-Id: I5b562d02706b19bb8b14154be97b6e9ef4e2fd3b
Signed-off-by: Salman Nabi <salman.nabi@arm.com>

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Merge "chore(fvp): use correct dts for dynamiq cores" into integration

Merge "build: remove Windows compatibility layer" into integration

Merge changes I137f69be,Ia2e7168f,I0e569d12,I614272ec,Ib68293f2 into integration

* changes:
perf(psci): pass my_core_pos around instead of calling it repeatedly
refactor(psci): move timestamp co

Merge changes I137f69be,Ia2e7168f,I0e569d12,I614272ec,Ib68293f2 into integration

* changes:
perf(psci): pass my_core_pos around instead of calling it repeatedly
refactor(psci): move timestamp collection to psci_pwrdown_cpu
refactor(psci): factor common code out of the standby finisher
refactor(psci): don't use PSCI_INVALID_PWR_LVL to signal OFF state
docs(psci): drop outdated cache maintenance comment

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Merge "feat(mops): enable FEAT_MOPS in EL3 when INIT_UNUSED_NS_EL2=1" into integration