History log of /rk3399_ARM-atf/plat/ (Results 776 – 800 of 8950)
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8babf73f14-Apr-2025 Joanna Farley <joanna.farley@arm.com>

Merge changes from topic "xlnx_versal2_ipi" into integration

* changes:
feat(versal2): add bufferless IPI Support
chore(versal2): use BIT_32() macro

2b47825814-Apr-2025 Govindraj Raja <govindraj.raja@arm.com>

Merge changes from topic "hm/handoff-aarch32" into integration

* changes:
feat(fvp): support AArch32 booting with handoff
feat(arm): support AArch32 booting with handoff

7a5e580914-Apr-2025 Andre Przywara <andre.przywara@arm.com>

fix(rd1ae): rename legacy MPAM build option

ENABLE_MPAM_FOR_LOWER_ELS was renamed to ENABLE_FEAT_MPAM a while ago,
but the rd1ae platform Makefile still carries the old name, probably due
to the ups

fix(rd1ae): rename legacy MPAM build option

ENABLE_MPAM_FOR_LOWER_ELS was renamed to ENABLE_FEAT_MPAM a while ago,
but the rd1ae platform Makefile still carries the old name, probably due
to the upstreaming overlapping with the rename.

Replace the old build option with the proper name, to make sure that
MPAM support gets compiled in without runtime checks.

Change-Id: If082e7250a7a3d12c7cbef5126303da1ee07a3af
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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89eb505814-Apr-2025 Joanna Farley <joanna.farley@arm.com>

Merge "fix(versal2): enable system reset" into integration

31ddca4014-Apr-2025 Manish V Badarkhe <manish.badarkhe@arm.com>

Merge "feat(psci): remove cpu context init by index" into integration

5221661e28-Mar-2025 Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>

refactor(s32g274a): replace mov/movk with mov_imm

Replace pairs of mov and movk instructions with the mov_imm macro to
align with the rest of the infrastructure and avoid code duplication.

Change-I

refactor(s32g274a): replace mov/movk with mov_imm

Replace pairs of mov and movk instructions with the mov_imm macro to
align with the rest of the infrastructure and avoid code duplication.

Change-Id: I3c091eb8ff111c7bc030b32ad5948cbfaea3b35c
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>

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ef738d1921-Jun-2024 Manish Pandey <manish.pandey2@arm.com>

feat(psci): remove cpu context init by index

Currently, the calling core (meaning the core which received the call to
CPU_ON or the powerdown path of CPU_SUSPEND on the same core) is in
charge of in

feat(psci): remove cpu context init by index

Currently, the calling core (meaning the core which received the call to
CPU_ON or the powerdown path of CPU_SUSPEND on the same core) is in
charge of initialising the context for the waking core (the warmboot
entrypoint for both). This is convenient because the calling core can
write the context while in coherency and the waking core will only need
the context after its entered coherency. This avoids any cache
maintenance and makes communication simple.

However, this has 3 main problems:
a) asymmetric feature support is problematic - the calling core has no
way of knowing the feature set of the waking core. If the two
diverge, the architectural feature discovery via ID registers breaks
down. We've thus far "fixed" this on a case by case basis which
doesn't scale and introduces redundancy.

b) powerdown abandon (pabandon) introduces a contradiction - the calling
core has to initialise the context for when the core wakes up, but
should the core not powerdown it needs its old context intact. The only
way to work around this is by keeping two copies of context which
incurs a runtime and memory overhead.

c) cm_prepare_el3_exit[_ns]() doesn't have access to the entrypoint but needs
it to make initialisation decisions. We can infer some of this from
registers that have already been written but this is awkwardly
limiting for what we can do. This also necessitates the split from
the context initialisation.

We can solve all three by a making a core be in full ownership of its
own context. The calling core then only writes entrypoint information
and nothing else. The waking core then initialises its own context as it
sees fit with full knowledge of the whole picture.

The only tricky bit is cache coherency - the waking core has to be able
to coherently observe its new entrypoint. Calling cores will write to
the shared region with coherent caches on. If we make sure to read the
context only after the waking core has entered coherency, then we can
avoid cache operations and let hardware handle everything.

We can skip the spsr check for FEAT_TCR2 as it doesn't make a
difference. We can also skip enabling it twice from generic code.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I86e7fe8b698191fc3b469e5ced1fd010f8754b0e

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4b4080d718-Mar-2025 Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>

fix(xilinx): resolve misra rule 8.4 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.8.4:
- A compatible declaration shall be visible when an object or function
with e

fix(xilinx): resolve misra rule 8.4 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.8.4:
- A compatible declaration shall be visible when an object or function
with external linkage is defined.
- Fix:
- Declared variable as static.

Change-Id: I44a022de3d5a62d255e2481dc1f4d1e8df2c7eb0
Signed-off-by: Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>

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3df32f8518-Mar-2025 Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>

fix(xilinx): resolve misra rule 8.3 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.8.3:
- All declarations of an object or function shall use the same names
and type

fix(xilinx): resolve misra rule 8.3 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.8.3:
- All declarations of an object or function shall use the same names
and type qualifiers.
- Fix:
- Made same name parameters and type qualifiers in function declaration
and definition.

Change-Id: Idb4f986cec957102bb4ba1ef22f2e7937aaeb54d
Signed-off-by: Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>

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a5d5cb3c18-Mar-2025 Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>

fix(xilinx): resolve misra rule 14.4 violation

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.14.4:
- The controlling expression of an if statement and the controlling
expressi

fix(xilinx): resolve misra rule 14.4 violation

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.14.4:
- The controlling expression of an if statement and the controlling
expression of an iteration-statement shall have essentially Boolean
type.
- Fix:
- Converted controlling expression of if statement into essential
Boolean type.

Change-Id: I2642ff4d6446bc0719d27cd95b1ad35c36f40211
Signed-off-by: Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>

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bdba3c8426-Mar-2025 Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>

fix(xilinx): resolve misra rule 10.4 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.10.4:
- Both operands of an operator in which the usual arithmetic conversions
ar

fix(xilinx): resolve misra rule 10.4 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.10.4:
- Both operands of an operator in which the usual arithmetic conversions
are performed shall have the same essential type category.
- Fix:
- Made data type same for both the operands.

Change-Id: I0cea19477f3c10265d95ea1d5d2ea151dbf174bb
Signed-off-by: Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>

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72eb16b726-Mar-2025 Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>

fix(xilinx): resolve misra rule 10.3 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.10.3:
- The value of an expression shall not be assigned to an object
with a narr

fix(xilinx): resolve misra rule 10.3 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.10.3:
- The value of an expression shall not be assigned to an object
with a narrower essential type or of a different essential type
category.
- Fix:
- Explicitly type casted to narrower essential type or of a different
essential type category.

Change-Id: Ia4258d2d0655f7847f832804a13d182ac0a2a29b
Signed-off-by: Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>

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e0c2b73610-Apr-2025 Manish V Badarkhe <manish.badarkhe@arm.com>

Merge changes from topic "nrd1_deprecation" into integration

* changes:
docs(changelog): remove RD-E1-Edge platform's scope
docs(maintainers): add RD-V3 variants to maintained paths
feat(neove

Merge changes from topic "nrd1_deprecation" into integration

* changes:
docs(changelog): remove RD-E1-Edge platform's scope
docs(maintainers): add RD-V3 variants to maintained paths
feat(neoverse_rd): deprecate and remove RD-V1 platform variants
feat(neoverse_rd): deprecate and remove RD-N1-Edge platform variants
feat(neoverse_rd): deprecate and remove SGI-575 platform

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b620641010-Apr-2025 Manish V Badarkhe <manish.badarkhe@arm.com>

Merge changes from topic "hm/evlog" into integration

* changes:
refactor(rpi3): use renamed event log printer
refactor(imx8m): use renamed event log printer
refactor(qemu): use renamed event l

Merge changes from topic "hm/evlog" into integration

* changes:
refactor(rpi3): use renamed event log printer
refactor(imx8m): use renamed event log printer
refactor(qemu): use renamed event log printer
refactor(fvp): use renamed event log printer
refactor(measured-boot): standardize function names

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8676dca210-Apr-2025 Manish V Badarkhe <manish.badarkhe@arm.com>

Merge changes Ie33671b0,I1543aa6d into integration

* changes:
docs(fvp): clarify what `FVP` means
fix(fvp): allow PSCI 0.2 in the device tree

8b3a89fa31-Mar-2025 Sona Mathew <sonarebecca.mathew@arm.com>

feat(trp): test el3-rmm ide km interface

This patch introduces test functions to the Test Realm Payload (TRP)
for performing basic sanity checks on the RMM-EL3 IDE KM support added
to EL3.

The prim

feat(trp): test el3-rmm ide km interface

This patch introduces test functions to the Test Realm Payload (TRP)
for performing basic sanity checks on the RMM-EL3 IDE KM support added
to EL3.

The primary goal of this patch is to only to verify the basic
functionality and ensure the implemented functions return the
correct return values.

The test uses random values for the ecam address, rootport ID,
IDE stream info, keys, and IV values.

Change-Id: Icf47627da9a6a7dd0d6e40e20ac94cc977072177
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>

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2132c70714-Mar-2025 Sona Mathew <sonarebecca.mathew@arm.com>

feat(rmmd): el3-rmm ide key management interface

Patch introduces the EL3-RMM SMC Interface for Root Port
Key management as per RFC discussed here:
https://github.com/TF-RMM/tf-rmm/wiki/RFC:-EL3-RMM

feat(rmmd): el3-rmm ide key management interface

Patch introduces the EL3-RMM SMC Interface for Root Port
Key management as per RFC discussed here:
https://github.com/TF-RMM/tf-rmm/wiki/RFC:-EL3-RMM-IDE-KM-Interface

Three IDE Key management smc calls have been added:
- RMM_IDE_KEY_PROG()
- RMM_IDE_KEY_SET_GO()
- RMM_IDE_KEY_SET_STOP()
- RMM_IDE_KM_PULL_RESPONSE()

Due to the absence of root port support in FVP, we are
currently adding placeholders in this patch for the platform
APIs to return success irrespective of the arguments being passed
by the caller(Realms). The SMCs are guarded by
`RMMD_ENABLE_IDE_KEY_PROG` build flag and is disabled by default.
We expect that once the SMCs are stabilized, this build flag will
not be required anymore.

Change-Id: I9411eb7787dac2a207bd14710d251503bd9626ce
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>

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09fcfd2310-Apr-2025 Manish V Badarkhe <manish.badarkhe@arm.com>

Merge changes Ibe021336,Ic1f05e77 into integration

* changes:
fix(rdv3): correctly define plat_mboot_measure_key()
fix(psci): initialise variables

058edb8f03-Apr-2025 Naman Trivedi <naman.trivedimanojbhai@amd.com>

fix(versal2): enable system reset

The commit 414cf08b76bc ("feat(versal2): add support for platform
management") changed how system reset works by requiring
pwrdwn_req_received to be set for TF-A to

fix(versal2): enable system reset

The commit 414cf08b76bc ("feat(versal2): add support for platform
management") changed how system reset works by requiring
pwrdwn_req_received to be set for TF-A to make a call to PLM firmware.

This accidentally blocked reset initiated by Linux or U-Boot,
as this flag is only set during PLM firmware initiated reset.

Fix this issue by enabling firmware call when pwrdwn_req_received
is not set, ensuring Linux and U-Boot can initiate reset properly.

Fixes: 414cf08b76bc ("feat(versal2): add support for platform management")
Change-Id: I6ffc9b2efa56a7bd843b296e2c892c064ffd054a
Signed-off-by: Naman Trivedi <naman.trivedimanojbhai@amd.com>

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a0f3fa7410-Apr-2025 Yann Gautier <yann.gautier@st.com>

Merge "fix(ti): fix UNUSED_VALUE in AM62L PSCI Driver" into integration

fa0eb3cf08-Apr-2025 Boyan Karatotev <boyan.karatotev@arm.com>

fix(rdv3): correctly define plat_mboot_measure_key()

The function is declared with 2 const parameters, however it is defined
without the const qualifiers, leading to compiler warnings.

Change-Id: I

fix(rdv3): correctly define plat_mboot_measure_key()

The function is declared with 2 const parameters, however it is defined
without the const qualifiers, leading to compiler warnings.

Change-Id: Ibe021336ea50e2028799bd6b1f0c5b513490185d
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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126f278f14-Mar-2025 Harrison Mutai <harrison.mutai@arm.com>

refactor(rpi3): use renamed event log printer

Following the renaming of printer functions to follow the
event_log_{func} convention, update RPI3 to use the new function names
for consistency with th

refactor(rpi3): use renamed event log printer

Following the renaming of printer functions to follow the
event_log_{func} convention, update RPI3 to use the new function names
for consistency with the logging library.

Change-Id: I7a009e78611398f0978e362a7ee5327276286126
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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0d81b96e14-Mar-2025 Harrison Mutai <harrison.mutai@arm.com>

refactor(imx8m): use renamed event log printer

Following the renaming of printer functions to follow the
event_log_{func} convention, update IMX8M to use the new function names
for consistency with

refactor(imx8m): use renamed event log printer

Following the renaming of printer functions to follow the
event_log_{func} convention, update IMX8M to use the new function names
for consistency with the logging library.

Change-Id: I2e5afc3ef077b45dfd2cdd284d45a7b4230ac479
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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f84aa14c14-Mar-2025 Harrison Mutai <harrison.mutai@arm.com>

refactor(qemu): use renamed event log printer

Following the renaming of printer functions to follow the
event_log_{func} convention, update QEMU to use the new function names
for consistency with th

refactor(qemu): use renamed event log printer

Following the renaming of printer functions to follow the
event_log_{func} convention, update QEMU to use the new function names
for consistency with the logging library.

Additionally, the common/debug.h header was previously exposed via the
event log library. As the event log library moves toward becoming
standalone, pull in this dependency directly from TF-A instead of
relying on it being transitively included.

Change-Id: Iafcdab0d4abff648c025bef853919541b5c3fdb7
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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e48d38d014-Mar-2025 Harrison Mutai <harrison.mutai@arm.com>

refactor(fvp): use renamed event log printer

Following the renaming of printer functions to follow the
event_log_{func} convention, update FVP to use the new function names
for consistency with the

refactor(fvp): use renamed event log printer

Following the renaming of printer functions to follow the
event_log_{func} convention, update FVP to use the new function names
for consistency with the logging library.

Change-Id: I1c3b1311d51174c76903e147c28d51f986b52712
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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