plat: marvell: a80x0: reconfigure CP0 PCIE0 windows

In order to allow the use of PCIe cards such as graphics cards, whose
demands for BAR space are typically much higher than those of network
or SAT

plat: marvell: a80x0: reconfigure CP0 PCIE0 windows

In order to allow the use of PCIe cards such as graphics cards, whose
demands for BAR space are typically much higher than those of network
or SATA/USB cards, reconfigure the I/O windows so we can declare two
MMIO PCI regions: a 512 MB MMIO32 one at 0xc000_0000 and a 4 GB MMIO64
one at 0x8_0000_0000. In addition, this will leave ample room for an
ECAM config space at 0xe000_0000 (up to the ECAM maximum of 256 MB)

For compatibility with older kernels or firmware, leave the original
16 MB window in place as well.

Change-Id: Ia8177194e542078772f90941eced81b231c16887
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>

show more ...

plat: marvell: a70x0: reconfigure CP0 PCIE2 windows

In order to allow the use of PCIe cards such as graphics cards, whose
demands for BAR space are typically much higher than those of network
or SAT

plat: marvell: a70x0: reconfigure CP0 PCIE2 windows

In order to allow the use of PCIe cards such as graphics cards, whose
demands for BAR space are typically much higher than those of network
or SATA/USB cards, reconfigure the I/O windows so we can declare two
MMIO PCI regions: a 512 MB MMIO32 one at 0xc000_0000 and a 4 GB MMIO64
one at 0x8_0000_0000. In addition, this will leave ample room for an
ECAM config space at 0xe000_0000 (up to the ECAM maximum of 256 MB)

For compatibility with older kernels or firmware, leave the original
16 MB window in place as well.

Change-Id: I80b00691ae8d0a3f3f7285b8e0bfc21c0a095e94
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>

show more ...

a8k: use the memory controller feature to protect the RT service region

Define the RT service space as secure with use of memory controller
trustzone feature. Thanks to this protection, any NS-Bootl

a8k: use the memory controller feature to protect the RT service region

Define the RT service space as secure with use of memory controller
trustzone feature. Thanks to this protection, any NS-Bootloader nor NS-OS,
won't be able to access RT services (e.g. accidentally overwrite it,
which will at best result in RT services unavailability).

Change-Id: Ie5b6cbe9a1b77879d6d8f8eac5d4e41e468496ce
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>

show more ...

plat: marvell: rename common include file

Rename a8k_common.h to armada_common.h to keep the same header
name across all other Marvell Armada platforms.
This is especially useful since various Marve

plat: marvell: rename common include file

Rename a8k_common.h to armada_common.h to keep the same header
name across all other Marvell Armada platforms.
This is especially useful since various Marvell platforms may
use common platform files and share the driver modules.

Change-Id: I7262105201123d54ccddef9aad4097518f1e38ef
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>

show more ...

ti: k3: common: Add basic PSCI core off support

Use TI-SCI messages to request core power down from system controller
firmware.

Signed-off-by: Andrew F. Davis <afd@ti.com>

Merge pull request #1550 from danielboulby-arm/db/weakdefs

Prevent two weak definitions of the same function

Prevent two weak definitions of the same function

Add another level of abstraction of weak defs for
arm_bl2_handle_post_image_load to prevent two weak definitions
of the same function

Change-Id: Ie

Prevent two weak definitions of the same function

Add another level of abstraction of weak defs for
arm_bl2_handle_post_image_load to prevent two weak definitions
of the same function

Change-Id: Ie953786f43b0f88257c82956ffaa5fe0d19603db
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>

show more ...

Fix MISRA defects in log helpers

No functional changes.

Change-Id: I850f08718abb69d5d58856b0e3de036266d8c2f4
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Merge pull request #1542 from antonio-nino-diaz-arm/an/bl31-misra

Some MISRA fixes in BL31, cci and smmu

Merge pull request #1539 from antonio-nino-diaz-arm/an/gic-misra

MISRA fixes for the GIC driver

Fix MISRA defects in BL31 common code

Change-Id: I5993b425445ee794e6d2a792c244c0af53640655
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

plat/common: gic: MISRA fixes

Change-Id: I11509a3271d7608048d49e7dd5192be0c2a313f0
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Merge pull request #1514 from glneo/for-upstream-psci

K3 PSCI Support

Merge pull request #1538 from jts-arm/typos

Remove unnecessary casts

Merge pull request #1531 from MISL-EBU-System-SW/marvell-plat-updates

plat: marvell: bl31: Update the early platform setup API

zynqmp: pm: Add API to get number of clocks

Currently in Linux maximum number of clocks is hard-coded and
so it needs to allocate static memory. It can get actual clock
number after querying all clo

zynqmp: pm: Add API to get number of clocks

Currently in Linux maximum number of clocks is hard-coded and
so it needs to allocate static memory. It can get actual clock
number after querying all clock names by special clock name
string. Add new query data parameter to get actual number of
clocks so Linux can get actual clock numbers in advance.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>

show more ...

Remove unnecessary casts

Small patch which removes some redundant casts to (void *).

Change-Id: If1cfd68f2989bac1d39dbb3d1c31d4119badbc21
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>

ti: k3: common: Add basic PSCI reset support

Use TI-SCI messages to request reset from system controller firmware.

Signed-off-by: Andrew F. Davis <afd@ti.com>

ti: k3: common: Add basic PSCI core on support

Use TI-SCI messages to request core start from system controller
firmware.

Signed-off-by: Andrew F. Davis <afd@ti.com>

ti: k3: drivers: ti_sci: Add support for Processor control

TI-SCI message protocol provides support for controlling of various
physical cores available in the SoC. In order to control which host is

ti: k3: drivers: ti_sci: Add support for Processor control

TI-SCI message protocol provides support for controlling of various
physical cores available in the SoC. In order to control which host is
capable of controlling a physical processor core, there is a processor
access control list that needs to be populated as part of the board
configuration data.

Introduce support for the set of TI-SCI message protocol APIs that
provide us with this capability of controlling physical cores.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>

show more ...

ti: k3: drivers: ti_sci: Add support for Core control

Since system controller now has control over SoC power management, core
operation such as reset need to be explicitly requested to reboot the So

ti: k3: drivers: ti_sci: Add support for Core control

Since system controller now has control over SoC power management, core
operation such as reset need to be explicitly requested to reboot the SoC.
Add support for this here.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>

show more ...

ti: k3: drivers: ti_sci: Add support for Clock control

TI-SCI message protocol provides support for management of various
hardware entities within the SoC.

In general, we expect to function at a de

ti: k3: drivers: ti_sci: Add support for Clock control

TI-SCI message protocol provides support for management of various
hardware entities within the SoC.

In general, we expect to function at a device level of abstraction,
however, for proper operation of hardware blocks, many clocks directly
supplying the hardware block needs to be queried or configured.

Introduce support for the set of TI-SCI message protocol support that
provide us with this capability.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>

show more ...

ti: k3: drivers: ti_sci: Add support for Device control

TI-SCI message protocol provides support for management of various
hardware entitites within the SoC.

We introduce the fundamental device man

ti: k3: drivers: ti_sci: Add support for Device control

TI-SCI message protocol provides support for management of various
hardware entitites within the SoC.

We introduce the fundamental device management capability support to
the driver protocol as part of this change.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>

show more ...

ti: k3: drivers: Add support for TI System Control Interface protocol

Texas Instrument's System Control Interface (TI-SCI) Message Protocol
is used in Texas Instrument's System on Chip (SoC) such as

ti: k3: drivers: Add support for TI System Control Interface protocol

Texas Instrument's System Control Interface (TI-SCI) Message Protocol
is used in Texas Instrument's System on Chip (SoC) such as those
in K3 family AM654x SoCs to communicate between various compute
processors with a central system controller entity.

TI-SCI message protocol provides support for management of various
hardware entities within the SoC. Add support driver to allow
communication with system controller entity within the SoC.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>

show more ...

ti: k3: drivers: Add Secure Proxy driver

Secure Proxy module manages hardware threads that are meant
for communication between the processor entities. Add support
for this here.

Signed-off-by: Andr

ti: k3: drivers: Add Secure Proxy driver

Secure Proxy module manages hardware threads that are meant
for communication between the processor entities. Add support
for this here.

Signed-off-by: Andrew F. Davis <afd@ti.com>

show more ...