Merge "plat/arm: Introduce corstone700 platform." into integration

Merge "rcar_gen3: plat: Rename RCAR_PRODUCT_* to PRR_PRODUCT_*" into integration

plat/arm: Introduce corstone700 platform.

This patch adds support for Corstone-700 foundation IP, which integrates
both Cortex-M0+ and Cortex-A(Host) processors in one handy, flexible
subsystem.
Thi

plat/arm: Introduce corstone700 platform.

This patch adds support for Corstone-700 foundation IP, which integrates
both Cortex-M0+ and Cortex-A(Host) processors in one handy, flexible
subsystem.
This is an example implementation of Corstone-700 IP host firmware.

Cortex-M0+ will take care of boot stages 1 and 2(BL1/BL2) as well as
bringing Host out RESET. Host will start execution directly from BL32 and
then will jump to Linux.

It is an initial port and additional features are expected to be added
later.

Change-Id: I7b5c0278243d574284b777b2408375d007a7736e
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>

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Merge "rcar_gen3: plat: Factor out PRR_ macros into rcar_def.h" into integration

Merge "intel: agilex: HMC driver calculate DDR size" into integration

Merge "console: add a flag to prepend '\r' in the multi-console framework" into integration

intel: agilex: HMC driver calculate DDR size

Driver will calculate DDR size instead of using hardcoded value

Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I64

intel: agilex: HMC driver calculate DDR size

Driver will calculate DDR size instead of using hardcoded value

Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I642cf2180929965ef12bd5ae4393b2f3d0dcddde

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console: add a flag to prepend '\r' in the multi-console framework

Currently, console drivers prepend '\r' to '\n' by themselves. This is
common enough to be supported in the framework.

Add a new f

console: add a flag to prepend '\r' in the multi-console framework

Currently, console drivers prepend '\r' to '\n' by themselves. This is
common enough to be supported in the framework.

Add a new flag, CONSOLE_FLAG_TRANSLATE_CRLF. A driver can set this
flag to ask the framework to transform LF into CRLF instead of doing
it by itself.

Change-Id: I4f5c5887591bc0a8749a105abe62b6562eaf503b
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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intel: agilex: Clear PLL lostlock bypass mode

To provide glitchless clock to downstream logic even if clock toggles

Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-

intel: agilex: Clear PLL lostlock bypass mode

To provide glitchless clock to downstream logic even if clock toggles

Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I728d64d0ba3b4492125bea5b0737fc83180356f1

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Merge "FVP: Add Delay Timer driver to BL1 and BL31" into integration

FVP: Add Delay Timer driver to BL1 and BL31

SMMUv3 driver functions which are called from BL1 and BL31
currently use counter-based poll method for testing status
bits. Adding Delay Timer driver to B

FVP: Add Delay Timer driver to BL1 and BL31

SMMUv3 driver functions which are called from BL1 and BL31
currently use counter-based poll method for testing status
bits. Adding Delay Timer driver to BL1 and BL31 is required
for timeout-based implementation using timer delay functions
for SMMU and other drivers.
This patch adds new function `fvp_timer_init()` which
initialises either System level generic or SP804 timer based on
FVP_USE_SP804_TIMER build flag.
In BL2U `bl2u_early_platform_setup()` function the call to
`arm_bl2u_early_platform_setup()` (which calls
`generic_delay_timer_init()` ignoring FVP_USE_SP804_TIMER flag),
is replaced with `arm_console_boot_init()` and `fvp_timer_init()`.

Change-Id: Ifd8dcebf4019e877b9bc5641551deef77a44c0d1
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>

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rcar_gen3: plat: Rename RCAR_PRODUCT_* to PRR_PRODUCT_*

Rename RCAR_PRODUCT_* to PRR_PRODUCT_* and drop the duplicate
RCAR_PRODUCT_* macro.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com

rcar_gen3: plat: Rename RCAR_PRODUCT_* to PRR_PRODUCT_*

Rename RCAR_PRODUCT_* to PRR_PRODUCT_* and drop the duplicate
RCAR_PRODUCT_* macro.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I6b2789790b85edb79c026f0860d70f323d113d96

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rcar_gen3: plat: Factor out PRR_ macros into rcar_def.h

Pull out the PRR_* macros into rcar_def.h and remove multiple copies of
it. Now that there are still RCAR_* macros in rcar_def.h too and they

rcar_gen3: plat: Factor out PRR_ macros into rcar_def.h

Pull out the PRR_* macros into rcar_def.h and remove multiple copies of
it. Now that there are still RCAR_* macros in rcar_def.h too and they
have the exact same meaning as the PRR_* macros, but that's for another
patch.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: Icb7f61b971b1a23102bd1b9f58cda580660a55fc

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Merge changes from topic "lm/juno_dyn_cfg" into integration

* changes:
Juno: Use shared mbedtls heap between bl1 and bl2
Juno: add basic support for dynamic config

tegra: add support for multi console interface

This patch updates all Tegra platforms to use the new multi console API.

Change-Id: I27c0c7830a86e26491dea9991a689f0b01e4dbf0
Signed-off-by: Ambroise

tegra: add support for multi console interface

This patch updates all Tegra platforms to use the new multi console API.

Change-Id: I27c0c7830a86e26491dea9991a689f0b01e4dbf0
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
Signed-off-by: Julius Werner <jwerner@chromium.org>

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Merge "intel: agilex: Fix memory controller driver" into integration

Merge changes from topic "rockchip-uart-fixes" into integration

* changes:
rockchip: rk3399: store actual debug uart information on suspend
rockchip: move dt-coreboot uart distinction into param

Merge changes from topic "rockchip-uart-fixes" into integration

* changes:
rockchip: rk3399: store actual debug uart information on suspend
rockchip: move dt-coreboot uart distinction into param handling code
rockchip: make uart baudrate configurable
rockchip: px30: add uart5 as option for serial output

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intel: agilex: Fix memory controller driver

Increase calibration delay, fix ddrio control config & nonsecure region
limit

Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
C

intel: agilex: Fix memory controller driver

Increase calibration delay, fix ddrio control config & nonsecure region
limit

Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: Ibca3c247a3ad5104176ca9057d29755599f13c9b

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intel: agilex: Fix reliance on hard coded clock information

Extract clock information for UART, MMC & Watchdog from the clock manager

Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@

intel: agilex: Fix reliance on hard coded clock information

Extract clock information for UART, MMC & Watchdog from the clock manager

Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I42d3d4ceeaf45788d457472f6ddcd3fe099f0133

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Juno: Use shared mbedtls heap between bl1 and bl2

Change-Id: Ia1ecad58ebf9de3f3a44b17ad1de57424b431125
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>

Juno: add basic support for dynamic config

Add the disable_auth dynamic parameter, that allows to disable the
authentication when TBBR is enabled. This parameter is for development
only.

Change-Id:

Juno: add basic support for dynamic config

Add the disable_auth dynamic parameter, that allows to disable the
authentication when TBBR is enabled. This parameter is for development
only.

Change-Id: Ic24ad16738517f7e07c4f506dcf69a1ae8df7d2d
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>

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intel: stratix10: Fix reliance on hard coded clock information

Extract clock information for UART, MMC & Watchdog from the platform
rather than hard code it

Signed-off-by: Hadi Asyrafi <muhammad.ha

intel: stratix10: Fix reliance on hard coded clock information

Extract clock information for UART, MMC & Watchdog from the platform
rather than hard code it

Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I2582bd34a6da97bd75d5ccba5f93840e65f26b03

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rockchip: rk3399: store actual debug uart information on suspend

The rk3399 suspend code saves and restores the debug uart settings, but
right now always does this for the default uart. Right now th

rockchip: rk3399: store actual debug uart information on suspend

The rk3399 suspend code saves and restores the debug uart settings, but
right now always does this for the default uart. Right now this works
only by chance for the majority of rk3399 boards, which do not deviate
from that default.

But both Coreboot as well as U-Boot-based platforms can actually use
different uarts for their output, which can be configured from either
devicetree or Coreboot-variables.

To fix this, just use the stored uart-base information instead of the
default constant.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Change-Id: I1ea059d59a1126f6f8702315df7e620e632b686e

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rockchip: move dt-coreboot uart distinction into param handling code

Rockchip platforms can be booted from either u-boot or coreboot.

So far the Coreboot-console was initizalized from a coreboot da

rockchip: move dt-coreboot uart distinction into param handling code

Rockchip platforms can be booted from either u-boot or coreboot.

So far the Coreboot-console was initizalized from a coreboot data struct
in the early_param2 callbacks and dt-based consoles with data from the
rockchip_get_uart_* functions.

But later code may also need this console information for example for
special suspend handling. To make this easy follow a suggestion from
Julius Werner and move the coreboot<->dt distinction into the
rockchip_get_uart_* functions, thus making correct data about the used
uart available to all Rockchip platform code at all times.

This includes a new rockchip_get_uart_clock as well, because while the
dt-platforms right now always just default the rate defined in a constant
Coreboot provides its own field for the clock rate and we don't want to
loose that information for the console init. Similarly the rk_uart_*
variables should move into the non-Coreboot code, to prevent them from
being marked as unused, which also requires the rk_get_uart_* functions
to move below the actual dt-parsing.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Change-Id: I278d595d2aa6c6864187fc8979a9fbff9814feac

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Merge changes from topic "intel-plat-refactor" into integration

* changes:
intel: Platform common code refactor
intel: Platform common code refactor