| 3bea03e7 | 21-Oct-2019 |
Samuel Holland <samuel@sholland.org> |
allwinner: a64: power: Remove duplicate DT check
should_enable_regulator() is already checked in the regulators subnode loop before setup_regulator() is called, so there's no need to check it again
allwinner: a64: power: Remove duplicate DT check
should_enable_regulator() is already checked in the regulators subnode loop before setup_regulator() is called, so there's no need to check it again here.
Signed-off-by: Samuel Holland <samuel@sholland.org> Change-Id: Idb8b8a6e435246f4fb226bc84813449d80a0a977
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| 18fbfefb | 21-Oct-2019 |
Samuel Holland <samuel@sholland.org> |
allwinner: Build PMIC bus drivers only in BL31
These are used by the PMIC setup code, which runs during BL31 initialization, and the PSCI shutdown code, also a part of BL31. They can't be needed bef
allwinner: Build PMIC bus drivers only in BL31
These are used by the PMIC setup code, which runs during BL31 initialization, and the PSCI shutdown code, also a part of BL31. They can't be needed before BL31, or it wouldn't be possible to boot. Allwinner platforms don't generally build anything but BL31 anyway, but this change improves clarity and consistency with allwinner-common.mk.
Signed-off-by: Samuel Holland <samuel@sholland.org> Change-Id: I24f1d9ca8b4256e44badf5218d04d8690082babf
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| df77a954 | 21-Oct-2019 |
Samuel Holland <samuel@sholland.org> |
allwinner: a64: power: Make sunxi_turn_off_soc static
The function is only used in this file, and it doesn't make sense for it to be used anywhere else.
Signed-off-by: Samuel Holland <samuel@sholla
allwinner: a64: power: Make sunxi_turn_off_soc static
The function is only used in this file, and it doesn't make sense for it to be used anywhere else.
Signed-off-by: Samuel Holland <samuel@sholland.org> Change-Id: Iab18f082911edcdbc37ceeaff8c512be68e0cb0f
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| 818e6732 | 20-Oct-2019 |
Samuel Holland <samuel@sholland.org> |
allwinner: Merge duplicate code in sunxi_power_down
The action of last resort isn't going to change between SoCs. This moves that code back to the PSCI implementation, where it more obviously matche
allwinner: Merge duplicate code in sunxi_power_down
The action of last resort isn't going to change between SoCs. This moves that code back to the PSCI implementation, where it more obviously matches the code in sunxi_system_reset().
The two error messages say essentially the same thing anyway.
Signed-off-by: Samuel Holland <samuel@sholland.org> Change-Id: I62ac35fdb5ed78a016e9b18281416f1dcea38a4a
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| 4538c498 | 20-Oct-2019 |
Samuel Holland <samuel@sholland.org> |
allwinner: Clean up PMIC-related error handling
- Check the return value from sunxi_init_platform_r_twi(). - Print the PMIC banner before doing anything that might fail. - Remove double prefixes in
allwinner: Clean up PMIC-related error handling
- Check the return value from sunxi_init_platform_r_twi(). - Print the PMIC banner before doing anything that might fail. - Remove double prefixes in error messages. - Consistently omit the trailing period. - No need to print the unknown SoC's ID, since we already did that earlier in bl31_platform_setup(). - On the other hand, do print the ID of the unknown PMIC. - Try to keep the messages concise, as the large string size in these files was causing the firmware to spill into the next page. - Downgrade the banner from NOTICE to INFO. It's purely informational, and people should be using debug builds on untested hardware anyway.
Signed-off-by: Samuel Holland <samuel@sholland.org> Change-Id: Ib909408a5fdaebe05470fbce48d245dd0bf040eb
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| c0e109f2 | 20-Oct-2019 |
Samuel Holland <samuel@sholland.org> |
allwinner: Synchronize PMIC enumerations
Ensure that the default (zero) value represents the case where we take no action. Previously, if a PLAT=sun50i_a64 build was booted on an unknown SoC ID, it
allwinner: Synchronize PMIC enumerations
Ensure that the default (zero) value represents the case where we take no action. Previously, if a PLAT=sun50i_a64 build was booted on an unknown SoC ID, it would be treated as an H5 at shutdown.
This removes some duplicate code and fixes error propagation on H6.
Signed-off-by: Samuel Holland <samuel@sholland.org> Change-Id: I4e51d8a43a56eccb0d8088593cb9908e52e782bc
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| eb75518d | 20-Oct-2019 |
Samuel Holland <samuel@sholland.org> |
allwinner: Enable clock before resetting I2C/RSB
The clock must be running for the module to be reset.
Signed-off-by: Samuel Holland <samuel@sholland.org> Change-Id: Ic8fafc946f3a1a697174b91288e357
allwinner: Enable clock before resetting I2C/RSB
The clock must be running for the module to be reset.
Signed-off-by: Samuel Holland <samuel@sholland.org> Change-Id: Ic8fafc946f3a1a697174b91288e357ffa033ab9a
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| 39a97dce | 13-Dec-2019 |
Joshua Watt <JPEWhacker@gmail.com> |
rockchip: Prevent macro expansion in paths
Instead of stringizing the paths to binary files, add them as string defines on the command line (e.g. -DFOO=\"BAR\" instead of -DFOO=BAR). This prevents m
rockchip: Prevent macro expansion in paths
Instead of stringizing the paths to binary files, add them as string defines on the command line (e.g. -DFOO=\"BAR\" instead of -DFOO=BAR). This prevents macros from being expanded inside the string value itself. For example, -DFOO=/path/with-linux-in-it would have been expanded to "/path/with-1-in-it" because `linux=1` is one of the standard GCC defines.
Change-Id: I7b65df3c9930faed4f1aff75ad726982ae3671e6 Signed-off-by: Joshua Watt <JPEWhacker@gmail.com>
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| 1a433965 | 13-Dec-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge "allwinner: Fix incorrect ARISC code patch offset check" into integration |
| 49c71a36 | 13-Dec-2019 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "allwinner: power: Add DLDO4 power rail" into integration |
| a47f60f6 | 13-Dec-2019 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "intel: s10: Remove unused source code" into integration |
| f0063ef9 | 08-Oct-2019 |
Ziyuan Xu <xzy.xu@rock-chips.com> |
plat/rockchip: cliam a macro to enable hdcp feature for DP
HDCP is using a binary driver, add macro PLAT_RK_DP_HDCP to make it as an option.
Change-Id: I54ef1a3635a28e8ae56654bd1e91dfe011520a7f Sig
plat/rockchip: cliam a macro to enable hdcp feature for DP
HDCP is using a binary driver, add macro PLAT_RK_DP_HDCP to make it as an option.
Change-Id: I54ef1a3635a28e8ae56654bd1e91dfe011520a7f Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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| 0d1b704a | 12-Dec-2019 |
Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> |
intel: s10: Remove unused source code
remove plat_sip_svc.c and plat_psci.c in stratix 10 platform directory as both has been refactored to common directory for sharing with agilex platform
Signed-
intel: s10: Remove unused source code
remove plat_sip_svc.c and plat_psci.c in stratix 10 platform directory as both has been refactored to common directory for sharing with agilex platform
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: I395fed66408f536e8fefd637681e742c63621818
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| d0196911 | 18-Jul-2019 |
Ambroise Vincent <ambroise.vincent@arm.com> |
arm: gicv3: Fix compiler dependent behavior
C99 standard: "What constitutes an access to an object that has volatile-qualified type is implementation-defined".
GCC is not considering the cast to vo
arm: gicv3: Fix compiler dependent behavior
C99 standard: "What constitutes an access to an object that has volatile-qualified type is implementation-defined".
GCC is not considering the cast to void of volatile structures as an access and so is not actually issuing reads.
Clang does read those structures by copying them on the stack, which in this case creates an overflow because of their large size.
This patch removes the cast to void and instead uses the USED attribute to tell the compiler to retain the static variables.
Change-Id: I952b5056e3f6e91841e7ef9558434352710ab80d Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com> Zelalem Aweke <zelalem.aweke@arm.com>
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| b4899041 | 10-Dec-2019 |
Piotr Szczepanik <piter75@gmail.com> |
plat/rockchip: enable power domains of rk3399 before reset
This patch fixes hangs that happen after soft resetting of rk3399.
Signed-off-by: Piotr Szczepanik <piter75@gmail.com> Change-Id: If41b12b
plat/rockchip: enable power domains of rk3399 before reset
This patch fixes hangs that happen after soft resetting of rk3399.
Signed-off-by: Piotr Szczepanik <piter75@gmail.com> Change-Id: If41b12ba1dfcb2ba937361b58eafd50bf5c483d4
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| fba54d55 | 26-Oct-2017 |
Pritesh Raithatha <praithatha@nvidia.com> |
Tegra194: smmu: add support for backup multiple smmu regs
Tegra194 supports multiple SMMU blocks. This patch adds support to save register values for SMMU0 and SMMU2, before entering the System Susp
Tegra194: smmu: add support for backup multiple smmu regs
Tegra194 supports multiple SMMU blocks. This patch adds support to save register values for SMMU0 and SMMU2, before entering the System Suspend state.
Change-Id: I3a376cdb606ea057ad7047714717245f9dced5cf Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
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| 8ecc4291 | 15-Dec-2017 |
Pritesh Raithatha <praithatha@nvidia.com> |
Tegra194: introduce tegra_mc_def.h
This patch introduces memory controller register defines for Tegra194 platforms.
Change-Id: I6596341ae817b6cec30cb74d201ad854a0c8c0a6 Signed-off-by: Pritesh Raith
Tegra194: introduce tegra_mc_def.h
This patch introduces memory controller register defines for Tegra194 platforms.
Change-Id: I6596341ae817b6cec30cb74d201ad854a0c8c0a6 Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
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| 56c27438 | 09-Feb-2018 |
Steven Kao <skao@nvidia.com> |
Tegra194: 40-bit wide memory address space
This patch updates the memory address space, physical and virtual, to be 40-bits wide for all Tegra194 platforms.
Change-Id: Ie1bcdec2c4e8e15975048ce1c2a3
Tegra194: 40-bit wide memory address space
This patch updates the memory address space, physical and virtual, to be 40-bits wide for all Tegra194 platforms.
Change-Id: Ie1bcdec2c4e8e15975048ce1c2a31c2ae0dd494c Signed-off-by: Steven Kao <skao@nvidia.com>
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| 4719bba9 | 03-Dec-2019 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra194: psci: rename 'percpu_data' variable
The per CPU wake times are saved in an array called 't19x_percpu_data'. But, there is one instance in the code where the name of the variable is misspel
Tegra194: psci: rename 'percpu_data' variable
The per CPU wake times are saved in an array called 't19x_percpu_data'. But, there is one instance in the code where the name of the variable is misspelt.
This patch fixes this typographical error to fix compilation errors.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Change-Id: I52f5f0b150c51d8cc38372675415dec7944a7735
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| 953dc541 | 10-Dec-2019 |
Alexei Fedorov <Alexei.Fedorov@arm.com> |
Merge "Use the proper size for tb_fw_cfg_dtb" into integration |
| 9be5ca7a | 10-Dec-2019 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "arm: Fix current RECLAIM_INIT_CODE behavior" into integration |
| a71c59d5 | 16-Jul-2019 |
Ambroise Vincent <ambroise.vincent@arm.com> |
arm: Fix current RECLAIM_INIT_CODE behavior
Previously the .init section was created even when the reclaim flag was manually set to 0.
Change-Id: Ia9e7c7997261f54a4eca725d7ea605192f60bcf8 Signed-of
arm: Fix current RECLAIM_INIT_CODE behavior
Previously the .init section was created even when the reclaim flag was manually set to 0.
Change-Id: Ia9e7c7997261f54a4eca725d7ea605192f60bcf8 Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com> Zelalem Aweke <zelalem.aweke@arm.com>
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| 6c77dfc5 | 09-Dec-2019 |
Louis Mayencourt <louis.mayencourt@arm.com> |
Use the proper size for tb_fw_cfg_dtb
Currently tb_fw_cfg_dtb size is fixed to max, which is generally a page (but depend on the platform). Instead, read the actual size of the dtb with the libfdt "
Use the proper size for tb_fw_cfg_dtb
Currently tb_fw_cfg_dtb size is fixed to max, which is generally a page (but depend on the platform). Instead, read the actual size of the dtb with the libfdt "fdt_totalsize" function. This avoid flushing extra memory after updating the dtb with mbedtls heap information when shared heap is used.
Change-Id: Ibec727661116429f486464a0c9f15e9760d7afe2 Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
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| 9e78cb18 | 08-Dec-2019 |
Jan Kiszka <jan.kiszka@siemens.com> |
rpi3/4: Add support for offlining CPUs
The hooks were populated but the power down left the CPU in limbo-land. What we need to do - until there is a way to actually power off - is to turn off the MM
rpi3/4: Add support for offlining CPUs
The hooks were populated but the power down left the CPU in limbo-land. What we need to do - until there is a way to actually power off - is to turn off the MMU and enter the spinning loop as if we were cold-booted. This allows the on-call to pick up the CPU again.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Change-Id: Iefc7a58424e3578ad3dd355a7bd6eaba4b412699
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| f224bd4e | 06-Dec-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge changes from topic "allwinner_bl31_size" into integration
* changes: Reduce space lost to object alignment imx: Fix multiple definition of ipc_handle imx: Fix missing inclusion of cdefs.h |