History log of /rk3399_ARM-atf/plat/ (Results 5501 – 5525 of 8868)
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960896eb27-Feb-2020 Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>

intel: Update RSU driver return code

Modify RSU driver error code for backward-compatibility with
Linux RSU driver

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.hal

intel: Update RSU driver return code

Modify RSU driver error code for backward-compatibility with
Linux RSU driver

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: Ib9e38d4017efe35d3aceeee27dce451fbd429fb5

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8d48810f26-Feb-2020 Sandrine Bailleux <sandrine.bailleux@arm.com>

Merge "uniphier: prepare uniphier_soc_info() for next SoC" into integration

8b29a0f626-Feb-2020 Olivier Deprez <olivier.deprez@arm.com>

Merge "FVP: Fix incorrect GIC mapping" into integration

c335ad4826-Feb-2020 Olivier Deprez <olivier.deprez@arm.com>

Merge "allwinner: Implement PSCI system suspend using SCPI" into integration

fbe228b126-Feb-2020 Olivier Deprez <olivier.deprez@arm.com>

Merge "allwinner: Add a msgbox driver for use with SCPI" into integration

dd53cfe103-Feb-2020 Masahiro Yamada <yamada.masahiro@socionext.com>

uniphier: prepare uniphier_soc_info() for next SoC

The revision register address will be changed in the next SoC.

The LSI revision is needed in order to know where the revision
register is located,

uniphier: prepare uniphier_soc_info() for next SoC

The revision register address will be changed in the next SoC.

The LSI revision is needed in order to know where the revision
register is located, but you need to read out the revision
register for that. This is impossible.

We need to know the revision register address by other means.
Use BL_CODE_BASE, where the base address of the TF image that is
currently running. If it is bigger than 0x80000000 (i.e. the DRAM
base is 0x80000000), we assume it is a legacy SoC.

Change-Id: I9d7f4325fe2085a8a1ab5310025e5948da611256
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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7b36a7e926-Feb-2020 Olivier Deprez <olivier.deprez@arm.com>

Merge "allwinner: Reserve and map space for the SCP firmware" into integration

cf92be2926-Feb-2020 Sandrine Bailleux <sandrine.bailleux@arm.com>

Merge "plat: imx8m: Fix the rdc memory region slot's offset" into integration

896d684d25-Feb-2020 Mark Dykes <mardyk01@review.trustedfirmware.org>

Merge changes from topic "console_t_cleanup" into integration

* changes:
marvell: Consolidate console register calls
uniphier: Use generic console_t data structure
spe: Use generic console_t d

Merge changes from topic "console_t_cleanup" into integration

* changes:
marvell: Consolidate console register calls
uniphier: Use generic console_t data structure
spe: Use generic console_t data structure
LS 16550: Use generic console_t data structure
stm32: Use generic console_t data structure
rcar: Use generic console_t data structure
a3700: Use generic console_t data structure
16550: Use generic console_t data structure
imx: Use generic console_t data structure

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/rk3399_ARM-atf/drivers/imx/uart/imx_uart.h
/rk3399_ARM-atf/drivers/marvell/uart/a3700_console.S
/rk3399_ARM-atf/drivers/renesas/rcar/console/rcar_console.S
/rk3399_ARM-atf/drivers/renesas/rcar/scif/scif.S
/rk3399_ARM-atf/drivers/st/uart/aarch32/stm32_console.S
/rk3399_ARM-atf/drivers/ti/uart/aarch32/16550_console.S
/rk3399_ARM-atf/drivers/ti/uart/aarch64/16550_console.S
/rk3399_ARM-atf/include/drivers/marvell/uart/a3700_console.h
/rk3399_ARM-atf/include/drivers/renesas/rcar/console/console.h
/rk3399_ARM-atf/include/drivers/st/stm32_console.h
/rk3399_ARM-atf/include/drivers/ti/uart/uart_16550.h
allwinner/common/sunxi_bl31_setup.c
imx/common/include/imx8_lpuart.h
imx/common/include/imx_uart.h
imx/imx7/common/imx7_bl2_el3_common.c
imx/imx8m/imx8mm/imx8mm_bl31_setup.c
imx/imx8m/imx8mq/imx8mq_bl31_setup.c
imx/imx8qm/imx8qm_bl31_setup.c
imx/imx8qx/imx8qx_bl31_setup.c
intel/soc/agilex/bl2_plat_setup.c
intel/soc/agilex/bl31_plat_setup.c
intel/soc/stratix10/bl2_plat_setup.c
intel/soc/stratix10/bl31_plat_setup.c
layerscape/common/aarch64/ls_console.S
layerscape/common/include/ls_16550.h
layerscape/common/ls_bl1_setup.c
layerscape/common/ls_bl2_setup.c
layerscape/common/ls_bl31_setup.c
layerscape/common/tsp/ls_tsp_setup.c
marvell/common/marvell_console.c
mediatek/mt8173/bl31_plat_setup.c
mediatek/mt8183/bl31_plat_setup.c
nvidia/tegra/common/drivers/spe/shared_console.S
nvidia/tegra/include/drivers/spe.h
nvidia/tegra/soc/t132/plat_setup.c
nvidia/tegra/soc/t186/plat_setup.c
nvidia/tegra/soc/t194/plat_setup.c
nvidia/tegra/soc/t210/plat_setup.c
renesas/rcar/rcar_common.c
rockchip/common/bl31_plat_setup.c
rockchip/common/sp_min_plat_setup.c
rpi/common/rpi3_common.c
socionext/uniphier/uniphier_console.S
socionext/uniphier/uniphier_console_setup.c
st/stm32mp1/bl2_plat_setup.c
st/stm32mp1/sp_min/sp_min_setup.c
ti/k3/common/k3_console.c
c723ef0125-Feb-2020 Mark Dykes <mardyk01@review.trustedfirmware.org>

Merge changes from topic "console_t_cleanup" into integration

* changes:
coreboot: Use generic base address
skeletton: Use generic console_t data structure
cdns: Use generic console_t data str

Merge changes from topic "console_t_cleanup" into integration

* changes:
coreboot: Use generic base address
skeletton: Use generic console_t data structure
cdns: Use generic console_t data structure

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093dce7025-Feb-2020 Mark Dykes <mardyk01@review.trustedfirmware.org>

Merge "pl011: Use generic console_t data structure" into integration

ad8922fc25-Feb-2020 Mark Dykes <mardyk01@review.trustedfirmware.org>

Merge "meson: Use generic console_t data structure" into integration

02ad9cd625-Feb-2020 Mark Dykes <mardyk01@review.trustedfirmware.org>

Merge "allwinner: Adjust SRAM A2 base to include the ARISC vectors" into integration

020ce8c925-Feb-2020 Mark Dykes <mardyk01@review.trustedfirmware.org>

Merge "Read-only xlat tables for BL31 memory" into integration

b3c431f324-Feb-2020 Alexei Fedorov <Alexei.Fedorov@arm.com>

FVP: Fix incorrect GIC mapping

This patch fixes incorrect setting for DEVICE1_SIZE
for FVP platforms with more than 8 PEs.
The current value of 0x200000 supports only 8 PEs
and causes exception for

FVP: Fix incorrect GIC mapping

This patch fixes incorrect setting for DEVICE1_SIZE
for FVP platforms with more than 8 PEs.
The current value of 0x200000 supports only 8 PEs
and causes exception for FVP platforms with the greater
number of PEs, e.g. FVP_Base_Cortex_A65AEx8 with 16 PEs
in one cluster.

Change-Id: Ie6391509fe6eeafb8ba779303636cd762e7d21b2
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>

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3546afff25-Feb-2020 Soby Mathew <soby.mathew@arm.com>

Merge "mediatek: mt8183: protect 4GB~8GB dram memory" into integration

f7427da125-Feb-2020 Soby Mathew <soby.mathew@arm.com>

Merge "uniphier: make on-chip SRAM region configurable" into integration

e772a6d129-Jan-2020 Ahmad Fatoum <a.fatoum@pengutronix.de>

stm32mp1: platform.mk: support generating multiple images in one build

Board Support for the stm32mp1 platform is contained in the device tree,
so if we remove hardcoding of board name from the Make

stm32mp1: platform.mk: support generating multiple images in one build

Board Support for the stm32mp1 platform is contained in the device tree,
so if we remove hardcoding of board name from the Makefile, we can build
the intermediary objects once and generate one new tf-a-*.stm32 binary
for every device tree specified. All in one go.

With implicit rules implemented, we only need to change the top level
target to support multi-image builds on the stm32mp1.

Change-Id: I4cae7d32a4c03a3c29c559dc5332e002223902c1
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>

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a3db33fd29-Jan-2020 Ahmad Fatoum <a.fatoum@pengutronix.de>

stm32mp1: platform.mk: migrate to implicit rules

Board Support for the stm32mp1 platform is contained in the device tree,
so if we remove hardcoding of board name from the Makefile, we can build
the

stm32mp1: platform.mk: migrate to implicit rules

Board Support for the stm32mp1 platform is contained in the device tree,
so if we remove hardcoding of board name from the Makefile, we can build
the intermediary objects once and generate one new tf-a-*.stm32 binary
for every device tree specified. All in one go.

Prepare for this by employing implicit rules.

Change-Id: I5a022a89eb12696cd8cee7bf28ac6be54849901f
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>

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1a0b5a5729-Jan-2020 Ahmad Fatoum <a.fatoum@pengutronix.de>

stm32mp1: platform.mk: derive map file name from target name

Doing this allows us in the next commit to use implicit rules (%-patterns)
to cover all the images we generate during a stm32mp1 build.

stm32mp1: platform.mk: derive map file name from target name

Doing this allows us in the next commit to use implicit rules (%-patterns)
to cover all the images we generate during a stm32mp1 build.

Change-Id: Ibde59d10ccce42566f82820117d7fd0d77345e6c
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>

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fc4fdf7129-Jan-2020 Ahmad Fatoum <a.fatoum@pengutronix.de>

stm32mp1: platform.mk: generate linker script with fixed name

The linker script has no board-specific information that necessitates it
having a name derived from the board name. Give it a fixed name

stm32mp1: platform.mk: generate linker script with fixed name

The linker script has no board-specific information that necessitates it
having a name derived from the board name. Give it a fixed name, so we
can later reuse the same linker script for multiple boards.

Change-Id: Ie6650f00389f4ab8577ae82a36c620af9c64101e
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>

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17abf94725-Feb-2020 Ahmad Fatoum <a.fatoum@pengutronix.de>

stm32mp1: platform.mk: use PHONY for the appropriate targets

Currently, building TF-A for STM32MP1 triggers a full rebuild,
avoid this by removing the .PHONY: specification for the final image and
r

stm32mp1: platform.mk: use PHONY for the appropriate targets

Currently, building TF-A for STM32MP1 triggers a full rebuild,
avoid this by removing the .PHONY: specification for the final image and
replace it by specifying PHONYness for the targets that don't actually
produce file output.

This will come in handy in follow-up commits, when implicit rules are
introduced, as implicit rule search is skipped for .PHONY targets.

Change-Id: Ib9966479032b081a54123b99f889760e85639f19
Fixes: f74cbc93a ("stm32mp1: Link BL2, BL32 and DTB in one binary")
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>

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7db9a0b925-Jan-2020 Andre Przywara <andre.przywara@arm.com>

marvell: Consolidate console register calls

Now that different UARTs share the same console_t struct, we can
simplify the console selection for the Marvell platforms:
We share the same console_t poi

marvell: Consolidate console register calls

Now that different UARTs share the same console_t struct, we can
simplify the console selection for the Marvell platforms:
We share the same console_t pointers, just change the name of the
console register functions, depending on the selected platform.

Change-Id: I6fe3e49fd7f208a9b3372c5deef43236a12867bc
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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f695e1e025-Jan-2020 Andre Przywara <andre.przywara@arm.com>

pl011: Use generic console_t data structure

Since now the generic console_t structure holds the UART base address as
well, let's use that generic location and drop the UART driver specific
data stru

pl011: Use generic console_t data structure

Since now the generic console_t structure holds the UART base address as
well, let's use that generic location and drop the UART driver specific
data structure at all.

Change-Id: I7a23327394d142af4b293ea7ccd90b843c54587c
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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489e298725-Jan-2020 Andre Przywara <andre.przywara@arm.com>

meson: Use generic console_t data structure

Since now the generic console_t structure holds the UART base address as
well, let's use that generic location and drop the UART driver specific
data stru

meson: Use generic console_t data structure

Since now the generic console_t structure holds the UART base address as
well, let's use that generic location and drop the UART driver specific
data structure at all.

Change-Id: I07a07677153d3671ced776671e4f107824d3df16
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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