| 50eee85e | 27-Aug-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "n1sdp: remote chip SPI numbering for multichip GIC routing" into integration |
| 262aceaa | 12-Aug-2020 |
Sandeep Tripathy <sandeep.tripathy@broadcom.com> |
ehf: use common priority level enumuration
'EHF' is used by RAS, SDEI, SPM_MM common frameworks. If platform needs to plug-in specific handlers then 'PLAT_EHF_DESC' can be used to populate platform
ehf: use common priority level enumuration
'EHF' is used by RAS, SDEI, SPM_MM common frameworks. If platform needs to plug-in specific handlers then 'PLAT_EHF_DESC' can be used to populate platform specific priority levels.
Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com> Change-Id: I37af7e0e48111f87b6982604bf5c15db3e05755d
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| a4c979ad | 26-Aug-2020 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes I6bf1db15,I8631c34a,Id76ada14 into integration
* changes: qti/sc7180: Do shutdown handling outside qtiseclib qti: Add SPMI PMIC arbitrator driver qti/sc7180: Fix GIC-600 support
Merge changes I6bf1db15,I8631c34a,Id76ada14 into integration
* changes: qti/sc7180: Do shutdown handling outside qtiseclib qti: Add SPMI PMIC arbitrator driver qti/sc7180: Fix GIC-600 support setting
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| 522a2277 | 21-Feb-2019 |
Julius Werner <jwerner@chromium.org> |
qti/sc7180: Do shutdown handling outside qtiseclib
With an open source SPMI driver we can now remove qtiseclib involvement in reset and shutdown handling by setting the required registers directly.
qti/sc7180: Do shutdown handling outside qtiseclib
With an open source SPMI driver we can now remove qtiseclib involvement in reset and shutdown handling by setting the required registers directly.
Change-Id: I6bf1db15734048df583daa2a4ee98701c6ece621 Signed-off-by: Julius Werner <jwerner@chromium.org>
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| 3e1e08b7 | 25-Aug-2020 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "tegra194-spmd" into integration
* changes: Tegra194: introduce support for `SPD=spmd` Tegra: introduce backend support to compile libfdt Tegra: disable signed compari
Merge changes from topic "tegra194-spmd" into integration
* changes: Tegra194: introduce support for `SPD=spmd` Tegra: introduce backend support to compile libfdt Tegra: disable signed comparison plat: common: include "bl_common.h" from plat_spmd_manifest.c
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| f40008a4 | 05-Jun-2019 |
Julius Werner <jwerner@chromium.org> |
qti: Add SPMI PMIC arbitrator driver
This patch adds a very rudimentary driver for the SPMI arbitrator used to access the PMIC. It doesn't support all the controller's actual arbitration features, s
qti: Add SPMI PMIC arbitrator driver
This patch adds a very rudimentary driver for the SPMI arbitrator used to access the PMIC. It doesn't support all the controller's actual arbitration features, so it should probably not be used concurrently with a running kernel (and it's also not optimized for performance). But it can be used to set a few registers during boot or on shutdown to control reset handling, which is all we need it for.
Change-Id: I8631c34a2a89ac71aa1ec9b8266e818c922fe34a Signed-off-by: Julius Werner <jwerner@chromium.org>
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| 2acf0043 | 25-Aug-2020 |
Julius Werner <jwerner@chromium.org> |
qti/sc7180: Fix GIC-600 support setting
The patch adding platform support for sc7180 landed around roughly the same time as the patch that changed GICV3_IMPL to GICV3_SUPPORT_GIC600. Thus the sc7180
qti/sc7180: Fix GIC-600 support setting
The patch adding platform support for sc7180 landed around roughly the same time as the patch that changed GICV3_IMPL to GICV3_SUPPORT_GIC600. Thus the sc7180 Makefile is still using the old variable name which now no longer does anything, and it hangs on boot due to the lacking GIC-600 support. This patch fixes the issue.
Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: Id76ada1445c3c5ac9a5a3697b4e749088b89d796
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| 670306d3 | 20-Jul-2020 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra194: introduce support for `SPD=spmd`
This patch introduces the following changes to enable compilation for `SPD=spmd` command line option.
* compile plat_spmd_manifest.c * compile libfdt sour
Tegra194: introduce support for `SPD=spmd`
This patch introduces the following changes to enable compilation for `SPD=spmd` command line option.
* compile plat_spmd_manifest.c * compile libfdt source files
Verified with the `SPD=spmd` command line option for Tegra194 platforms.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Change-Id: I7f57aa4f1756b19f78d87415bb80794417174bc8
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| eb7e5087 | 20-Jul-2020 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: introduce backend support to compile libfdt
This patch includes the following files from libc to compile libfdt:
* memchr.c * memcmp.c * strrchr.c
The BUILD_PLAT macro is evaluated earlier
Tegra: introduce backend support to compile libfdt
This patch includes the following files from libc to compile libfdt:
* memchr.c * memcmp.c * strrchr.c
The BUILD_PLAT macro is evaluated earlier to allow libfdt installation to the right directory.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Change-Id: Ie43fcf701dc051670e6372e21b3a84a6416c1735
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| 8d51439e | 24-Aug-2020 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: disable signed comparison
libfdt does not support the -Wsign-compare compiler option and the right patch will eventually be pushed upstream.
This patch disables the -Wsign-compare compiler o
Tegra: disable signed comparison
libfdt does not support the -Wsign-compare compiler option and the right patch will eventually be pushed upstream.
This patch disables the -Wsign-compare compiler option to allow libfdt compilation for Tegra platforms until the actual issue is fixed.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Change-Id: Ib7a93946cad1ea9ec1b46751edb79a74c08ed0ac
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| cb7b9db1 | 20-Jul-2020 |
Varun Wadekar <vwadekar@nvidia.com> |
plat: common: include "bl_common.h" from plat_spmd_manifest.c
This patch includes the bl_common.h from plat_spmd_manifest.c to fix the following compilation errors
<snip> plat/common/plat_spmd_mani
plat: common: include "bl_common.h" from plat_spmd_manifest.c
This patch includes the bl_common.h from plat_spmd_manifest.c to fix the following compilation errors
<snip> plat/common/plat_spmd_manifest.c: In function 'plat_spm_core_manifest_load': plat/common/plat_spmd_manifest.c:130:18: error: implicit declaration of function 'page_align' [-Werror=implicit-function-declaration] 130 | pm_base_align = page_align(pm_base, UP); | ^~~~~~~~~~ plat/common/plat_spmd_manifest.c:130:38: error: 'UP' undeclared (first use in this function); did you mean 'UL'? 130 | pm_base_align = page_align(pm_base, UP); | ^~ | UL plat/common/plat_spmd_manifest.c:130:38: note: each undeclared identifier is reported only once for each function it appears in plat/common/plat_spmd_manifest.c:146:38: error: 'DOWN' undeclared (first use in this function) 146 | pm_base_align = page_align(pm_base, DOWN); | ^~~~ cc1: all warnings being treated as errors <snip>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Change-Id: Ib8edb36c6a80a23df2462e708c513c966aab1fef
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| be41aac7 | 17-Feb-2020 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra194: remove AON_WDT IRQ mapping
This patch removes the unused interrupt mapping for AON_WDT for all Tegra194 platforms.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Change-Id: I475a1e83f
Tegra194: remove AON_WDT IRQ mapping
This patch removes the unused interrupt mapping for AON_WDT for all Tegra194 platforms.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Change-Id: I475a1e83f809c740e62464b5b4e93cb0a2e33d6b
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| 21ec61a9 | 26-Sep-2019 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: smmu: add smmu_verify function
The SMMU configuration can get corrupted or updated by external clients during boot without our knowledge.
This patch introduces a "verify" function for the SM
Tegra: smmu: add smmu_verify function
The SMMU configuration can get corrupted or updated by external clients during boot without our knowledge.
This patch introduces a "verify" function for the SMMU driver, to check that the boot configuration settings are intact. Usually, this function should be called at the end of the boot cycle.
This function only calls panic() on silicon platforms.
Change-Id: I2ab45a7f228781e71c73ba1f4ffc49353effe146 Signed-off-by: George Bauernschmidt <georgeb@nvidia.com>
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| 13fed5a7 | 22-Aug-2019 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: TZDRAM setup from soc specific early_boot handlers
TZDRAM setup is not required for all Tegra SoCs. The previous bootloader can enable the TZDRAM fence due to architectural improvements in th
Tegra: TZDRAM setup from soc specific early_boot handlers
TZDRAM setup is not required for all Tegra SoCs. The previous bootloader can enable the TZDRAM fence due to architectural improvements in the newer chips.
This patch moves the TZDRAM setup to early_boot handlers for SoCs to handle this scenario.
Change-Id: I6481b4f848a4dadc20cb83852cd8e19a242b3a34 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| f41dc86c | 16-Oct-2019 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: remove "platform_get_core_pos" function
This patch removes the deprecated 'plat_core_pos_by_mpidr' function from the Tegra platform port.
Change-Id: I32e06cb7269e4fbfaf9ad6c26d0722201f982f9e
Tegra: remove "platform_get_core_pos" function
This patch removes the deprecated 'plat_core_pos_by_mpidr' function from the Tegra platform port.
Change-Id: I32e06cb7269e4fbfaf9ad6c26d0722201f982f9e Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| 7cd336ab | 04-Oct-2019 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: print GICC registers conditionally
The GICC interface exists only on the interrupt controllers following the GICv2 specification.
This patch prints the GICC register contents from the platfo
Tegra: print GICC registers conditionally
The GICC interface exists only on the interrupt controllers following the GICv2 specification.
This patch prints the GICC register contents from the platform's macro, plat_crash_print_regs' only when TEGRA_GICC_BASE is defined. This allows platforms using future versions of the GIC specification to still use this macro.
Change-Id: Ia5762d0a1ae28c832664d69362a7776e46a22ad1 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| 64b2a237 | 13-Sep-2019 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: spe: do not flush console in console_putc
SPE no longer requires the flush bit to be set to start transmitting characters over the physical uart. Therefore, the flush bit is no longer require
Tegra: spe: do not flush console in console_putc
SPE no longer requires the flush bit to be set to start transmitting characters over the physical uart. Therefore, the flush bit is no longer required when calling console_core_putc. However, flushing the console still requires the flush bit.
This patch removes the flush bit from the mailbox messages in console_core_putc to improve ACK latency.
Original change by: Mustafa Bilgen <mbilgen@nvidia.com>
Change-Id: I5b7d1f3ea69ea2ce308566dbaae222b04e4c373d Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| fbcd053c | 13-Sep-2019 |
kalyanic <kalyanic@nvidia.com> |
Tegra: verify platform compatibility
This patch verifies that the binary image is compatible with chip ID of the platform.
Change-Id: I28db221b4442aa8827a092faadf32f110d7c5cb4 Signed-off-by: kalyan
Tegra: verify platform compatibility
This patch verifies that the binary image is compatible with chip ID of the platform.
Change-Id: I28db221b4442aa8827a092faadf32f110d7c5cb4 Signed-off-by: kalyanic <kalyanic@nvidia.com>
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| 0df3eb70 | 31-Jul-2020 |
Sayanta Pattanayak <sayanta.pattanayak@arm.com> |
n1sdp: remote chip SPI numbering for multichip GIC routing
Allocated 512-959 SPI numbers for remote n1sdp chip and same has been referenced for GIC routing table.
Change-Id: Id79ea493fd665ed93fe964
n1sdp: remote chip SPI numbering for multichip GIC routing
Allocated 512-959 SPI numbers for remote n1sdp chip and same has been referenced for GIC routing table.
Change-Id: Id79ea493fd665ed93fe9644a59e363ec10441098 Signed-off-by: Sayanta Pattanayak <sayanta.pattanayak@arm.com>
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| 8d0a3bb3 | 21-Aug-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "Revert "libc/memset: Implement function in assembler"" into integration |
| f5402ef7 | 19-Aug-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Revert "libc/memset: Implement function in assembler"
This reverts commit e7d344de01ad11b856233634717aafe9312697e4. This reverts the patch https://review.trustedfirmware.org/c/TF-A/trusted-firmware
Revert "libc/memset: Implement function in assembler"
This reverts commit e7d344de01ad11b856233634717aafe9312697e4. This reverts the patch https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/5313 due to a timing issue with the merge. The merge occurred at the same time as the additional comments and thusly were were not seen until the merge was done. This reverts the change and additional patches from Alexei will follow to address the concerns expressed in the orignal patch.
Change-Id: Iae5f6403c93ac13ceeda29463883fcd4c437f2b7
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| 2111b002 | 12-Jun-2020 |
Olivier Deprez <olivier.deprez@arm.com> |
SPMC: manifest changes to support multicore boot
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com> Change-Id: Icf90c2ccce75257908ba3d470392
SPMC: manifest changes to support multicore boot
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com> Change-Id: Icf90c2ccce75257908ba3d4703926041d64b1dd3
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| 1566bc3e | 20-Aug-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "plat: imx8m: Fix the race condition during cpu hotplug" into integration |
| 76380111 | 20-Aug-2020 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "at_errata_fix" into integration
* changes: doc: Update description for AT speculative workaround lib/cpus: Report AT speculative erratum workaround Add wrapper for AT
Merge changes from topic "at_errata_fix" into integration
* changes: doc: Update description for AT speculative workaround lib/cpus: Report AT speculative erratum workaround Add wrapper for AT instruction
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| fe5e1c14 | 07-Jan-2020 |
Jacky Bai <ping.bai@nxp.com> |
plat: imx8m: Fix the race condition during cpu hotplug
CPU hotplug & cpuidle have some race condition when doing CPU hotplug stress test. different CPU cores have the chance to access the same GPC r
plat: imx8m: Fix the race condition during cpu hotplug
CPU hotplug & cpuidle have some race condition when doing CPU hotplug stress test. different CPU cores have the chance to access the same GPC register(A53_AD), so lock is necessary to do exlusive access.
Signed-off-by: Jacky Bai <ping.bai@nxp.com> Change-Id: I1296592e05fa78429c3f0fac066951521db755e3
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