plat/arm/board: enable AMU for RD-N2

AMU counters are used for monitoring the CPU performance. RD-N2 platform
has architected AMU available for each core. Enable the use of AMU by
non-secure OS for

plat/arm/board: enable AMU for RD-N2

AMU counters are used for monitoring the CPU performance. RD-N2 platform
has architected AMU available for each core. Enable the use of AMU by
non-secure OS for supporting the use of counters for processor
performance control (ACPI CPPC).

Change-Id: I5cc749cf63c18fc5c7563dd754c2f42990a97e23
Signed-off-by: Pranav Madhu <pranav.madhu@arm.com>

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plat/arm/board: enable AMU for RD-V1

AMU counters are used for monitoring the CPU performance. RD-V1 platform
has architected AMU available for each core. Enable the use of AMU by
non-secure OS for

plat/arm/board: enable AMU for RD-V1

AMU counters are used for monitoring the CPU performance. RD-V1 platform
has architected AMU available for each core. Enable the use of AMU by
non-secure OS for supporting the use of counters for processor
performance control (ACPI CPPC).

Change-Id: I4003d21407953f65b3ce99eaa8f496d6052546e0
Signed-off-by: Pranav Madhu <pranav.madhu@arm.com>

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plat/arm/sgi: allow all PSCI callbacks on RD-V1

Some of the PSCI platform callbacks were restricted on RD-V1 platform
because the idle was not functional. Now that it is functional, remove
all the r

plat/arm/sgi: allow all PSCI callbacks on RD-V1

Some of the PSCI platform callbacks were restricted on RD-V1 platform
because the idle was not functional. Now that it is functional, remove
all the restrictions on the use PSCI platform callbacks.

Change-Id: I4cb97cb54de7ee166c30f28df8fea653b6b425c7
Signed-off-by: Pranav Madhu <pranav.madhu@arm.com>

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plat: marvell: armada: a3k: Do not use 'echo -e' in Makefile

It does not have to be supported by the current shell used in Makefile.
Replace it by a simple echo with implicit newline.

Signed-off-by

plat: marvell: armada: a3k: Do not use 'echo -e' in Makefile

It does not have to be supported by the current shell used in Makefile.
Replace it by a simple echo with implicit newline.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I97fe44986ac36d3079d5258c67f0c9184537e7f0

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plat: marvell: armada: a3k: Remove unused variable WTMI_SYSINIT_IMG from Makefile

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I322c8aa65437abb61385f58b700a06b3e2e22e4f

plat: marvell: armada: Show informative build messages and blank lines

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: Ibc15db07c581eca29c1b1fbfb145cee50dc42605

plat: marvell: armada: Move definition of mrvl_flash target to common marvell_common.mk file

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: If545b3812787cc97b95dbd61ed51c37d30c5d412

plat: marvell: armada: a3k: Use $(Q) instead of @

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I09fd734510ec7019505263ff0ea381fab36944fa

plat: marvell: armada: a3k: Add a new target mrvl_uart which builds UART image

This change separates building of flash and UART images, so it is possible
to build only one of these images. Also this

plat: marvell: armada: a3k: Add a new target mrvl_uart which builds UART image

This change separates building of flash and UART images, so it is possible
to build only one of these images. Also this change allows make to build
them in parallel.

Target mrvl_flash now builds only flash image and mrvl_uart only UART
image. This change reflects it also in the documentation.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: Ie9ce4538d52188dd26d99dfeeb5ad171a5b818f3

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plat: marvell: armada: a3k: Build UART image files directly in $(BUILD_UART) subdirectory

This removes need to move files and also allows to build uart and flash
images in parallel.

Signed-off-by:

plat: marvell: armada: a3k: Build UART image files directly in $(BUILD_UART) subdirectory

This removes need to move files and also allows to build uart and flash
images in parallel.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I13bea547d7849615e1c1e11d333c8c99e568d3f6

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plat: marvell: armada: a3k: Build intermediate files in $(BUILD_PLAT) directory

Currently a3700_common.mk makefile builds intermediate files in TF-A top
level directory and also outside of the TF-A

plat: marvell: armada: a3k: Build intermediate files in $(BUILD_PLAT) directory

Currently a3700_common.mk makefile builds intermediate files in TF-A top
level directory and also outside of the TF-A tree. This change fixes this
issue and builds all intermediate files in $(BUILD_PLAT) directory.

Part of this change is also removal of 'rm' and 'mv' commands as there is
no need to remove or move intermediate files from outside of the TF-A build
tree.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I72e3a3024bd3fdba1b991a220184d750029491e9

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plat: marvell: armada: a3k: Correctly set DDR_TOPOLOGY and CLOCKSPRESET for WTMI

When building WTMI image we need to correctly set DDR_TOPOLOGY and
CLOCKSPRESET variables which WTMI build system exp

plat: marvell: armada: a3k: Correctly set DDR_TOPOLOGY and CLOCKSPRESET for WTMI

When building WTMI image we need to correctly set DDR_TOPOLOGY and
CLOCKSPRESET variables which WTMI build system expect. Otherwise it use
default values.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: Ib83002194c8a6c64a2014899ac049bd319e1652f

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plat: marvell: armada: a3k: Allow use of the system Crypto++ library

This change introduces two new A3720 parameters, CRYPTOPP_LIBDIR and
CRYPTOPP_INCDIR, which can be used to specify directory path

plat: marvell: armada: a3k: Allow use of the system Crypto++ library

This change introduces two new A3720 parameters, CRYPTOPP_LIBDIR and
CRYPTOPP_INCDIR, which can be used to specify directory paths to
pre-compiled Crypto++ library and header files.

When both new parameters are specified then the source code of Crypto++ via
CRYPTOPP_PATH parameter is not needed. And therefore it allows TF-A build
process to use system Crypto++ library.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I6d440f86153373b11b8d098bb68eb7325e86b20b

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plat: marvell: armada: a3k: Add checks that WTP, MV_DDR_PATH and CRYPTOPP_PATH are correctly defined

These variables must contain a path to a valid directory (not a file) which
really exists. Also W

plat: marvell: armada: a3k: Add checks that WTP, MV_DDR_PATH and CRYPTOPP_PATH are correctly defined

These variables must contain a path to a valid directory (not a file) which
really exists. Also WTP and MV_DDR_PATH must point to either a valid Marvell
release tarball or git repository.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I1ad80c41092cf3ea6a625426df62b7d9d6f37815

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Merge changes from topic "scmi-msg" into integration

* changes:
doc: maintainers: add scmi server
drivers: move scmi-msg out of st

Merge changes from topic "tp-feat-rng" into integration

* changes:
plat/qemu: Use RNDR in stack protector
Makefile: Add FEAT_RNG support define
Define registers for FEAT_RNG support

Merge changes I635cf82e,Iee3b4e0d into integration

* changes:
Makefile: Fix ${FIP_NAME} to be rebuilt only when needed
Makefile: Do not mark file targets as .PHONY target

Merge "plat/arm: css: Turn ON/OFF redistributor in sync with GIC CPU interface ON/OFF" into integration

allwinner: Allow conditional compilation of SCPI and native PSCI ops

Now that we have split the native and the SCPI version of the PSCI ops,
we can introduce build options to compile in either or bo

allwinner: Allow conditional compilation of SCPI and native PSCI ops

Now that we have split the native and the SCPI version of the PSCI ops,
we can introduce build options to compile in either or both of them.

If one version is not compiled in, some stub functions make sure the
common code still compiles and makes the right decisions.

By default both version are enabled (as before), but one of them can be
disabled on the make command line, or via a platform specific Makefile.

Change-Id: I0c019d8700c0208365eacf57809fb8bc608eb9c0
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>

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allwinner: Split native and SCPI-based PSCI implementations

In order to keep SCP firmware as optional, the original, limited native
PSCI implementation was kept around as a fallback. This turned out

allwinner: Split native and SCPI-based PSCI implementations

In order to keep SCP firmware as optional, the original, limited native
PSCI implementation was kept around as a fallback. This turned out to be
a good decision, as some newer SoCs omit the ARISC, and thus cannot run
SCP firmware.

However, keeping the two implementations in one file makes things
unnecessarily messy. First, it is difficult to compile out the
SCPI-based implementation where it is not applicable. Second the check
is done in each callback, while scpi_available is only updated at boot.
This makes the individual callbacks unnecessarily complicated.

It is cleaner to provide two entirely separate implementations in two
separate files. The native implementation does not support any kind of
CPU suspend, so its callbacks are greatly simplified. One function,
sunxi_validate_ns_entrypoint, is shared between the two implementations.

Finally, the logic for choosing between implementations is kept in a
third file, to provide for platforms where only one implementation is
applicable and the other is compiled out.

Change-Id: I4914f07d8e693dbce218e0e2394bef15c42945f8
Signed-off-by: Samuel Holland <samuel@sholland.org>

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allwinner: psci: Improve system shutdown/reset sequence

- When the SCPI shutdown/reset command returns success, the SCP is
still waiting for the CPU to enter WFI. Do that.
- Peform board-level pow

allwinner: psci: Improve system shutdown/reset sequence

- When the SCPI shutdown/reset command returns success, the SCP is
still waiting for the CPU to enter WFI. Do that.
- Peform board-level poweroff before CPU poweroff. If there is a PMIC
available, it will turn everything off including the CPUs, so doing
CPU poweroff first is a waste of cycles.
- During poweroff, attempt to turn off the local CPU using the ARISC.
This should use slightly less power than just an infinite WFI.
- Drop the WFI in the reset failure path. The panic will hang anyway.

Change-Id: I897efecb3fe4e77a56041b97dd273156ec51ef8e
Signed-off-by: Samuel Holland <samuel@sholland.org>

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allwinner: psci: Drop .pwr_domain_pwr_down_wfi callback

When operating on the local cpu, sunxi_cpu_power_off_self() only "arms"
the ARISC to perform the power-off process; the SCP waits for the CPU

allwinner: psci: Drop .pwr_domain_pwr_down_wfi callback

When operating on the local cpu, sunxi_cpu_power_off_self() only "arms"
the ARISC to perform the power-off process; the SCP waits for the CPU to
enter WFI before acutally powering it off. Since this matches the
expected split between .pwr_domain_off and .pwr_domain_pwr_down_wfi, we
can move the sunxi_cpu_power_off_self() call to sunxi_pwr_domain_off().
Since that change makes sunxi_pwr_down_wfi() equivalent to the default
implementation, the callback is no longer needed.

Change-Id: I7d65f66c550d1c69fa5e9945affd7a25b3d3ef42
Signed-off-by: Samuel Holland <samuel@sholland.org>

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allwinner: Separate code to power off self and other CPUs

Currently, sunxi_cpu_off() has two separate code paths: one for the
local CPU, and one for other CPUs. Let's split them in to two functions.

allwinner: Separate code to power off self and other CPUs

Currently, sunxi_cpu_off() has two separate code paths: one for the
local CPU, and one for other CPUs. Let's split them in to two functions.
This actually simplifies things, because all callers either operate on
the local CPU only (sunxi_pwr_down_wfi()) or other CPUs only
(sunxi_cpu_power_off_others()). This avoids needing a second MPIDR read
to choose the appropriate code path.

Change-Id: I55de85025235cc95466bfa106831fc4c2368f527
Signed-off-by: Samuel Holland <samuel@sholland.org>

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allwinner: Leave CPU power alone during BL31 setup

Disabling secondary CPUs during boot is unnecessary because the other
CPUs are already in reset, and it saves an entirely insignificant amount
of p

allwinner: Leave CPU power alone during BL31 setup

Disabling secondary CPUs during boot is unnecessary because the other
CPUs are already in reset, and it saves an entirely insignificant amount
of power. Let's remove this bit of code that was added mostly "because
we can", and along with it remove an unconditional dependency on the CPU
ops functions.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Change-Id: Ia77a1b722da6ba989c3992b656a6cde3f2238fd7

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allwinner: psci: Invert check in .validate_ns_entrypoint

Checking the exceptional case and letting the success case fall through
is not only more idiomatic, but it also allows adding more exceptiona

allwinner: psci: Invert check in .validate_ns_entrypoint

Checking the exceptional case and letting the success case fall through
is not only more idiomatic, but it also allows adding more exceptional
cases in the future, such as a check for overlapping secure DRAM.

Change-Id: I720441a6a8853fd7f211ebe851f14d921a6db03d
Signed-off-by: Samuel Holland <samuel@sholland.org>

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