| 459b2445 | 18-Aug-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "feat: enabling stack protector for diphda" into integration |
| f4616efa | 07-Jul-2021 |
johpow01 <john.powell@arm.com> |
cpu: add support for Demeter CPU
This patch adds the basic CPU library code to support the Demeter
CPU. This CPU is based on the Makalu-ELP core so that CPU lib code
was adapted to create this patc
cpu: add support for Demeter CPU
This patch adds the basic CPU library code to support the Demeter
CPU. This CPU is based on the Makalu-ELP core so that CPU lib code
was adapted to create this patch.
Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: Ib5740b748008a72788c557f0654d8d5e9ec0bb7f
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| d810e30d | 17-Aug-2021 |
Tom Cosgrove <tom.cosgrove@arm.com> |
fix(plat/arm_fpga): enable AMU extension
As done recently for plat/tc0 in b5863cab9, enable AMU explicitly.
This is necessary as the recent changes that enable SVE for the secure
world disable AMU b
fix(plat/arm_fpga): enable AMU extension
As done recently for plat/tc0 in b5863cab9, enable AMU explicitly.
This is necessary as the recent changes that enable SVE for the secure
world disable AMU by default in the CPTR_EL3 reset value.
Change-Id: Ie3abf1dee8a4e1c8c39f934da8e32d67891f5f09
Signed-off-by: Tom Cosgrove <tom.cosgrove@arm.com>
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| 99080bd1 | 16-Aug-2021 |
Yann Gautier <yann.gautier@foss.st.com> |
fix(plat/st): apply security at the end of BL2
Now that the DDR is mapped secured, the security settings (TZC400
firewall) have to be applied at the end of BL2 for the OP-TEE case.
This is required
fix(plat/st): apply security at the end of BL2
Now that the DDR is mapped secured, the security settings (TZC400
firewall) have to be applied at the end of BL2 for the OP-TEE case.
This is required to avoid checskum computation error on U-Boot binary,
for which MMU and TZC400 would not be aligned.
Change-Id: I4a364f7117960e8fae1b579f341b9f140b766ea6
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
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| d4ad3da0 | 24-Apr-2021 |
Varun Wadekar <vwadekar@nvidia.com> |
refactor(tegra132): deprecate platform
The Tegra132 platforms have reached their end of life and are
no longer used in the field. Internally and externally, all
known programs have removed support f
refactor(tegra132): deprecate platform
The Tegra132 platforms have reached their end of life and are
no longer used in the field. Internally and externally, all
known programs have removed support for this legacy platform.
This change removes this platform from the Tegra tree as a result.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Change-Id: I72edb689293e23b63290cdcaef60468b90687a5a
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| 5d2793a6 | 19-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
fix(rpi4): drop /memreserve/ region
Most DTBs used on the RaspberryPi contain a FDT /memreserve/ region,
that covers the original secondaries' spin table.
We need to reserve more memory than describ
fix(rpi4): drop /memreserve/ region
Most DTBs used on the RaspberryPi contain a FDT /memreserve/ region,
that covers the original secondaries' spin table.
We need to reserve more memory than described there, to cover the whole
of the TF-A image, so we add a /reserved-memory node to the DTB.
However having the same memory region described by both methods upsets
the Linux kernel and U-Boot, so we have to make sure there is only one
instance describing this reserved memory.
Keep our currently used /reserved-memory node, since it's more capable
(it allows to mark the region as secure memory). Add some code to drop
the original /memreserve/ region, since we don't need this anymore,
because we take the secondaries out of their original spin loop.
We explicitly check for the currently used size of 4KB for this region,
to be alerted by any changes to this region in the upstream DTB.
Change-Id: Ia3105560deb3f939e026f6ed715a9bbe68b56230
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| 485d1f80 | 16-Aug-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "refactor(plat/ea_handler): Use default ea handler implementation for panic" into integration |
| be3a51ce | 13-Aug-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "feat(plat/versal): add support for SLS mitigation" into integration |
| 30e8fa7e | 21-Jun-2021 |
Pali Rohár <pali@kernel.org> |
refactor(plat/ea_handler): Use default ea handler implementation for panic
Put default ea handler implementation into function plat_default_ea_handler()
which just print verbose information and pani
refactor(plat/ea_handler): Use default ea handler implementation for panic
Put default ea handler implementation into function plat_default_ea_handler()
which just print verbose information and panic, so it can be called also
from overwritten / weak function plat_ea_handler() implementation.
Replace every custom implementation of printing verbose error message of
external aborts in custom plat_ea_handler() functions by a common
implementation from plat_default_ea_handler() function.
Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I15897f61b62b4c3c29351e693f51d4df381f3b98
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| c87f2c1d | 13-Aug-2021 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes Id93c4573,Ib7fea862,I44b9e5a9,I9e0ef734,I94d550ce, ... into integration
* changes:
feat(plat/rcar3): emit RPC status to DT fragment if RPC unlocked
feat(plat/rcar3): add a DRAM siz
Merge changes Id93c4573,Ib7fea862,I44b9e5a9,I9e0ef734,I94d550ce, ... into integration
* changes:
feat(plat/rcar3): emit RPC status to DT fragment if RPC unlocked
feat(plat/rcar3): add a DRAM size setting for M3N
feat(plat/rcar3): update IPL and Secure Monitor Rev.3.0.0
feat(plat/rcar3): add new board revision for Salvator-XS/H3ULCB
feat(drivers/rcar3): ddr: add function to judge a DDR rank
fix(drivers/rcar3): ddr: update DDR setting for H3, M3, M3N
fix(drivers/rcar3): i2c_dvfs: fix I2C operation
fix(drivers/rcar3): fix CPG registers redefinition
fix(drivers/rcar3): emmc: remove CPG_CPGWPR redefinition
fix(plat/rcar3): generate two memory nodes for larger than 2 GiB channel 0
refactor(plat/rcar3): factor out DT memory node generation
feat(plat/rcar3): add optional support for gzip-compressed BL33
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| e528bc22 | 12-Aug-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "st_fip_fconf" into integration
* changes:
feat(io_mtd): offset management for FIP usage
feat(nand): count bad blocks before a given offset
feat(plat/st): add helper t
Merge changes from topic "st_fip_fconf" into integration
* changes:
feat(io_mtd): offset management for FIP usage
feat(nand): count bad blocks before a given offset
feat(plat/st): add helper to save boot interface
fix(plat/st): improve DDR get size function
refactor(plat/st): map DDR secure at boot
refactor(plat/st): rework TZC400 configuration
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| c7e4f1cf | 11-Aug-2021 |
Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> |
feat: enabling stack protector for diphda
This commit activates the stack protector feature for the diphda
platform.
Change-Id: Ib16b74871c62b67e593a76ecc12cd3634d212614
Signed-off-by: Abdellatif E
feat: enabling stack protector for diphda
This commit activates the stack protector feature for the diphda
platform.
Change-Id: Ib16b74871c62b67e593a76ecc12cd3634d212614
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
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| 5360449b | 12-Aug-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "feat(plat/imx/imx8m/imx8mm): enlarge BL33 (U-boot) size in FIP" into integration |
| 6ec0c65b | 09-Apr-2021 |
Usama Arif <usama.arif@arm.com> |
feat(plat/arm): Introduce TC1 platform
This renames tc0 platform folder and files to tc, and introduces
TARGET_PLATFORM variable to account for the differences between
TC0 and TC1.
Signed-off-by: U
feat(plat/arm): Introduce TC1 platform
This renames tc0 platform folder and files to tc, and introduces
TARGET_PLATFORM variable to account for the differences between
TC0 and TC1.
Signed-off-by: Usama Arif <usama.arif@arm.com>
Change-Id: I5b4a83f3453afd12542267091b3edab4c139c5cd
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|
| 8ce073e4 | 10-Aug-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "feat(plat/mdeiatek/mt8192): add DFD control in SiP service" into integration |
| e5c7a92b | 10-Aug-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "revert(plat/xilinx): add timeout while waiting for IPI Ack" into integration |
| abde216d | 10-Aug-2021 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "feat(ff-a): update FF-A version to v1.1" into integration |
| 62f9134d | 05-Aug-2021 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> |
revert(plat/xilinx): add timeout while waiting for IPI Ack
This reverts commit 4d9b9b2352f9a67849faf2d4484f5fcdd2788b01.
Timeout in IPI ack was added for functional safety reason.
Functional safety
revert(plat/xilinx): add timeout while waiting for IPI Ack
This reverts commit 4d9b9b2352f9a67849faf2d4484f5fcdd2788b01.
Timeout in IPI ack was added for functional safety reason.
Functional safety is not criteria for ATF. However, this
creates issues for APIs that take long or non-deterministic
duration like FPGA load. So revert this patch for now to fix
FPGA loading issue. Need to add support for non-blocking API
for FPGA loading with callback when API completes.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I940e798f1e2f7d0dfca1da5caaf8b94036d440c6
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| 5183e637 | 05-Jul-2021 |
Rex-BC Chen <rex-bc.chen@mediatek.com> |
feat(plat/mdeiatek/mt8192): add DFD control in SiP service
DFD (Design for Debug) is a debugging tool, which scans
flip-flops and dumps to internal RAM on the WDT reset.
After system reboots, those
feat(plat/mdeiatek/mt8192): add DFD control in SiP service
DFD (Design for Debug) is a debugging tool, which scans
flip-flops and dumps to internal RAM on the WDT reset.
After system reboots, those values could be showed for
debugging.
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I9c7af9a4f75216ed2c6b44458d121a352bef4b95
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| f34322c1 | 04-Aug-2021 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
fix: avoid redefinition of 'efi_guid' structure
Fixed the build error by removing the local definition of 'efi_guid'
structure in 'sgi_ras.c' file as this structure definition is already
populated i
fix: avoid redefinition of 'efi_guid' structure
Fixed the build error by removing the local definition of 'efi_guid'
structure in 'sgi_ras.c' file as this structure definition is already
populated in 'sgi_ras.c' file via 'uuid.h' header.
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I57687336863f2a0761c09b6c1aa00b4aa82a6a12
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| e1c732d4 | 11-Mar-2021 |
J-Alves <joao.alves@arm.com> |
feat(ff-a): update FF-A version to v1.1
Bump the required FF-A version in framework and manifests to v1.1 as
upstream feature development goes.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com
feat(ff-a): update FF-A version to v1.1
Bump the required FF-A version in framework and manifests to v1.1 as
upstream feature development goes.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: I89b2bd3828a13fc4344ccd53bc3ac9c0c22ab29f
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| 5e4e13e1 | 02-Aug-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "fw-update-2" into integration
* changes:
feat(sw_crc32): add software CRC32 support
refactor(hw_crc32): renamed hw_crc32 to tf_crc32
feat(fwu): avoid booting with an
Merge changes from topic "fw-update-2" into integration
* changes:
feat(sw_crc32): add software CRC32 support
refactor(hw_crc32): renamed hw_crc32 to tf_crc32
feat(fwu): avoid booting with an alternate boot source
docs(fwu): add firmware update documentation
feat(fwu): avoid NV counter upgrade in trial run state
feat(plat/arm): add FWU support in Arm platforms
feat(fwu): initialize FWU driver in BL2
feat(fwu): add FWU driver
feat(fwu): introduce FWU platform-specific functions declarations
docs(fwu_metadata): add FWU metadata build options
feat(fwu_metadata): add FWU metadata header and build options
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| c885d5c8 | 02-Jul-2021 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
refactor(hw_crc32): renamed hw_crc32 to tf_crc32
Renamed hw_crc32 to tf_crc32 to make the file and function
name more generic so that the same name can be used in upcoming
software CRC32 implementat
refactor(hw_crc32): renamed hw_crc32 to tf_crc32
Renamed hw_crc32 to tf_crc32 to make the file and function
name more generic so that the same name can be used in upcoming
software CRC32 implementation.
Change-Id: Idff8f70c50ca700a4328a27b49d5e1f14d2095eb
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| 2f1177b2 | 25-Jun-2021 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
feat(plat/arm): add FWU support in Arm platforms
Added firmware update support in Arm platforms by using
FWU platform hooks and compiling FWU driver in BL2
component.
Change-Id: I71af06c09d95c2c58e
feat(plat/arm): add FWU support in Arm platforms
Added firmware update support in Arm platforms by using
FWU platform hooks and compiling FWU driver in BL2
component.
Change-Id: I71af06c09d95c2c58e3fd766c4a61c5652637151
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| c7e39dcf | 02-Aug-2021 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "feat(ff-a): change manifest messaging method" into integration |