| 356ed961 | 27-Jan-2022 |
Yann Gautier <yann.gautier@st.com> |
fix(stm32mp1): add missing debug.h
Due to stm32mp_shres_helpers.h removal, the debug.h header is no more
included. It should then be added to stm32mp1_boot_device.c.
Signed-off-by: Yann Gautier <ya
fix(stm32mp1): add missing debug.h
Due to stm32mp_shres_helpers.h removal, the debug.h header is no more
included. It should then be added to stm32mp1_boot_device.c.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I397911ac05fdff464c010cf3b2e04320a781b4aa
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| ad216c10 | 10-Nov-2021 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
feat(stm32mp1): add support for building the FWU feature
Add support for enabling the FWU multi bank boot feature on the
platform.
Currently, this feature is supported on the STM32MP157C-DK2 board,
feat(stm32mp1): add support for building the FWU feature
Add support for enabling the FWU multi bank boot feature on the
platform.
Currently, this feature is supported on the STM32MP157C-DK2 board,
which boots off a uSD card. Also, support has been enabled when
booting from a FIP image.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: Ia69e858461e2daf599d41d66d7ff2ccae0c341c2
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| ba02add9 | 01-Dec-2021 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
feat(stm32mp1): add logic to pass the boot index to the Update Agent
With the FWU Multi Bank update feature, the platform can boot from one
of multiple banks(partitions). Pass the value of bank from
feat(stm32mp1): add logic to pass the boot index to the Update Agent
With the FWU Multi Bank update feature, the platform can boot from one
of multiple banks(partitions). Pass the value of bank from which the
platform has booted as boot index to the Update Agent. The Update
Agent will match this boot index value against the active_index field
in the metadata, and update the metadata if there is a mismatch.
Fow now, the mechanism to pass the boot index is platform specific. On
the STM32MP1 platform, the boot index value is passed through a
memorey mapped TAMP register on the SoC.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: I0aa665ff9c1db95be8ae19ed8de6d866587d6850
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| 0ca180f6 | 01-Dec-2021 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
feat(stm32mp1): add support for reading the metadata partition
Add support for reading the FWU metadata partition. The metadata
partition stores information on the current active bank along with
inf
feat(stm32mp1): add support for reading the metadata partition
Add support for reading the FWU metadata partition. The metadata
partition stores information on the current active bank along with
information on all the FWU updatable images on the platform. This
information is then used to identify the image to be booted.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: I66bc5ac718c21a49c504e698b5b1f5c4daed2d08
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| 8dd75531 | 01-Dec-2021 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
feat(stm32mp1): add logic to select the images to be booted
With the FWU multi bank boot feature enabled, the platform can boot
from one of the multiple banks(partitions) containing the firmware
ima
feat(stm32mp1): add logic to select the images to be booted
With the FWU multi bank boot feature enabled, the platform can boot
from one of the multiple banks(partitions) containing the firmware
images. The bank whose firmware components are to be booted is read
from the FWU metadata structure -- the image to be booted is thus
derived by reading the metadata.
Read the metadata and set the image spec of the corresponding image
type to point to the partition from which the image is to be booted.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: I3dfdc7e9202859e917ec4e1f7d1855aad42c6b70
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| 41bd8b9e | 10-Nov-2021 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
feat(stm32mp1): add GUID's for identifying firmware images to be booted
Add GUID's for identifying the firmware image type. With the FWU
multi bank boot feature enabled, these GUID values are used t
feat(stm32mp1): add GUID's for identifying firmware images to be booted
Add GUID's for identifying the firmware image type. With the FWU
multi bank boot feature enabled, these GUID values are used to
identify the firmware image to be booted. This is done by matching
GUID values of images in the io policy table with the Image GUID value
that is read from the FWU metadata structure.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: Id9751f02f95fc48ef68e4e3f9f0ddbf6d6319d3c
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| 8d6b4764 | 02-Jul-2021 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
feat(stm32mp1): add GUID values for updatable images
With the FWU multi bank feature enabled, the identification of
firmware image type is done using the image type GUID instead of
binary_type field
feat(stm32mp1): add GUID values for updatable images
With the FWU multi bank feature enabled, the identification of
firmware image type is done using the image type GUID instead of
binary_type field.
Add GUID values for the FIP image which can be updated through
the FWU firmware update feature. The GUID values are used in
identifying the firmware images.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: If7d9356aa8d2bb3fbcbc87100e6972f1a1862921
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| 6aaf257d | 17-Nov-2021 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
feat(fwu): pass a const metadata structure to platform routines
The metadata structure copy is passed to the platform routine to set
the image source to boot the platform from. This is done by readi
feat(fwu): pass a const metadata structure to platform routines
The metadata structure copy is passed to the platform routine to set
the image source to boot the platform from. This is done by reading
the metadata structure. Pass the metadata as a read-only copy to the
routine -- the routine only needs to consume the metadata values and
should not be able to update the metadata fields.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: I399cad99ab89c71483e5a32a1de0e22df304f8b0
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| d6854cd1 | 27-Jan-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "refactor(stm32mp1): use a macro for header size" into integration |
| 40886d5a | 20-Jan-2022 |
Jiafei Pan <Jiafei.Pan@nxp.com> |
refactor(ls1028a): fix header file group issue
ocram.h should be in platform includes group.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I43b6a279e48e1a173f8e7c601f2c8d48e6efc647 |
| b1963003 | 25-Jan-2022 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "decouple-tb-mb" into integration
* changes:
refactor(renesas): disable CRYPTO_SUPPORT option
refactor(fvp): avoid Measured-Boot dependency on Trusted-Boot
refactor(me
Merge changes from topic "decouple-tb-mb" into integration
* changes:
refactor(renesas): disable CRYPTO_SUPPORT option
refactor(fvp): avoid Measured-Boot dependency on Trusted-Boot
refactor(measured-boot): avoid Measured-Boot dependency on Trusted-Boot
build: introduce CRYPTO_SUPPORT build option
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| 24dc0a28 | 24-Jan-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "st_syscfg_updates" into integration
* changes:
feat(stm32mp1): add helper to enable high speed mode in low voltage
refactor(stm32mp1): add helpers for IO compensation c
Merge changes from topic "st_syscfg_updates" into integration
* changes:
feat(stm32mp1): add helper to enable high speed mode in low voltage
refactor(stm32mp1): add helpers for IO compensation cells
feat(stm32mp1): use clk_enable/disable functions
feat(stm32mp1): add timeout in IO compensation
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| d544dfcc | 01-Dec-2021 |
Takuya Sakata <takuya.sakata.wz@bp.renesas.com> |
fix(plat/rcar3): change stack size of BL31
Increase the stack size to avoid stack overflow
when the LOG_LEVEL compile option is set high.
Signed-off-by: Hideyuki Nitta <hideyuki.nitta.jf@hitachi.co
fix(plat/rcar3): change stack size of BL31
Increase the stack size to avoid stack overflow
when the LOG_LEVEL compile option is set high.
Signed-off-by: Hideyuki Nitta <hideyuki.nitta.jf@hitachi.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: I25047322763bff148dba13848a3a40f4c7cf90b7
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| 1b49ba0f | 01-Dec-2021 |
Takuya Sakata <takuya.sakata.wz@bp.renesas.com> |
fix(plat/rcar3): fix SYSTEM_OFF processing for R-Car D3
Fixed an issue where the CPU and Cluster could not be turned OFF
when the SYSTEM_OFF has executed.
Signed-off-by: Hideyuki Nitta <hideyuki.ni
fix(plat/rcar3): fix SYSTEM_OFF processing for R-Car D3
Fixed an issue where the CPU and Cluster could not be turned OFF
when the SYSTEM_OFF has executed.
Signed-off-by: Hideyuki Nitta <hideyuki.nitta.jf@hitachi.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: Id476f815b58246ae0574c04ccb3eb201d09039b9
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| b57d9d6f | 20-Jan-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "new_ls1043a" into integration
* changes:
docs(maintainers): update nxp layerscape maintainers
docs(plat/nxp/layerscape): add ls1043a soc and board support
feat(plat/n
Merge changes from topic "new_ls1043a" into integration
* changes:
docs(maintainers): update nxp layerscape maintainers
docs(plat/nxp/layerscape): add ls1043a soc and board support
feat(plat/nxp/ls1043ardb): add ls1043ardb board support
feat(plat/nxp/ls1043a): add ls1043a soc support
refactor(plat/ls1043): remove old implementation for platform ls1043
feat(nxp/driver/dcfg): add some macro definition
fix(nxp/common/setup): increase soc name maximum length
feat(nxp/common/errata): add SoC erratum a008850
feat(nxp/driver/tzc380): add tzc380 platform driver support
feat(tzc380): add sub-region register definition
feat(nxp/common/io): add ifc nor and nand as io devices
feat(nxp/driver/ifc_nand): add IFC NAND flash driver
feat(nxp/driver/ifc_nor): add IFC nor flash driver
feat(nxp/driver/csu): add bypass bit mask definition
feat(nxp/driver/dcfg): add gic address align register definition
feat(nxp/common/rcpm): add RCPM2 registers definition
fix(nxp/common/setup): fix total dram size checking
feat(nxp/common): add CORTEX A53 helper functions
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| e4bd65fe | 26-Sep-2021 |
Jiafei Pan <Jiafei.Pan@nxp.com> |
feat(plat/nxp/ls1043ardb): add ls1043ardb board support
The LS1043A reference design board (RDB) is a computing, evaluation,
and development platform that supports the Layerscape LS1043A
architectur
feat(plat/nxp/ls1043ardb): add ls1043ardb board support
The LS1043A reference design board (RDB) is a computing, evaluation,
and development platform that supports the Layerscape LS1043A
architecture processor.
The old implementation in tf-a (plat/layerscape/board/ls1043/) is removed,
and this patch is adding it back, it is using the unified software
component and architecture with all the other Layerscape platforms.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Change-Id: I83eee2f9254267b148960b05e25b6c9ba86cf07e
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| 3b0de918 | 26-Sep-2021 |
Jiafei Pan <Jiafei.Pan@nxp.com> |
feat(plat/nxp/ls1043a): add ls1043a soc support
The LS1043A processor was NXP's first quad-core, 64-bit Arm based
processor for embedded networking.
The old implementation in tf-a (plat/layerscape/
feat(plat/nxp/ls1043a): add ls1043a soc support
The LS1043A processor was NXP's first quad-core, 64-bit Arm based
processor for embedded networking.
The old implementation in tf-a (plat/layerscape/board/ls1043/) is removed,
and this patch is adding it back, it is using the unified software
component and architecture with all the other Layerscape platforms.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: rocket <rod.dorris@nxp.com>
Change-Id: Ia3877530fae6479bd4a33bbe46b0c0d28ab43160
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| ff4ec0a0 | 22-Oct-2021 |
Jiafei Pan <Jiafei.Pan@nxp.com> |
refactor(plat/ls1043): remove old implementation for platform ls1043
Remove old implementation for Layerscape ls1043a platform, and
will added it back with unified software architecture of all
Layer
refactor(plat/ls1043): remove old implementation for platform ls1043
Remove old implementation for Layerscape ls1043a platform, and
will added it back with unified software architecture of all
Layerscape platforms.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: If038c19ab04d70050ec8e6ab2097b1c4f8324e87
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| 3ccd7e45 | 21-Oct-2021 |
Jiafei Pan <Jiafei.Pan@nxp.com> |
fix(nxp/common/setup): increase soc name maximum length
Increate SoC name length as it is not enough for some
SoC personalities.
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan
fix(nxp/common/setup): increase soc name maximum length
Increate SoC name length as it is not enough for some
SoC personalities.
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I2142b4b5162dd3c9ab3afefcdc859063836d8bcc
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| 3d14a30b | 21-Oct-2021 |
Jiafei Pan <Jiafei.Pan@nxp.com> |
feat(nxp/common/errata): add SoC erratum a008850
Add SoC erratum a008850 support.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I1ef41c67737b7b5fdf1d892929a2d8040effc282 |
| b759727f | 21-Oct-2021 |
Jiafei Pan <Jiafei.Pan@nxp.com> |
feat(nxp/common/io): add ifc nor and nand as io devices
Added IFC Nor and NAN flash as boot IO devices.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ie1b87174d9c08d4e32138066b007fef6f8
feat(nxp/common/io): add ifc nor and nand as io devices
Added IFC Nor and NAN flash as boot IO devices.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ie1b87174d9c08d4e32138066b007fef6f8e3c5dd
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| bc378a0d | 20-Jan-2022 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "feat(tc): enable tracing" into integration |
| 8be574bf | 17-Sep-2020 |
Yann Gautier <yann.gautier@st.com> |
refactor(stm32mp1): use a macro for header size
Use STM32MP_HEADER_RESERVED_SIZE macro instead of a fixed value 0x3000
in linker script.
Change-Id: I2702285c15aebaa1304a891c8aaabc949a912ba6
Signed-
refactor(stm32mp1): use a macro for header size
Use STM32MP_HEADER_RESERVED_SIZE macro instead of a fixed value 0x3000
in linker script.
Change-Id: I2702285c15aebaa1304a891c8aaabc949a912ba6
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| dea02f4e | 12-Jan-2021 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp1): add helper to enable high speed mode in low voltage
This new function is used to fill the register(s) responsible to enable
high speed mode for pad in low voltage (<2.7V).
Change-Id
feat(stm32mp1): add helper to enable high speed mode in low voltage
This new function is used to fill the register(s) responsible to enable
high speed mode for pad in low voltage (<2.7V).
Change-Id: Ib8abc6628bdf51bbe6a866bc6a9bcdeb4a84a8f4
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| 1f4513cb | 16-Dec-2020 |
Yann Gautier <yann.gautier@st.com> |
refactor(stm32mp1): add helpers for IO compensation cells
Add enable_io_comp_cell and disable_io_comp_cell local helpers
to enable or disable an IO compensation cell.
Change-Id: I65295298a7ece572ae
refactor(stm32mp1): add helpers for IO compensation cells
Add enable_io_comp_cell and disable_io_comp_cell local helpers
to enable or disable an IO compensation cell.
Change-Id: I65295298a7ece572ae939e2db93d10b188de0f9e
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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