| d2a339df | 28-Mar-2022 |
Jacky Bai <ping.bai@nxp.com> |
feat(imx8m): enable conditional build for SDEI
SDEI support on imx8m is an optional feature, so make it conditional build, not enabled by default.
Signed-off-by: Jacky Bai <ping.bai@nxp.com> Change
feat(imx8m): enable conditional build for SDEI
SDEI support on imx8m is an optional feature, so make it conditional build, not enabled by default.
Signed-off-by: Jacky Bai <ping.bai@nxp.com> Change-Id: I6e7e8d77959ea352bc019f8468793992ec7ecfc4
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| 13ce03aa | 06-May-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "feat(intel): add SMPLSEL and DRVSEL setup for Stratix 10 MMC" into integration |
| 77850c96 | 13-Jun-2021 |
Franck LENORMAND <franck.lenormand@nxp.com> |
feat(plat/imx8m): do not release JR0 to NS if HAB is using it
In case JR0 is used by the HAB for secure boot, it can be used later for authenticating kernel or other binaries.
We are checking if th
feat(plat/imx8m): do not release JR0 to NS if HAB is using it
In case JR0 is used by the HAB for secure boot, it can be used later for authenticating kernel or other binaries.
We are checking if the HAB is using the JR by the DID set.
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com> Signed-off-by: Jacky Bai <ping.bai@nxp.com> Change-Id: I6e9595012262ffabfc3f3d4841f446f34e48e059
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| f65bdf3a | 06-Apr-2022 |
BenjaminLimJL <jit.loon.lim@intel.com> |
feat(intel): implement timer init divider via cpu frequency. (#1)
Get cpu frequency and update the timer init div with it. The timer is vary based on the cpu frequency instead of hardcoded. The impl
feat(intel): implement timer init divider via cpu frequency. (#1)
Get cpu frequency and update the timer init div with it. The timer is vary based on the cpu frequency instead of hardcoded. The implementation shall apply to only Agilex and S10
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com> Change-Id: I61684d9762ad34e5a60b8b176b60c8848db4b422
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| 2c87faba | 06-May-2022 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "fix(st): fix NULL pointer dereference issues" into integration |
| 44b9d577 | 06-May-2022 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "ffa_el3_spmc" into integration
* changes: feat(spmc): enable checking of execution ctx count feat(spmc): enable parsing of UUID from SP Manifest feat(spmc): add parti
Merge changes from topic "ffa_el3_spmc" into integration
* changes: feat(spmc): enable checking of execution ctx count feat(spmc): enable parsing of UUID from SP Manifest feat(spmc): add partition mailbox structs feat(plat/arm): allow BL32 specific defines to be used by SPMC_AT_EL3 feat(plat/fvp): add EL3 SPMC #defines test(plat/fvp/lsp): add example logical partition feat(spmc/lsp): add logical partition framework
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| b1391b29 | 06-May-2022 |
Yann Gautier <yann.gautier@st.com> |
fix(st): add missing header include
This issue is triggered when enabling -Wmissing-prototypes: plat/st/common/bl2_io_storage.c:114:5: warning: no previous prototype for 'open_fip' [-Wmissing-proto
fix(st): add missing header include
This issue is triggered when enabling -Wmissing-prototypes: plat/st/common/bl2_io_storage.c:114:5: warning: no previous prototype for 'open_fip' [-Wmissing-prototypes] 114 | int open_fip(const uintptr_t spec) | ^~~~~~~~ plat/st/common/bl2_io_storage.c:119:5: warning: no previous prototype for 'open_storage' [-Wmissing-prototypes] 119 | int open_storage(const uintptr_t spec) | ^~~~~~~~~~~~
Add missing stm32mp_io_storage.h header include, where those functions prototypes are defined.
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I2af69fadfc4780553f41b338cd93b731210672a6
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| fad4a717 | 06-May-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "xlnx_zynqmp_misra" into integration
* changes: fix(zynqmp): resolve misra R14.4 warnings fix(zynqmp): resolve misra R16.3 warnings fix(zynqmp): resolve misra R15.7 wa
Merge changes from topic "xlnx_zynqmp_misra" into integration
* changes: fix(zynqmp): resolve misra R14.4 warnings fix(zynqmp): resolve misra R16.3 warnings fix(zynqmp): resolve misra R15.7 warnings fix(zynqmp): resolve misra R15.6 warnings fix(zynqmp): resolve misra 7.2 warnings fix(zynqmp): resolve misra R10.3
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| e8ad3975 | 06-May-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "feat(brbe): add BRBE support for NS world" into integration |
| 78c82cd0 | 06-May-2022 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "ja/boot_protocol" into integration
* changes: fix(sptool): update Optee FF-A manifest feat(sptool): delete c version of the sptool feat(sptool): use python version of
Merge changes from topic "ja/boot_protocol" into integration
* changes: fix(sptool): update Optee FF-A manifest feat(sptool): delete c version of the sptool feat(sptool): use python version of sptool feat(sptool): python version of the sptool refactor(sptool): use SpSetupActions in sp_mk_generator.py feat(sptool): add python SpSetupActions framework
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| c884c9a5 | 06-May-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> |
fix(zynqmp): define and enable ARM_XLAT_TABLES_LIB_V1
Enable ARM_XLAT_TABLES_LIB_V1 as ZynqMP is using v1 library of translation tables.
With upstream patch d323af9e3d903d981b42f954844a95a6bfef91ab
fix(zynqmp): define and enable ARM_XLAT_TABLES_LIB_V1
Enable ARM_XLAT_TABLES_LIB_V1 as ZynqMP is using v1 library of translation tables.
With upstream patch d323af9e3d903d981b42f954844a95a6bfef91ab, the usage of MAP_REGION_FLAT is referring to definition in file include/lib/xlat_tables/xlat_tables_v2.h but while preparing xlat tables in lib/xlat_tables/xlat_tables_common.c it is referring to include/lib/xlat_tables/xlat_tables.h which is v1 xlat tables. Also, ZynqMP was using v1 so defined ARM_XLAT_TABLES_LIB_V1 to use v1 xlat tables everywhere. This fixes the issue of xlat tables failures as it takes v2 library mmap_region structure in some files and v1 in other files.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> Change-Id: Ibc0e1c536e19f4edd6a6315bf1b0dfcec33e2fdc
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| 2deff904 | 06-May-2022 |
Yann Gautier <yann.gautier@st.com> |
fix(st): fix NULL pointer dereference issues
The get_bl_mem_params_node() function could return NULL. Add asserts to check the return value is not NULL. This corrects coverity issues: pager_mem_par
fix(st): fix NULL pointer dereference issues
The get_bl_mem_params_node() function could return NULL. Add asserts to check the return value is not NULL. This corrects coverity issues: pager_mem_params = get_bl_mem_params_node(BL32_EXTRA1_IMAGE_ID); >>> CID 378360: (NULL_RETURNS) >>> Dereferencing "pager_mem_params", which is known to be "NULL".
paged_mem_params = get_bl_mem_params_node(BL32_EXTRA2_IMAGE_ID); >>> CID 378360: (NULL_RETURNS) >>> Dereferencing "paged_mem_params", which is known to be "NULL".
tos_fw_mem_params = get_bl_mem_params_node(TOS_FW_CONFIG_ID); >>> CID 378360: (NULL_RETURNS) >>> Dereferencing "tos_fw_mem_params", which is known to be "NULL".
Do the same for other occurrences of get_bl_mem_params_node() return not checked, in the functions plat_get_bl_image_load_info() and bl2_plat_handle_pre_image_load().
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I79165b1628fcee3da330f2db4ee5e1dafcb1b21f
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| dd1fe717 | 04-May-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> |
fix(zynqmp): resolve misra R14.4 warnings
MISRA Violation: MISRA-C:2012 R.14.4 The controlling expression of an if statement and the controlling expression of an iteration-statement shall have essen
fix(zynqmp): resolve misra R14.4 warnings
MISRA Violation: MISRA-C:2012 R.14.4 The controlling expression of an if statement and the controlling expression of an iteration-statement shall have essentially Boolean type.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> Change-Id: I8f3f6f956d1d58ca201fb5895f12bcaabf2afd3b
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| e7e5d303 | 29-Apr-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> |
fix(zynqmp): resolve misra R16.3 warnings
MISRA Violation: MISRA-C:2012 R.16.3 - An unconditional break statement shall terminate every switch-clause.
Signed-off-by: Venkatesh Yadav Abbarapu <venka
fix(zynqmp): resolve misra R16.3 warnings
MISRA Violation: MISRA-C:2012 R.16.3 - An unconditional break statement shall terminate every switch-clause.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> Change-Id: I96a8b627c593ff1293b725d443531e42368923c5
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| 16de22d0 | 04-May-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> |
fix(zynqmp): resolve misra R15.7 warnings
MISRA Violation: MISRA-C:2012 R.15.7 - All if . . else if constructs shall be terminated with an else statement.
Signed-off-by: Venkatesh Yadav Abbarapu <v
fix(zynqmp): resolve misra R15.7 warnings
MISRA Violation: MISRA-C:2012 R.15.7 - All if . . else if constructs shall be terminated with an else statement.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> Change-Id: If921ca7c30b2feea6535791aa15f4de7101c3134
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| eb0d2b17 | 29-Apr-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> |
fix(zynqmp): resolve misra R15.6 warnings
MISRA Violation: MISRA-C:2012 R.15.6 - The body of an iteration-statement or a selection-statement shall be a compound statement.
Signed-off-by: Venkates
fix(zynqmp): resolve misra R15.6 warnings
MISRA Violation: MISRA-C:2012 R.15.6 - The body of an iteration-statement or a selection-statement shall be a compound statement.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> Change-Id: I0fc8eeac0e592f00297a1ac42a1ba3df1144733b
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| 5bcbd2de | 29-Apr-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> |
fix(zynqmp): resolve misra 7.2 warnings
MISRA Violation: MISRA-C:2012 R.7.2 - A "u" or "U" suffix shall be applied to all integer constants that are represented in an unsigned type.
Signed-off-by:
fix(zynqmp): resolve misra 7.2 warnings
MISRA Violation: MISRA-C:2012 R.7.2 - A "u" or "U" suffix shall be applied to all integer constants that are represented in an unsigned type.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> Change-Id: Ieeff81ed42155c03aebca75b2f33f311279b9ed4
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| 2b57da6c | 28-Apr-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> |
fix(zynqmp): resolve misra R10.3
MISRA Violation: MISRA-C:2012 R.10.3 - The value of an expression shall not be assigned to an object with a narrower essential type or of a different essential typ
fix(zynqmp): resolve misra R10.3
MISRA Violation: MISRA-C:2012 R.10.3 - The value of an expression shall not be assigned to an object with a narrower essential type or of a different essential type category.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> Change-Id: I5a60c66788d59e45f41ceb81758b42ef2df9f5f7
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| be96158f | 06-May-2022 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "fix(fvp): fix NULL pointer dereference issue" into integration |
| 744ad974 | 28-Jan-2022 |
johpow01 <john.powell@arm.com> |
feat(brbe): add BRBE support for NS world
This patch enables access to the branch record buffer control registers in non-secure EL2 and EL1 using the new build option ENABLE_BRBE_FOR_NS. It is disab
feat(brbe): add BRBE support for NS world
This patch enables access to the branch record buffer control registers in non-secure EL2 and EL1 using the new build option ENABLE_BRBE_FOR_NS. It is disabled for all secure world, and cannot be used with ENABLE_RME.
This option is disabled by default, however, the FVP platform makefile enables it for FVP builds.
Signed-off-by: John Powell <john.powell@arm.com> Change-Id: I576a49d446a8a73286ea6417c16bd0b8de71fca0
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| bb0fcc7e | 05-May-2022 |
Sieu Mun Tang <sieu.mun.tang@intel.com> |
feat(intel): add SMPLSEL and DRVSEL setup for Stratix 10 MMC
SMPLSEL and DRVSEL values need to updated in DWMMC for the IP to work correctly. This apply on Stratix 10 device only.
Signed-off-by: Lo
feat(intel): add SMPLSEL and DRVSEL setup for Stratix 10 MMC
SMPLSEL and DRVSEL values need to updated in DWMMC for the IP to work correctly. This apply on Stratix 10 device only.
Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com> Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com> Change-Id: Ibd799a65890690682e27e4cbbc85e83ea03d51fc
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| 11f4f030 | 05-May-2022 |
Sieu Mun Tang <sieu.mun.tang@intel.com> |
feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge
This adds F2S and S2F bridge enable, disable and reset sequence to enable, disable and reset properl
feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge
This adds F2S and S2F bridge enable, disable and reset sequence to enable, disable and reset properly the bridges in SMC call or during reset.
The reset is also maskable as the SMC from uboot can pass in the bridge mask when requesting for bridge enable or disable.
Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com> Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com> Change-Id: Ie144518c591664ef880016c9b3706968411bbf21
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| 8d650218 | 05-May-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "fix(intel): reject non 4-byte align request size for FPGA Crypto Service (FCS)" into integration |
| a42b426b | 04-May-2022 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
fix(fvp): fix NULL pointer dereference issue
Fixed below NULL pointer dereference issue reported by coverity scan by asserting the hw_config_info is not NULL.
*** CID 378361: Null pointer derefere
fix(fvp): fix NULL pointer dereference issue
Fixed below NULL pointer dereference issue reported by coverity scan by asserting the hw_config_info is not NULL.
*** CID 378361: Null pointer dereferences (NULL_RETURNS) /plat/arm/board/fvp/fvp_bl2_setup.c: 84 in plat_get_next_bl_params() 78 79 /* To retrieve actual size of the HW_CONFIG */ 80 param_node = get_bl_mem_params_node(HW_CONFIG_ID); 81 assert(param_node != NULL); 82 83 /* Copy HW config from Secure address to NS address */ >>> CID 378361: Null pointer dereferences (NULL_RETURNS) >>> Dereferencing "hw_config_info", which is known to be "NULL". 84 memcpy((void *)hw_config_info->ns_config_addr, 85 (void *)hw_config_info->config_addr, 86 (size_t)param_node->image_info.image_size);
Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com> Change-Id: Iaf584044cfc3b2583862bcc1be825966eaffd38e
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| 44639ab7 | 29-Nov-2021 |
Marc Bonnici <marc.bonnici@arm.com> |
feat(plat/fvp): add EL3 SPMC #defines
Introduce additional #defines for running with the EL3 SPMC on the FVP.
The increase in xlat tables has been chosen to allow the test cases to complete success
feat(plat/fvp): add EL3 SPMC #defines
Introduce additional #defines for running with the EL3 SPMC on the FVP.
The increase in xlat tables has been chosen to allow the test cases to complete successfully and may need adjusting depending on the desired usecase.
Signed-off-by: Marc Bonnici <marc.bonnici@arm.com> Change-Id: I7f44344ff8b74ae8907d53ebb652ff8def2d2562
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