refactor(cpu): use the updated IP name for Demeter CPU

Neoverse Demeter CPU has been renamed to Neoverse V2 CPU.
Correspondingly, update the CPU library, file names and other
references to use the u

refactor(cpu): use the updated IP name for Demeter CPU

Neoverse Demeter CPU has been renamed to Neoverse V2 CPU.
Correspondingly, update the CPU library, file names and other
references to use the updated IP name.

Signed-off-by: Joel Goddard <joel.goddard@arm.com>
Change-Id: Ia4bf45bf47807c06f4c966861230faea420d088f

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Merge changes from topic "st_uart_updates" into integration

* changes:
feat(stm32mp1): add early console in SP_min
feat(st): properly manage early console
feat(st-uart): manage STM32MP_RECONFI

Merge changes from topic "st_uart_updates" into integration

* changes:
feat(stm32mp1): add early console in SP_min
feat(st): properly manage early console
feat(st-uart): manage STM32MP_RECONFIGURE_CONSOLE
docs(st): introduce STM32MP_RECONFIGURE_CONSOLE
feat(st): add trace for early console
fix(stm32mp1): enable crash console in FIQ handler
feat(st-uart): add initialization with the device tree
refactor(stm32mp1): move DT_UART_COMPAT in include file
feat(stm32mp1): configure the serial boot load address
fix(stm32mp1): update the FIP load address for serial boot
refactor(st): configure baudrate for UART programmer
refactor(st-uart): compute the over sampling dynamically

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Merge "fix(rcar3): fix RPC-IF device node name" into integration

Merge "fix(st): add missing string.h include" into integration

Merge "fix(intel): fix asynchronous read response by copying data to input buffer" into integration

Merge "fix(intel): fix Mac verify update and finalize for return response data" into integration

fix(rcar3): fix RPC-IF device node name

According to the Generic Names Recommendation in the Devicetree
Specification Release v0.3, and the DT Bindings for the Renesas Reduced
Pin Count Interface, t

fix(rcar3): fix RPC-IF device node name

According to the Generic Names Recommendation in the Devicetree
Specification Release v0.3, and the DT Bindings for the Renesas Reduced
Pin Count Interface, the node name for a Renesas RPC-IF device should be
"spi". The node name matters, as the node is enabled by passing a DT
fragment from TF-A to subsequent software.

Fix this by renaming the device node in the passed DT fragment from
"rpc" to "spi".

Fixes: 12c75c8886a0ee69 ("feat(plat/rcar3): emit RPC status to DT fragment if RPC unlocked")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Change-Id: Idb43353947607611331abc344f8c8ae932a20408

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fix(st): add missing string.h include

Since patch on libc refactoring, there is a compilation error with
STM32MP_USB_PROGRAMMER=1:
plat/st/common/stm32cubeprogrammer_usb.c:81:35: error:
implicit de

fix(st): add missing string.h include

Since patch on libc refactoring, there is a compilation error with
STM32MP_USB_PROGRAMMER=1:
plat/st/common/stm32cubeprogrammer_usb.c:81:35: error:
implicit declaration of function 'strnlen'
[-Werror=implicit-function-declaration]
length += strnlen((char *)&dfu->buffer[GET_PHASE_LEN],

The string.h header file should be included.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I1fbb2d9714cbc0d0640cb5e3c5ae8201dbfbe14e

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fix(zynqmp): resolve MISRA-C:2012 R.10.1 warnings

MISRA Violation: MISRA-C: 2012 R.10.1
- The operand to the operator does not have an essentially
unsigned type.

Signed-off-by: HariBabu Gattem <har

fix(zynqmp): resolve MISRA-C:2012 R.10.1 warnings

MISRA Violation: MISRA-C: 2012 R.10.1
- The operand to the operator does not have an essentially
unsigned type.

Signed-off-by: HariBabu Gattem <haribabu.gattem@amd.com>
Change-Id: I0f974e9d6f63dddfab55d55c952a57645d931e40

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Merge "feat(ls1043ardb): update ddr configure for ls1043ardb-pd" into integration

fix(rme): update FVP platform token

Update test CCA Platform token in fvp_plat_attest_token.c to be
up-to-date with RMM spec Beta0.

Change-Id: I0f5e2ac1149eb6f7a93a997682f41d90e109a049
Signed-off-b

fix(rme): update FVP platform token

Update test CCA Platform token in fvp_plat_attest_token.c to be
up-to-date with RMM spec Beta0.

Change-Id: I0f5e2ac1149eb6f7a93a997682f41d90e109a049
Signed-off-by: Mate Toth-Pal <mate.toth-pal@arm.com>

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feat(ls1043ardb): update ddr configure for ls1043ardb-pd

DDR4 Chip is EOL during redesign of ls1043ardb pd version. The replacement from MT is MT40A1G8SA-062E:R.
New ddr configure is compatible with

feat(ls1043ardb): update ddr configure for ls1043ardb-pd

DDR4 Chip is EOL during redesign of ls1043ardb pd version. The replacement from MT is MT40A1G8SA-062E:R.
New ddr configure is compatible with both pd and old version of ls1043ardb.

Signed-off-by: Chunlei Xu <chunlei.xu@nxp.com>
Change-Id: I714c091a2cf15046438d0723fb55a4410c386ef4

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fix(zynqmp): resolve misra 4.6 warnings

MISRA Violation: MISRA-C:2012 R.4.6
- Using basic numerical type int rather than a typedef
that includes size and signedness information.

Signed-off-by: Hari

fix(zynqmp): resolve misra 4.6 warnings

MISRA Violation: MISRA-C:2012 R.4.6
- Using basic numerical type int rather than a typedef
that includes size and signedness information.

Signed-off-by: HariBabu Gattem <haribabu.gattem@amd.com>
Change-Id: I3779f7b6e074e33cb66ace3bef2117029badce1e

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Merge "refactor(libc): clean up dependencies in libc" into integration

feat(stm32mp1): add early console in SP_min

Allow early console to be used at the beginning of SP_min, before
the clocks and UART have been reconfigured.

Signed-off-by: Yann Gautier <yann.gautier@f

feat(stm32mp1): add early console in SP_min

Allow early console to be used at the beginning of SP_min, before
the clocks and UART have been reconfigured.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I53d66938d42fcec830d9b81e5ef62b3790d0c3b3

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feat(st): properly manage early console

The new flag STM32MP_RECONFIGURE_CONSOLE is managed in platform.mk.
It is used in stm32mp_setup_early_console() when calling
plat_crash_console_init(). This c

feat(st): properly manage early console

The new flag STM32MP_RECONFIGURE_CONSOLE is managed in platform.mk.
It is used in stm32mp_setup_early_console() when calling
plat_crash_console_init(). This call is also under:
"#if defined(IMAGE_BL2)"
as this crash console init shouldn't be done by default in BL32.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Ib6b89db83d80095b662a2016e18ceb3fa8668435

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feat(st): add trace for early console

When the early console is configured with STM32MP_EARLY_CONSOLE,
display a message indicating it is enabled.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.

feat(st): add trace for early console

When the early console is configured with STM32MP_EARLY_CONSOLE,
display a message indicating it is enabled.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Iafdfa5afef27eba823d707841853a8a46de0b42d

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fix(stm32mp1): enable crash console in FIQ handler

When a FIQ occurs and is trapped by SP_min, it is an unrecoverable
error. As kernel may have switched the UART console off, we should
re-enable it

fix(stm32mp1): enable crash console in FIQ handler

When a FIQ occurs and is trapped by SP_min, it is an unrecoverable
error. As kernel may have switched the UART console off, we should
re-enable it with plat_crash_console_init() for those failing states.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ib02e1271b6213f8e383a062b74494abf8826188f

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refactor(stm32mp1): move DT_UART_COMPAT in include file

Move the definition of DT_UART_COMPAT in stm32mp1_def.h to be used
in several files.

Change-Id: I74d0350bcd971df9b15697f2b9ec04061d6a7656
Sig

refactor(stm32mp1): move DT_UART_COMPAT in include file

Move the definition of DT_UART_COMPAT in stm32mp1_def.h to be used
in several files.

Change-Id: I74d0350bcd971df9b15697f2b9ec04061d6a7656
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>

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feat(stm32mp1): configure the serial boot load address

For product with 128MB DDR size, the OP-TEE is located at the end
of the DDR and the FIP can't be loaded at the default location
because it ove

feat(stm32mp1): configure the serial boot load address

For product with 128MB DDR size, the OP-TEE is located at the end
of the DDR and the FIP can't be loaded at the default location
because it overlap the OP-TEE final location. So the default value
for DWL_BUFFER_BASE is invalid.

To avoid this conflict the serial boot load address = DWL_BUFFER_BASE
can be modified with a configuration flags.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ie27b87c10c57fea5d4c6200ce4f624e775b9a080

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fix(stm32mp1): update the FIP load address for serial boot

Update the FIP load address and size for serial boot to support
product with a DDR size = 128MB
1/ Move the FIP location at the end of the

fix(stm32mp1): update the FIP load address for serial boot

Update the FIP load address and size for serial boot to support
product with a DDR size = 128MB
1/ Move the FIP location at the end of the first 128MB
2/ Reduce the DWL_BUFFER_SIZE to 16MB, to be coherent with the value
indicated in USB enumeration
- for STM32MP13x: "@SSBL /0x03/1*16Me"
- for STM32MP15x: "@Partition3 /0x03/1*16Me"

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Id93bf00c64832c17426bfd78e060861275677ecc

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refactor(st): configure baudrate for UART programmer

Add the possibility to configure the UART baudrate; reused the
console configuration, defined in STM32MP_UART_BAUDRATE.

The default value remain

refactor(st): configure baudrate for UART programmer

Add the possibility to configure the UART baudrate; reused the
console configuration, defined in STM32MP_UART_BAUDRATE.

The default value remains 115200.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ifcf2b36e8ac929265405bc88e824ee78be3b5bbb

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refactor(st-uart): compute the over sampling dynamically

The parameter over_sampling of stm32_uart_init_s is not required
as it can be computed dynamically from clock rate of the serial
device and t

refactor(st-uart): compute the over sampling dynamically

The parameter over_sampling of stm32_uart_init_s is not required
as it can be computed dynamically from clock rate of the serial
device and the requested baudrate.

Oversampling by 8 is allowed only for higher speed
(up to clock_rate / 8) to reduce the maximum receiver tolerance
to clock deviation.

This patch update the driver, the serial init struct and the
only user, the stm32cubeprogrammer over uart support.

Change-Id: I422731089730a288defeb7fa49886db65d0902b2
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>

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feat(sgi): remove override for `ARM_BL31_IN_DRAM` build-option

RD-N2* variants of Neoverse reference design platforms could be
configured to boot from SRAM or DRAM. Having ARM_BL31_IN_DRAM set to 1

feat(sgi): remove override for `ARM_BL31_IN_DRAM` build-option

RD-N2* variants of Neoverse reference design platforms could be
configured to boot from SRAM or DRAM. Having ARM_BL31_IN_DRAM set to 1
within the common makefile would deter these platforms from having this
flexibility. Remove the default override configuration for
`ARM_BL31_IN_DRAM`.

Signed-off-by: Rohit Mathew <rohit.mathew@arm.com>
Change-Id: I8d79969c003a984675cbe705de890b51a1f7f4ea

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feat(sgi): configure SRAM and BL31 size for sgi platform

Update SRAM size for Neoverse reference design platforms from 256KB to
512KB. This is required to place and execute BL31 image from the
on-ch

feat(sgi): configure SRAM and BL31 size for sgi platform

Update SRAM size for Neoverse reference design platforms from 256KB to
512KB. This is required to place and execute BL31 image from the
on-chip SRAM. Additionally, revise BL31 image size to accommodate
larger BL31 images of multi-chip platforms.

Signed-off-by: Rohit Mathew <rohit.mathew@arm.com>
Change-Id: I11c2672a1089f24a9fafcf6555b8e1d52032cfde

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