refactor(stm32mp1): remove authentication using STM32 image mode

Remove deprecated authentication mode to use the FIP authentication
based on TBBR requirements. It will use the new crypto library.

refactor(stm32mp1): remove authentication using STM32 image mode

Remove deprecated authentication mode to use the FIP authentication
based on TBBR requirements. It will use the new crypto library.

Change-Id: I95c7baa64ba42c370ae136f59781f2a7a4c7f507
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>

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feat(stm32mp1): add RNG initialization in BL2 for STM32MP13

Initialize RNG driver at platform level for STM32MP13.

Change-Id: I64832de43e5f6559a12e26680142db54c88f0b9e
Signed-off-by: Nicolas Le Bay

feat(stm32mp1): add RNG initialization in BL2 for STM32MP13

Initialize RNG driver at platform level for STM32MP13.

Change-Id: I64832de43e5f6559a12e26680142db54c88f0b9e
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@foss.st.com>

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feat(stm32mp1): add a stm32mp crypto library

Add the crypto library for STM32MP1 to use STM32 hardware
accelerators.

Change-Id: I0bbb941001242a6fdc47514ab3efe07b12249285
Signed-off-by: Nicolas Toro

feat(stm32mp1): add a stm32mp crypto library

Add the crypto library for STM32MP1 to use STM32 hardware
accelerators.

Change-Id: I0bbb941001242a6fdc47514ab3efe07b12249285
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>

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feat(st-crypto): update HASH for new hardware version used in STM32MP13

Introduce new flag to manage hardware version.
STM32MP15 currently uses the HASH_V2 and STM32MP13 uses the HASH_V4.
For STM32_

feat(st-crypto): update HASH for new hardware version used in STM32MP13

Introduce new flag to manage hardware version.
STM32MP15 currently uses the HASH_V2 and STM32MP13 uses the HASH_V4.
For STM32_HASH_V4: remove MD5 algorithm (no more supported) and
add SHA384 and SHA512.

For STM32_HASH_V2: no change.

Change-Id: I3a9ae9e38249a2421c657232cb0877004d04dae1
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>

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fix(mt8188): add mmap entry for CPU idle SRAM

CPU PM driver accesses CPU idle SRAM during the system suspend
process. The region of CPU idle SRAM needs to be added as mmap entry.
Otherwise, the exec

fix(mt8188): add mmap entry for CPU idle SRAM

CPU PM driver accesses CPU idle SRAM during the system suspend
process. The region of CPU idle SRAM needs to be added as mmap entry.
Otherwise, the execption would occur.

BUG=b:244215539
TEST=Test of suspend resume passes.

Signed-off-by: Liju-Clr Chen <liju-clr.chen@mediatek.com>
Change-Id: I5838964fd9cb1b833e4006e2123febb4a4601003

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fix(mt8188): refine gic init flow after system resume

Call gicv3_distif_init() instead of mt_gic_init() in
armv8_2_mcusys_pwr_on_common(). This is to prevent
gicv3_rdistif_init() and gicv3_cpuif_ena

fix(mt8188): refine gic init flow after system resume

Call gicv3_distif_init() instead of mt_gic_init() in
armv8_2_mcusys_pwr_on_common(). This is to prevent
gicv3_rdistif_init() and gicv3_cpuif_enable() from being called twice
in the power-on flow. gicv3_rdistif_init() and gicv3_cpuif_enable()
are called in later armv8_2_cpu_pwr_on_common().

BUG=b:244215539
TEST=Suspend Resume Test pass

Change-Id: Id752c1ccbb9eab277ed6278c2dd90a051a894146
Signed-off-by: Liju-Clr Chen <liju-clr.chen@mediatek.com>

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fix(mt8186): fix the DRAM voltage after the system resumes

The DRAM power supply must sustain at 0.8V after the system resumes.
Otherwise, unexpected errors would occur. Therefore, we update the
DRA

fix(mt8186): fix the DRAM voltage after the system resumes

The DRAM power supply must sustain at 0.8V after the system resumes.
Otherwise, unexpected errors would occur. Therefore, we update the
DRAM voltage to 0.8v in PMIC voltage wrap table.

BUG=b:253537849
TEST=Suspend Resume Test

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.corp-partner.google.com>
Change-Id: Idd42d5a2d646468822e391e48d01d870c3b7f0d3

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feat(mt8188): add audio support

For MT8188, MTK_AUDIO_SMC_OP_DOMAIN_SIDEBANDS is required for normal
mode switch.
- Add audio common code and chip specific code.
- Add new id (MTK_SIP_AUDIO_CONT

feat(mt8188): add audio support

For MT8188, MTK_AUDIO_SMC_OP_DOMAIN_SIDEBANDS is required for normal
mode switch.
- Add audio common code and chip specific code.
- Add new id (MTK_SIP_AUDIO_CONTROL) to mtk_sip_def.h.
- Enable for MT8188.

Signed-off-by: Trevor Wu <trevor.wu@mediatek.com>
Change-Id: Iff4680cd0b520b2b519ecf30ecafe100f147cc62

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refactor(mt8195): use ptp3 common drivers

Some 8195 ptp3 drivers are the same in plat/mediatek/drivers/ptp3, so
add this patch to reuse them.

Change-Id: I2b1801a73b6a2979e20d49d314c57f663dc5bf04
Si

refactor(mt8195): use ptp3 common drivers

Some 8195 ptp3 drivers are the same in plat/mediatek/drivers/ptp3, so
add this patch to reuse them.

Change-Id: I2b1801a73b6a2979e20d49d314c57f663dc5bf04
Signed-off-by: Liju-Clr Chen <liju-clr.chen@mediatek.com>

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feat(mt8188): add support for PTP3

Add PTP3 driver to protect CPU from excessive voltage drop in CPU
heavy loading.

Signed-off-by: Riven Chen <riven.chen@mediatek.corp-partner.google.com>
Change-Id

feat(mt8188): add support for PTP3

Add PTP3 driver to protect CPU from excessive voltage drop in CPU
heavy loading.

Signed-off-by: Riven Chen <riven.chen@mediatek.corp-partner.google.com>
Change-Id: I394096be43e1d1d615f99b22f38f0b3ae0bb40c1

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feat(mt8188): enable MTK_PUBEVENT_ENABLE

Enable MTK_PUBEVENT_ENABLE for subscribing CPUPM events. This
patch also corrects the header file naming.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.

feat(mt8188): enable MTK_PUBEVENT_ENABLE

Enable MTK_PUBEVENT_ENABLE for subscribing CPUPM events. This
patch also corrects the header file naming.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: Iabd89a4ead21ccafa833390367484bfea5d351f6

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build: deprecate Arm TC0 FVP platform

Arm has decided to deprecate the TC0 platform. The development of
software and fast models for TC0 platform has been discontinued.
TC0 platform has been superse

build: deprecate Arm TC0 FVP platform

Arm has decided to deprecate the TC0 platform. The development of
software and fast models for TC0 platform has been discontinued.
TC0 platform has been superseded by the TC1 and TC2 platforms,
which are already supported in TF-A and CI repositories.

Change-Id: I0269816a6ee733f732669027eae4e14cd60b6084
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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Merge changes from topic "mp/ras_refactoring" into integration

* changes:
docs: document do_panic() and panic() helper functions
fix(ras): restrict RAS support for NS world

Merge changes from topic "mp/ras_refactoring" into integration

* changes:
fix(debug): decouple "get_el_str()" from backtrace
fix(bl31): harden check in delegate_async_ea

fix(versal-net): add default values for silicon

Add missing default value for silicon.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Change-Id: Iac7d4db17a29a148298e9e3bd3eb3f74cafe7bc1

Merge changes from topic "rdn2cfg2_spi_support" into integration

* changes:
feat(rdn2): enable extended SPI support
feat(rdn2): add SPI ID ranges for RD-N2 multichip platform

fix(ras): restrict RAS support for NS world

Current RAS framework in TF-A only supports handling errors originating
from NS world but the HANDLE_EA_EL3_FIRST flag configures it for all
lower Els. To

fix(ras): restrict RAS support for NS world

Current RAS framework in TF-A only supports handling errors originating
from NS world but the HANDLE_EA_EL3_FIRST flag configures it for all
lower Els. To make the current design of RAS explicit, rename this macro
to HANDLE_EA_EL3_FIRST_NS and set EA bit in scr_el3 only when
switching to NS world.

Note: I am unaware of any platform which traps errors originating in
Secure world to EL3, if there is any such platform then it need to
be explicitly implemented in TF-A

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: If58eb201d8fa792c16325c85c26056e9b409b750

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fix(debug): decouple "get_el_str()" from backtrace

get_el_str() was implemented under ENABLE_BACKTRACE macro but being
used at generic places too, this causes multiple definition of this
function.
R

fix(debug): decouple "get_el_str()" from backtrace

get_el_str() was implemented under ENABLE_BACKTRACE macro but being
used at generic places too, this causes multiple definition of this
function.
Remove duplicate definition of this function and move it out of
backtrace scope. Also, this patch fixes a small bug where in default
case S-EL1 is returned which ideally should be EL1, as there is no
notion of security state in EL string.

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: Ib186ea03b776e2478eff556065449ebd478c3538

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build(bl2): only set BL2_CPPFLAGS for armv8

If ARM_ARCH_MAJOR is 9 and ARM_ARCH_MINOR is 0 we don't want need to
have "-march=armv8-a+crc" in BL2_CPPFLAGS.

Change-Id: I9ac11522fde00953da40b95eebf82

build(bl2): only set BL2_CPPFLAGS for armv8

If ARM_ARCH_MAJOR is 9 and ARM_ARCH_MINOR is 0 we don't want need to
have "-march=armv8-a+crc" in BL2_CPPFLAGS.

Change-Id: I9ac11522fde00953da40b95eebf82ff8ab2559ba
Signed-off-by: Diego Sueiro <diego.sueiro@arm.com>

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Merge "feat(qti): updated soc version for sc7180 and sc7280" into integration

Merge changes from topic "hikey960-el3-spmc" into integration

* changes:
feat(hikey960): read serial number from UFS
feat(hikey960): add a FF-A logical partition
feat(hikey960): add memory sha

Merge changes from topic "hikey960-el3-spmc" into integration

* changes:
feat(hikey960): read serial number from UFS
feat(hikey960): add a FF-A logical partition
feat(hikey960): add memory sharing hooks for SPMC_AT_EL3
feat(hikey960): add plat-defines for SPMC_AT_EL3
feat(hikey960): define a datastore for SPMC_AT_EL3
feat(hikey960): add SP manifest for SPMC_AT_EL3
feat(hikey960): increase secure workspace to 64MB
feat(hikey960): upgrade to xlat_tables_v2

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feat(qti): updated soc version for sc7180 and sc7280

SMCCC_GET_SOC_VERSION SMC will return soc id to distinguish
different varaints in sc7180 and sc7280

Signed-off-by: Bharath N <quic_bharn@quicinc

feat(qti): updated soc version for sc7180 and sc7280

SMCCC_GET_SOC_VERSION SMC will return soc id to distinguish
different varaints in sc7180 and sc7280

Signed-off-by: Bharath N <quic_bharn@quicinc.com>
Change-Id: I72ea4bdb8193c816ba249c1e0755784c9b9bb7da

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feat(hikey960): read serial number from UFS

Serial number is written into UFS by fastboot
Pass BL2 params to BL31 (serial number)

Change-Id: I9a490db07ca10088da69191a2f2c1621d44a278c
Signed-off-by:

feat(hikey960): read serial number from UFS

Serial number is written into UFS by fastboot
Pass BL2 params to BL31 (serial number)

Change-Id: I9a490db07ca10088da69191a2f2c1621d44a278c
Signed-off-by: vallau01 <valentin.laurent@trustonic.com>
Signed-off-by: Lukas Hanel <lukas.hanel@trustonic.com>

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feat(hikey960): add a FF-A logical partition

Required to compile with SPMC_AT_EL3=1
Copied from FVP, sample code for platforms

Change-Id: I7d8a4d8846a328b05cf45a5044802ea3e2f7fb67
Signed-off-by: Lu

feat(hikey960): add a FF-A logical partition

Required to compile with SPMC_AT_EL3=1
Copied from FVP, sample code for platforms

Change-Id: I7d8a4d8846a328b05cf45a5044802ea3e2f7fb67
Signed-off-by: Lukas Hanel <lukas.hanel@trustonic.com>

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feat(hikey960): add memory sharing hooks for SPMC_AT_EL3

These allows a platform to do any System-MMU/IOMMU configuration
in line with FF-A memory sharing.

Change-Id: Id517759198421a32c5d16bf5bb995

feat(hikey960): add memory sharing hooks for SPMC_AT_EL3

These allows a platform to do any System-MMU/IOMMU configuration
in line with FF-A memory sharing.

Change-Id: Id517759198421a32c5d16bf5bb99590275e77736
Signed-off-by: vallau01 <valentin.laurent@trustonic.com>
Signed-off-by: Lukas Hanel <lukas.hanel@trustonic.com>

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