feat(fvp): enable FEAT_HCX by default

FEAT_HCX is one of the features for which Linux necessarily requires EL3
enablement, when the feature is present on a PE.

To cover the effect of different FVP

feat(fvp): enable FEAT_HCX by default

FEAT_HCX is one of the features for which Linux necessarily requires EL3
enablement, when the feature is present on a PE.

To cover the effect of different FVP command line parameters, include
the feature into the standard FVP build, but use FEAT_STATE_CHECK, to
always do runtime checks before accessing feature specific registers.

This prevents a Linux crash when the FVP is called with FEAT_HCX
enabled.

Change-Id: I01aaed15c5a6850176d092b2f0157744fe0a9e13
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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feat(fvp): enable FEAT_FGT by default

FEAT_FGT is one of the features for which Linux necessarily requires EL3
enablement, when the feature is present on a PE.

To cover the effect of different FVP

feat(fvp): enable FEAT_FGT by default

FEAT_FGT is one of the features for which Linux necessarily requires EL3
enablement, when the feature is present on a PE.

To cover the effect of different FVP command line parameters, include
the feature into the standard FVP build, but use FEAT_STATE_CHECK, to
always do runtime checks before accessing feature specific registers.

This prevents a Linux crash when the FVP is called with FEAT_FGT
enabled.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Change-Id: I55fbb2706aefbc3ab67c476e3f8b6ea74ae0d66c

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feat(aarch64): make ID system register reads non-volatile

Our system register access function wrappers are using "volatile"
inline assembly instructions. On the first glance this is a good idea,
sin

feat(aarch64): make ID system register reads non-volatile

Our system register access function wrappers are using "volatile"
inline assembly instructions. On the first glance this is a good idea,
since many system registers have side effects, and we don't want the
compiler to optimise or reorder them (what "volatile" prevents).

However this also naturally limits the compiler's freedom to optimise
code better, and those volatile properties don't apply to every type of
system register. One example are the CPU ID registers, which have
constant values, are side-effect free and read-only.

Introduce a new wrapper type that drops the volatile keyword, and use
that for the wrappers instantiating ID register accessors.

This allows the compiler to freely optimise those instructions away, if
their result isn't actually used, which can trigger further
optimisations.

Change-Id: I3c64716ae4f4bf603f0ea57b652bd50bcc67bb0e
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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feat(rss): add TC platform UUIDs for RSS images

Add platform fiptool and UUIDs to the TC platform, to allow RSS images
to be inserted into and used from FIPs

Change-Id: Ic8e11bd4a766bdc616af7dee60d

feat(rss): add TC platform UUIDs for RSS images

Add platform fiptool and UUIDs to the TC platform, to allow RSS images
to be inserted into and used from FIPs

Change-Id: Ic8e11bd4a766bdc616af7dee60d44fc5d1f6e7b6
Signed-off-by: Raef Coles <raef.coles@arm.com>

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fix(versal): print proper atf handoff source

Versal uses PLM in the boot flow and printing FSBL in the log for
handoff parameters is misleading. Print proper source of TF-A
handoff parameters.

Chan

fix(versal): print proper atf handoff source

Versal uses PLM in the boot flow and printing FSBL in the log for
handoff parameters is misleading. Print proper source of TF-A
handoff parameters.

Change-Id: I331e2eac2f5d30beed8573940ae02094254a759b
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>

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refactor(mediatek): add new LPM API for further extension

Add new LPM API `mt_lp_rm_find_constraint` and `mt_lp_rm_run_constraint`
for further extension.

Signed-off-by: Liju-Clr Chen <liju-clr.chen

refactor(mediatek): add new LPM API for further extension

Add new LPM API `mt_lp_rm_find_constraint` and `mt_lp_rm_run_constraint`
for further extension.

Signed-off-by: Liju-Clr Chen <liju-clr.chen@mediatek.com>
Change-Id: I8298811e03227285a7d086166edf9e87471f74b4

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refactor(mediatek): change the parameters of LPM API

Change the parameters of the LPM API for further extension.

Change-Id: Id8897c256c2118d00c6b9f3e7424ebc6100f02eb
Signed-off-by: Liju-Clr Chen <l

refactor(mediatek): change the parameters of LPM API

Change the parameters of the LPM API for further extension.

Change-Id: Id8897c256c2118d00c6b9f3e7424ebc6100f02eb
Signed-off-by: Liju-Clr Chen <liju-clr.chen@mediatek.com>

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refactor(mediatek): change LPM header file path for further extension

Move `mt_lp_rm.h` to `plat/mediatek/include/lpm` for further extension.

Change-Id: If377ce6791ce80f82643b0f2466eb0f1aa5aa40b
Si

refactor(mediatek): change LPM header file path for further extension

Move `mt_lp_rm.h` to `plat/mediatek/include/lpm` for further extension.

Change-Id: If377ce6791ce80f82643b0f2466eb0f1aa5aa40b
Signed-off-by: Liju-Clr Chen <liju-clr.chen@mediatek.com>

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feat(mt8188): keep infra and peri on when system suspend

In order to wake up system from USB devices, keep infra and peri on
when system suspend.

Change-Id: I0a0eb2e72709b0cc1bf11b36241a50cb5d85d9b

feat(mt8188): keep infra and peri on when system suspend

In order to wake up system from USB devices, keep infra and peri on
when system suspend.

Change-Id: I0a0eb2e72709b0cc1bf11b36241a50cb5d85d9b8
Signed-off-by: Shaocheng Wang <shaocheng.wang@mediatek.corp-partner.google.com>

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feat(mt8188): enable SPM and LPM

Enable SPM and LPM features for MT8188.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Change-Id: Ib3e2b305e9e3cf5a67e6e787ff942831b5ff28cd

feat(mt8188): add SPM feature support

Add SPM low power functions, such as system suspend.

Change-Id: I6d1ad847a81ba9c347ab6fb8a8cb8c69004b7add
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>

feat(mt8188): add MT8188 SPM support

Add SPM basic functions including SPM init.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Change-Id: I5d4860685c15f3b8d555e697837862287f0c303e

feat(mediatek): add SPM's SSPM notifier

The notifier is used to notify SSPM to sleep when system suspend or
notify SSPM to wakeup when system resume.

Change-Id: I027ca356a84ea1e58be54a8a5eb302b3b96

feat(mediatek): add SPM's SSPM notifier

The notifier is used to notify SSPM to sleep when system suspend or
notify SSPM to wakeup when system resume.

Change-Id: I027ca356a84ea1e58be54a8a5eb302b3b96c2e22
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>

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feat(mt8188): add the register definitions accessed by SPM

SPM needs to access some modules' registers to decide its sleep
behavior. This patch add these register definitions to platform_def.h.

Sig

feat(mt8188): add the register definitions accessed by SPM

SPM needs to access some modules' registers to decide its sleep
behavior. This patch add these register definitions to platform_def.h.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Change-Id: I3bebe74e367d5f6a7b59563036e18a83a3ef31e9

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feat(mediatek): add new features of LPM

Add new functions and intefaces of LPM to support more interactions
between LPM providers and users.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Ch

feat(mediatek): add new features of LPM

Add new functions and intefaces of LPM to support more interactions
between LPM providers and users.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Change-Id: I8ebbda0c0ef5be3a7a388a38c09424ebf785996f

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Merge changes from topic "bk/warnings" into integration

* changes:
docs: describe the new warning levels
build: add -Wunused-const-variable=2 to W=2
build: include -Wextra in generic builds

Merge changes from topic "bk/warnings" into integration

* changes:
docs: describe the new warning levels
build: add -Wunused-const-variable=2 to W=2
build: include -Wextra in generic builds
docs(porting-guide): update a reference
fix(st-usb): replace redundant checks with asserts
fix(brcm): add braces around bodies of conditionals
fix(renesas): align incompatible function pointers
fix(zynqmp): remove redundant api_version check
fix: remove old-style declarations
fix: unify fallthrough annotations

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fix(versal-net): enable wake interrupt during client suspend

Wakeup interrupt should be set during power down sequence to wake
processor. So enable wakeup interrupt during power down sequence.

Sign

fix(versal-net): enable wake interrupt during client suspend

Wakeup interrupt should be set during power down sequence to wake
processor. So enable wakeup interrupt during power down sequence.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I1154495c25e0468496f6e112996fd182aa516d88

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fix(versal-net): disable wakeup interrupt during client wakeup

Clear and disable wakeup interrupt during client wakeup to avoid
multiple wakeup events.

Signed-off-by: Jay Buddhabhatti <jay.buddhabh

fix(versal-net): disable wakeup interrupt during client wakeup

Clear and disable wakeup interrupt during client wakeup to avoid
multiple wakeup events.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Iebc644ae582da03001830b96e3190fce10dbac42

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fix(versal-net): clear power down bit during wakeup

Power down bit and power down interrupt needs to be cleared once core
is wakeup to avoid unnecessary power down events. So disable power down
inte

fix(versal-net): clear power down bit during wakeup

Power down bit and power down interrupt needs to be cleared once core
is wakeup to avoid unnecessary power down events. So disable power down
interrupt and clear power down bit during client wakeup.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I3445991692c441831e4ea8dae112e23b19f185a9

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fix(versal-net): fix setting power down state

Versal NET is supporting max power state to AFF_LVL_2 so set power state
for all affinity level instead of setting for only AFF_LVL_0.

Signed-off-by: J

fix(versal-net): fix setting power down state

Versal NET is supporting max power state to AFF_LVL_2 so set power state
for all affinity level instead of setting for only AFF_LVL_0.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I55a91e798b7566d2f34d7cb1fe28ca25993a7d8e

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fix(versal-net): clear power down interrupt status before enable

Currently power down interrupt status is set by default before its
getting enabled. Because of that Linux is getting crashed since it

fix(versal-net): clear power down interrupt status before enable

Currently power down interrupt status is set by default before its
getting enabled. Because of that Linux is getting crashed since its
triggering interrupt before core goes to WFI state. So clear interrupt
status before enabling power down interrupt.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Ia8d047b6078a49ab3dbe3e0bf24422357f0138c2

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fix(versal-net): resolve misra rule 20.7 warnings

Fix below MISRA violation from versal_net_def.h:
- MISRA Violation: MISRA-C:2012 R.10.6:
- Macro parameter expands into an expression without be

fix(versal-net): resolve misra rule 20.7 warnings

Fix below MISRA violation from versal_net_def.h:
- MISRA Violation: MISRA-C:2012 R.10.6:
- Macro parameter expands into an expression without being wrapped
by parentheses.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Ie365d24c02bb38163005a3c073642d5c96412e2d

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fix(versal-net): resolve misra 10.6 warnings

Fix below MISRA violation from versal_net_def.h:
- MISRA Violation: MISRA-C:2012 R.10.6
- The value of a composite expression shall not be assigned to

fix(versal-net): resolve misra 10.6 warnings

Fix below MISRA violation from versal_net_def.h:
- MISRA Violation: MISRA-C:2012 R.10.6
- The value of a composite expression shall not be assigned to an
object with wider essential type

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I74f8e5d63523f33d245a21f8e4f04d30e40b05e7

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Merge "fix(plat/tc): increase TC_TZC_DRAM1_SIZE" into integration

Merge "feat(mt8188): update INFRA IOMMU enable flow" into integration