feat(rmm): add support for the 2nd DRAM bank

This patch adds support for RMM granules allocation
in FVP 2nd DRAM 2GB bank at 0x880000000 base address.
For ENABLE_RME = 1 case it also removes "mem=1G

feat(rmm): add support for the 2nd DRAM bank

This patch adds support for RMM granules allocation
in FVP 2nd DRAM 2GB bank at 0x880000000 base address.
For ENABLE_RME = 1 case it also removes "mem=1G"
Linux kernel command line option in fvp-base-psci-common.dsti
to allow memory layout discovery from the FVP device tree.
FVP parameter 'bp.dram_size' - size of main memory in gigabytes
documented in docs/components/realm-management-extension.rst
is changed from 2 to 4.

Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>
Change-Id: I174da4416ad5a8d41bf0ac89f356dba7c0cd3fe7

show more ...

Merge "feat(qemu): support pointer authentication" into integration

Merge "refactor(arm): remove unused global" into integration

fix(intel): fix fcs_client crashed when increased param size

No overflow buffer checking for param size. There is a security threat.
Update code to check for param size according to cryto param mode

fix(intel): fix fcs_client crashed when increased param size

No overflow buffer checking for param size. There is a security threat.
Update code to check for param size according to cryto param mode.

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I37a2d047edd9ff835b3f0986d85309c402887bef

show more ...

feat(intel): extending to support SMMU in FCS

This patch is to extend support SMMU in FCS GET_DIGEST, MAC_VERIFY,
ECDSA_SHA2_DATA_SIGNING and ECDSA_SHA2_DATA_SIGNATURE_VERIFY.
It also will change to

feat(intel): extending to support SMMU in FCS

This patch is to extend support SMMU in FCS GET_DIGEST, MAC_VERIFY,
ECDSA_SHA2_DATA_SIGNING and ECDSA_SHA2_DATA_SIGNATURE_VERIFY.
It also will change to use asynchronous mailbox send command to improve
fcs_client timing performance.
Increase the SIP_SVC_VERSION_MAJOR because SMMU support is not backward
compatible.
Increase the SIP_SVC_VERSION_MINOR because 8 news function IDs are
introduced.

Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I15e619e246531b065451f9b201646f3c50e26307

show more ...

refactor(arm): remove unused global

Removed unused global from the assembly file.

Change-Id: I17ab70aa888af27865a9fb4436495197f460780f
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

fix(zynqmp): remove redundant api_version check

The api_version is checked in pm_setup() and an error is returned. The
smc handlers will not be registered on error so doing the check again is
redund

fix(zynqmp): remove redundant api_version check

The api_version is checked in pm_setup() and an error is returned. The
smc handlers will not be registered on error so doing the check again is
redundant. This also silences a warning when compiling with -Wextra.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I09395e6a20e3f6eb22a1f81ec2f6bdf034eeb4bf

show more ...

fix: remove old-style declarations

TF-A wants to eventually enable -Wold-style-definition globally. Convert
the rare few instances where this is still the case.

Signed-off-by: Boyan Karatotev <boya

fix: remove old-style declarations

TF-A wants to eventually enable -Wold-style-definition globally. Convert
the rare few instances where this is still the case.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I9c450fc875cf097e6de2ed577ea3b085821c9f5e

show more ...

fix: unify fallthrough annotations

Compiling with -Wimplicit-fallthrough=3 (enabled by -Wextra) produces
many warnings about fallthrough comments either missing or being wrong.
Unify the comments so

fix: unify fallthrough annotations

Compiling with -Wimplicit-fallthrough=3 (enabled by -Wextra) produces
many warnings about fallthrough comments either missing or being wrong.
Unify the comments so we comply with -Wextra.

Note that Coverity recommends against using the __attribute__ directive.
Also, zlib does not build with a higher value of -Wimplicit-fallthrough.
Finally, compilers strip comments before expanding macros. As such,
checkpatch's fallthrough annotation (or higher levels of the flag) isn't
really possible.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I060cf4f8dc04c02cbb45cf4ceb69569a8369ccee

show more ...

fix(zynqmp): initialize uint32 with value 0U in pm code

MISRA Violation: MISRA C-2012 Rule 7.2
- Initialize the unsigned int with value 0u in pm_service component.

Current misra warning detection t

fix(zynqmp): initialize uint32 with value 0U in pm code

MISRA Violation: MISRA C-2012 Rule 7.2
- Initialize the unsigned int with value 0u in pm_service component.

Current misra warning detection tool is not reporting this as
warning. It reports only when the initialized value exceeds the
range of data type based on compiler used.

But, this change is added as a part of precaution as some other
misra checker tool may report it as violation of rule 7.2.

Signed-off-by: Naman Patel <naman.patel@amd.com>
Change-Id: I50a5cee2a077fe157e79757d959ce33064225af3

show more ...

Merge changes from topic "mb/refactor-evlog" into integration

* changes:
refactor(qemu): pass platform metadata as a function's argument
refactor(imx8m): pass platform metadata as a function's a

Merge changes from topic "mb/refactor-evlog" into integration

* changes:
refactor(qemu): pass platform metadata as a function's argument
refactor(imx8m): pass platform metadata as a function's argument
refactor(fvp): pass platform metadata as a function's argument
refactor(measured-boot): accept metadata as a function's argument

show more ...

fix(console): fix crash on spin_unlock with cache disabled

Current code skips load of spinlock address when cache is disabled. The
following call to spin_unlock stores into the random location that

fix(console): fix crash on spin_unlock with cache disabled

Current code skips load of spinlock address when cache is disabled. The
following call to spin_unlock stores into the random location that x0
points to.

Move spinlock address load earlier so that x0 is always valid on
spin_unlock call.

Change-Id: Iac640289725dce2518f2fed483d7d36ca748ffe8
Signed-off-by: Baruch Siach <baruch@tkos.co.il>

show more ...

Merge "fix(intel): fix print out ERROR when encounter SEU_Err" into integration

Merge changes I8667f362,Ia0bd832c into integration

* changes:
feat(intel): setup FPGA interface for Agilex
fix(intel): fix pinmux handoff bug on Agilex

Merge "fix(intel): fix sp_timer0 is not disabled in firewall on Agilex" into integration

Merge "fix(intel): remove checking on TEMP and VOLT checking for HWMON" into integration

feat(qemu): support pointer authentication

This patch includes source code to support pointer authentication on
QEMU platform.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
Change-Id: I582923080fe1d5

feat(qemu): support pointer authentication

This patch includes source code to support pointer authentication on
QEMU platform.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
Change-Id: I582923080fe1d5baffd7d0ccfe83e3b28f910ae1

show more ...

Merge "fix(zynqmp): check return status of pm_get_api_version" into integration

Merge "fix(versal): initialize the variable with value 0 in pm code" into integration

fix(zynqmp): check return status of pm_get_api_version

MISRA Violation: MISRA C-2012 Rule 17.7
- Check the return status of function pm_get_api_version
and return error in case of failure.

Signed-o

fix(zynqmp): check return status of pm_get_api_version

MISRA Violation: MISRA C-2012 Rule 17.7
- Check the return status of function pm_get_api_version
and return error in case of failure.

Signed-off-by: Naman Patel <naman.patel@amd.com>
Change-Id: I69fb000c04f22996da7965a09a1797c7bfaad252

show more ...

fix(versal): initialize the variable with value 0 in pm code

Remove zeromem function as the array is already initialized
with value 0.

MISRA Violation: MISRA C-2012 Rule 9.1
- Initialize the array/

fix(versal): initialize the variable with value 0 in pm code

Remove zeromem function as the array is already initialized
with value 0.

MISRA Violation: MISRA C-2012 Rule 9.1
- Initialize the array/variable with a value 0 to resolve
the misra warnings in pm_service component.

Signed-off-by: Naman Patel <naman.patel@amd.com>
Change-Id: I1a3d44a7ae4088a3034eb0119d82b99cd4617ccd

show more ...

Merge "feat(qemu): increase size of bl2" into integration

feat(lx2): support more variants

Add more lx2 variants support.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Iac19b2532531616f638fd8f42bb6953bd1e83eda

fix(lx2): init global data before using it

Need to initialize global data firstly.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I18c3ccc2d0c8175bf479889aa03bc1f737df678b

fix(ls1046a): 4 keys secureboot failure resolved

Changed the size of OCRAM reserved by ROM code and increased the
size of CSF header.
Earlier, 4 keys image was exceeding boundaries and landing in
OC

fix(ls1046a): 4 keys secureboot failure resolved

Changed the size of OCRAM reserved by ROM code and increased the
size of CSF header.
Earlier, 4 keys image was exceeding boundaries and landing in
OCRAM location reserved for ROM usage.

Signed-off by:- Kshitiz Varshney <kshitiz.varshney@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I628ff7464fe0184d0553a7962d592aafd42e8137

show more ...