Merge "fix(qemu-sbsa): enable SVE and SME" into integration

feat(fvp): emulate trapped RNDR

When a platform decides to use FEAT_RNG_TRAP, every RNDR or RNDRSS read
will trap into EL3. The platform can then emulate those instructions, by
either executing the

feat(fvp): emulate trapped RNDR

When a platform decides to use FEAT_RNG_TRAP, every RNDR or RNDRSS read
will trap into EL3. The platform can then emulate those instructions, by
either executing the real CPU instructions, potentially conditioning the
results, or use rate-limiting or filtering to protect the hardware
entropy pool. Another possiblitiy would be to use some platform specific
TRNG device to get entropy and returning this.

To demonstrate platform specific usage, add a demo implementation for the
FVP: It will execute the actual CPU instruction and just return the
result. This should serve as reference code to implement platform specific
policies.

We change the definition of read_rndr() and read_rndrrs() to use the
alternative sysreg encoding, so that all assemblers can handle that.

Add documentation about the new platform specific RNG handler function.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Change-Id: Ibce817b3b06ad20129d15531b81402e3cc3e9a9e

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Merge "feat(tc): add delegated attest and measurement tests" into integration

refactor(st): remove unused io_mmc driver

This driver was used when STM32MP_USE_STM32IMAGE was enabled. This flag
is now removed, so the ST io_mmc driver can now be removed.

Signed-off-by: Yann Gau

refactor(st): remove unused io_mmc driver

This driver was used when STM32MP_USE_STM32IMAGE was enabled. This flag
is now removed, so the ST io_mmc driver can now be removed.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I3c1280dec8926b921534c81e143e86cfe6d4ee0d

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Merge "fix(intel): add mailbox error return status for FCS_DECRYPTION" into integration

fix(arm): arm_rotpk_header undefined reference

Moving ARM_ROTPK_S to default to arm_dev_rotpk.S as it was not being
set for Juno cryptocell and this should be the value in most cases.

Change-Id: I5

fix(arm): arm_rotpk_header undefined reference

Moving ARM_ROTPK_S to default to arm_dev_rotpk.S as it was not being
set for Juno cryptocell and this should be the value in most cases.

Change-Id: I56a5a4e61f1ca728b87322b0b09a0d73ed1d5ee0
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>

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feat(tc): add delegated attest and measurement tests

This patch adds Delegated Attestation and Measured Boot tests to the
plat/arm/board/tc platform.
The test suite can be activated by adding the bu

feat(tc): add delegated attest and measurement tests

This patch adds Delegated Attestation and Measured Boot tests to the
plat/arm/board/tc platform.
The test suite can be activated by adding the build time option
`PLATFORM_TEST=1` to the make command. In this case the boot sequence is
not finished, plat_error_handler is called after the tests are run
(regardless of the test result.)

The actual test code is coming from the Trusted-Firmware-M project. Some
of the files of the tf-m-tests and tf-m-extras repo are linked to the
BL31 image.

Versions used for testing:
https://git.trustedfirmware.org/TF-M/tf-m-tests
614e8c358377e4146e8ee13d1246e59d01b4bf1b

https: //git.trustedfirmware.org/TF-M/tf-m-extras
3be9fdd557e6df449de93c2101973fb011699b3d

Change-Id: I98f0f5f760a39d2d7e0dd11d33663ddb75f0b6fc
Signed-off-by: Mate Toth-Pal <mate.toth-pal@arm.com>

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Merge "fix(xilinx): resolve integer handling issue" into integration

Merge "fix(intel): missing NCORE CCU snoop filter fix in BL2" into integration

fix(xilinx): resolve integer handling issue

OEN Number 48 to 63 is for Trusted App and OS.
GET_SMC_OEN limits the return value of OEN number to 63 by bitwise AND
operation with 0x3F. Thus the upper

fix(xilinx): resolve integer handling issue

OEN Number 48 to 63 is for Trusted App and OS.
GET_SMC_OEN limits the return value of OEN number to 63 by bitwise AND
operation with 0x3F. Thus the upper limit check for OEN value returned
by GET_SMC_OEN is not required.
Removing the upper limit check for the OEN value returned by GET_SMC_OEN
resolves integer handling issue CONSTANT_EXPRESSION_RESULT

Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>
Change-Id: Ie04a4e2fb7cc85ec6055a5662736a805a89f7085

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Merge changes I2b23e7c8,I779587af,Ic46de7a4,If753e987,I00171b05, ... into integration

* changes:
fix(layerscape): unlock write access SMMU_CBn_ACTLR
fix(nxp-ddr): add checking return value
fea

Merge changes I2b23e7c8,I779587af,Ic46de7a4,If753e987,I00171b05, ... into integration

* changes:
fix(layerscape): unlock write access SMMU_CBn_ACTLR
fix(nxp-ddr): add checking return value
feat(lx2): enable OCRAM ECC
fix(nxp-tools): fix coverity issue
fix(nxp-ddr): fix coverity issue
fix(nxp-ddr): fix underrun coverity issue
fix(nxp-drivers): fix sd secure boot failure
feat(lx2): support more variants
fix(lx2): init global data before using it
fix(ls1046a): 4 keys secureboot failure resolved
fix(nxp-crypto): fix secure boot assert inclusion
fix(nxp-crypto): fix coverity issue
fix(nxp-drivers): fix fspi coverity issue
fix(nxp-drivers): fix tzc380 memory regions config
fix(layerscape): fix nv_storage assert checking
fix(nxp-ddr): apply Max CDD values for warm boot
fix(nxp-ddr): use CDDWW for write to read delay
fix(layerscape): fix errata a008850

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Merge changes from topic "qemu_sel2" into integration

* changes:
docs(build): describes the SPMC_OPTEE build option
feat(qemu): support el3 spmc
feat(el3-spmc): make platform logical partition

Merge changes from topic "qemu_sel2" into integration

* changes:
docs(build): describes the SPMC_OPTEE build option
feat(qemu): support el3 spmc
feat(el3-spmc): make platform logical partition optional
feat(qemu): support s-el2 spmc
feat(qemu): update abi between spmd and spmc
fix(sptool): add dependency to SP image

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fix(intel): add mailbox error return status for FCS_DECRYPTION

Add 2 more mailbox error return status for FCS_DECRYPTION when sending
mailbox command to SDM

Signed-off-by: Sieu Mun Tang <sieu.mun.t

fix(intel): add mailbox error return status for FCS_DECRYPTION

Add 2 more mailbox error return status for FCS_DECRYPTION when sending
mailbox command to SDM

Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ifff4faa397232cc0080f9fca6f6948ac305915c4

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fix(intel): missing NCORE CCU snoop filter fix in BL2

Clear Ncore CCU snoop filter. There is hardware bug in NCORE CCU IP
and it is causing an issue in the coherent directory tracking of
outstanding

fix(intel): missing NCORE CCU snoop filter fix in BL2

Clear Ncore CCU snoop filter. There is hardware bug in NCORE CCU IP
and it is causing an issue in the coherent directory tracking of
outstanding cache lines.

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I9ee67c94e6379d318516ae8f660a62323ce8d563

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Merge changes Ie6a13e4a,I517074b8,Ifd29b748,I1279d9cb,I3b78e0c5, ... into integration

* changes:
feat(imx8mq): add BL31 PIE support
refactor(imx8mq): introduce BL31_SIZE
refactor(imx8mq): make

Merge changes Ie6a13e4a,I517074b8,Ifd29b748,I1279d9cb,I3b78e0c5, ... into integration

* changes:
feat(imx8mq): add BL31 PIE support
refactor(imx8mq): introduce BL31_SIZE
refactor(imx8mq): make use of setup_page_tables()
feat(imx8mq): always set up console
feat(imx8mq): remove empty bl31_plat_runtime_setup
feat(imx8mq): make IMX_BOOT_UART_BASE configurable via build parameter

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feat(imx8mq): add BL31 PIE support

Enable PIE support so the BL31 firmware can be loaded from anywhere
within the OCRAM (SRAM). For the PIE support we only need to replace
the BL31_BASE define by th

feat(imx8mq): add BL31 PIE support

Enable PIE support so the BL31 firmware can be loaded from anywhere
within the OCRAM (SRAM). For the PIE support we only need to replace
the BL31_BASE define by the BL31_START symbol which is a relocatable
and we need to enable it by setting ENABLE_PIE := 1.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Change-Id: Ie6a13e4ae0fdc6627a94798d7a86df7d5b310896

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refactor(imx8mq): introduce BL31_SIZE

No functional change.

Introduce BL31_SIZE define and calculate the limits based on the
BL31_BASE and the BL31_SIZE define. Also make use of SZ_64K to make
it e

refactor(imx8mq): introduce BL31_SIZE

No functional change.

Introduce BL31_SIZE define and calculate the limits based on the
BL31_BASE and the BL31_SIZE define. Also make use of SZ_64K to make
it easier to read. This is required for later BL31 PIE support since
it drops the calculation based on the BL31_LIMIT and BL31_BASE.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Change-Id: I517074b866b5bf11841b51777f87c926b304488d

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refactor(imx8mq): make use of setup_page_tables()

Improve code readability and align with other i.MX8M* platforms.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Change-Id: Ifd29b74872e3a56728

refactor(imx8mq): make use of setup_page_tables()

Improve code readability and align with other i.MX8M* platforms.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Change-Id: Ifd29b74872e3a567288d208de4827403078164e9

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feat(imx8mq): always set up console

This aligns the i.MX8MQ platform behaviour with the other i.MX8M*
platforms by always setting up the console UART.

Signed-off-by: Lucas Stach <l.stach@pengutroni

feat(imx8mq): always set up console

This aligns the i.MX8MQ platform behaviour with the other i.MX8M*
platforms by always setting up the console UART.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Change-Id: I1279d9cb4feb6e789422b9844cab711b8daae74e

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feat(imx8mq): remove empty bl31_plat_runtime_setup

Having this empty definition is actively harmful, as it prevents the
default weak function to be used, which does a switch of the console
state.

S

feat(imx8mq): remove empty bl31_plat_runtime_setup

Having this empty definition is actively harmful, as it prevents the
default weak function to be used, which does a switch of the console
state.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Change-Id: I3b78e0c524c4907714036dba573a44d8f9c48b09

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feat(imx8mq): make IMX_BOOT_UART_BASE configurable via build parameter

This aligns the i.MX8MQ build with the other i.MX8M platforms by
allowing to override the default IMX_BOOT_UART_BASE value via

feat(imx8mq): make IMX_BOOT_UART_BASE configurable via build parameter

This aligns the i.MX8MQ build with the other i.MX8M platforms by
allowing to override the default IMX_BOOT_UART_BASE value via a make
parameter.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Change-Id: Iad9b844517209fc7d051c61767f71ac9fa2b55c7

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fix(st-crypto): set get_plain_pk_from_asn1() static

The issue is triggered when enabling -Wmissing-prototypes warning:
plat/st/common/stm32mp_crypto_lib.c:81:5: warning:
no previous prototype for '

fix(st-crypto): set get_plain_pk_from_asn1() static

The issue is triggered when enabling -Wmissing-prototypes warning:
plat/st/common/stm32mp_crypto_lib.c:81:5: warning:
no previous prototype for 'get_plain_pk_from_asn1'
[-Wmissing-prototypes]
81 | int get_plain_pk_from_asn1(void *pk_ptr, unsigned int pk_len,
| ^~~~~~~~~~~~~~~~~~~~~~

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ia36bbaba6e187ab47c203ddf0d7d017b210545cf

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fix(stm32mp1): add missing platform.h include

This includes the functions definitions, and avoids sparse warnings:
plat/st/stm32mp1/plat_image_load.c:13:6: warning:
symbol 'plat_flush_next_bl_param

fix(stm32mp1): add missing platform.h include

This includes the functions definitions, and avoids sparse warnings:
plat/st/stm32mp1/plat_image_load.c:13:6: warning:
symbol 'plat_flush_next_bl_params' was not declared.
Should it be static?
plat/st/stm32mp1/plat_image_load.c:21:16: warning:
symbol 'plat_get_bl_image_load_info' was not declared.
Should it be static?
plat/st/stm32mp1/plat_image_load.c:29:13: warning:
symbol 'plat_get_next_bl_params' was not declared.
Should it be static?

The issue was also found when enabling -Wmissing-prototypes warning:
plat/st/stm32mp1/plat_image_load.c:13:6: error:
no previous prototype for 'plat_flush_next_bl_params'
[-Werror=missing-prototypes]
13 | void plat_flush_next_bl_params(void)
| ^~~~~~~~~~~~~~~~~~~~~~~~~
plat/st/stm32mp1/plat_image_load.c:21:17: error:
no previous prototype for 'plat_get_bl_image_load_info'
[-Werror=missing-prototypes]
21 | bl_load_info_t *plat_get_bl_image_load_info(void)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
plat/st/stm32mp1/plat_image_load.c:29:14: error:
no previous prototype for 'plat_get_next_bl_params'
[-Werror=missing-prototypes]
29 | bl_params_t *plat_get_next_bl_params(void)
| ^~~~~~~~~~~~~~~~~~~~~~~

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I0bb3052f6efd888462eab2fd8f18862e7fbf02b9

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fix(st): make metadata_block_spec static

This issue was triggered by sparse tool:
plat/st/common/stm32mp_fconf_io.c:31:17: warning:
symbol 'metadata_block_spec' was not declared. Should it be stati

fix(st): make metadata_block_spec static

This issue was triggered by sparse tool:
plat/st/common/stm32mp_fconf_io.c:31:17: warning:
symbol 'metadata_block_spec' was not declared. Should it be static?

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I283d15792ed0e7ac5181e18aaf54010a0e61b370

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Merge changes from topic "full_dev_rsa_key" into integration

* changes:
docs(arm): add ARM_ROTPK_LOCATION variant full key
feat(arm): add ARM_ROTPK_LOCATION variant full key