Merge "feat(mediatek): add APU init flow" into integration

Merge changes from topic "jc/cpu_feat" into integration

* changes:
feat(cpufeat): enable FEAT_SVE for FEAT_STATE_CHECKED
feat(cpufeat): enable FEAT_SME for FEAT_STATE_CHECKED

feat(mediatek): add APU init flow

The patch brings preparation steps before powering on APU
(AI processing unit)

Change-Id: Ica01e035153ec6f3af0de6ba2c66b17a064f8c89
Signed-off-by: Chungying Lu <ch

feat(mediatek): add APU init flow

The patch brings preparation steps before powering on APU
(AI processing unit)

Change-Id: Ica01e035153ec6f3af0de6ba2c66b17a064f8c89
Signed-off-by: Chungying Lu <chungying.lu@mediatek.com>

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Merge changes from topic "set-wake-source-for-versal-net" into integration

* changes:
refactor(xilinx): move enum to common place
fix(xilinx): fix misra defects
fix(xilinx): remove unnecessary

Merge changes from topic "set-wake-source-for-versal-net" into integration

* changes:
refactor(xilinx): move enum to common place
fix(xilinx): fix misra defects
fix(xilinx): remove unnecessary condition
feat(versal): replace irq array with switch case
feat(versal-net): add support for set wakeup source
refactor(versal): move set wake src fn to common place

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feat(cpufeat): enable FEAT_SME for FEAT_STATE_CHECKED

Add support for runtime detection (ENABLE_SME_FOR_NS=2), by splitting
feat_sme_supported() into an ID register reading function and a
second fun

feat(cpufeat): enable FEAT_SME for FEAT_STATE_CHECKED

Add support for runtime detection (ENABLE_SME_FOR_NS=2), by splitting
feat_sme_supported() into an ID register reading function and a
second function to report the support status. That function considers
both build time settings and runtime information (if needed), and is
used before we do SME specific setup.

Change the FVP platform default to the now supported dynamic option
(=2),so the right decision can be made by the code at runtime.

Change-Id: Ida9ccf737db5be20865b84f42b1f9587be0626ab
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>

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Merge "refactor(xilinx): rename gic macros to make common" into integration

Merge changes from topic "set-wake-source-for-versal-net" into integration

* changes:
feat(xilinx): add device node indexes
fix(xilinx): initialize values to device enum members

Merge "refactor(xilinx): move pm_defs.h to common place" into integration

Merge "refactor(xilinx): move versal files to common place" into integration

Merge changes from topic "psci-osi" into integration

* changes:
feat(sc7280): add support for PSCI_OS_INIT_MODE
feat(fvp): enable support for PSCI OS-initiated mode
feat(psci): update PSCI_FEA

Merge changes from topic "psci-osi" into integration

* changes:
feat(sc7280): add support for PSCI_OS_INIT_MODE
feat(fvp): enable support for PSCI OS-initiated mode
feat(psci): update PSCI_FEATURES
feat(psci): add support for OS-initiated mode
feat(psci): add support for PSCI_SET_SUSPEND_MODE
build(psci): add build option for OS-initiated mode
docs(psci): add design proposal for OS-initiated mode

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Merge changes from topic "feat_amu_rework" into integration

* changes:
refactor(amu): use new AMU feature check routines
refactor(amu): unify ENABLE_AMU and ENABLE_FEAT_AMUv1

refactor(xilinx): move enum to common place

Moved IOCTL enum from ZynqMP to common place so that it can be used
for all the platforms.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Cha

refactor(xilinx): move enum to common place

Moved IOCTL enum from ZynqMP to common place so that it can be used
for all the platforms.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I6ad992da30f2def9f46c8ba79753d79ed00fe024

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fix(xilinx): fix misra defects

This patch fixes defects 5.5, 10.1, 10.3, 10.4, 10.7 reported
by MISRA-2012 scan.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Ie6f6e9bf2ce13

fix(xilinx): fix misra defects

This patch fixes defects 5.5, 10.1, 10.3, 10.4, 10.7 reported
by MISRA-2012 scan.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Ie6f6e9bf2ce1335bbb61aa2e69a3a196865fd504

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fix(xilinx): remove unnecessary condition

Remove unnecessary condition check from pm_client_set_wakeup_sources()
as the code will never get to this condition.

Signed-off-by: Jay Buddhabhatti <jay.b

fix(xilinx): remove unnecessary condition

Remove unnecessary condition check from pm_client_set_wakeup_sources()
as the code will never get to this condition.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Ia046e1188fdf6e024a146d3f4dd3d8f87a285e7f

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feat(versal): replace irq array with switch case

Replaced array of interrupt to PM node index map with switch-case for
Versal. As a result, the size of code got reduced by 527 bytes. In case
of erro

feat(versal): replace irq array with switch case

Replaced array of interrupt to PM node index map with switch-case for
Versal. As a result, the size of code got reduced by 527 bytes. In case
of error return invalid node index i.e. XPM_NODEIDX_DEV_MIN.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Ifb17366362e2d1757d8933e1ce29083f7ad86b8f

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feat(versal-net): add support for set wakeup source

Currently wakeup source is not getting setup during suspend resume.
Add support to set wakeup source as per IRQ enabled using switch-case
instead

feat(versal-net): add support for set wakeup source

Currently wakeup source is not getting setup during suspend resume.
Add support to set wakeup source as per IRQ enabled using switch-case
instead of static array as it is more efficient.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I30d7ceb3a1d56ba5174fc7334f3a29081c918c92

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refactor(versal): move set wake src fn to common place

Moved pm_client_set_wakeup_sources() to make common for both Versal and
Versal NET platforms.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatt

refactor(versal): move set wake src fn to common place

Moved pm_client_set_wakeup_sources() to make common for both Versal and
Versal NET platforms.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Ib82c5f85a0a27bc47940f6796f1cf68b2c38a908

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refactor(xilinx): rename gic macros to make common

Rename macros PLAT_VERSAL_GICD_BASE, PLAT_VERSAL_GICR_BASE,
PLAT_VERSAL_NET_GICD_BASE and PLAT_VERSAL_NET_GICR_BASE to
PLAT_GICD_BASE_VALUE and PLA

refactor(xilinx): rename gic macros to make common

Rename macros PLAT_VERSAL_GICD_BASE, PLAT_VERSAL_GICR_BASE,
PLAT_VERSAL_NET_GICD_BASE and PLAT_VERSAL_NET_GICR_BASE to
PLAT_GICD_BASE_VALUE and PLAT_GICR_BASE_VALUE to make common
for both Versal and Versal NET platforms.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Ibcebfb8e741e828ef272b32cbedfb4dcbf8629b6

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feat(xilinx): add device node indexes

Add additional Versal NET device node indexes to the existing list
that are for new APU cores, RPU cores, OCM and TCM memories, USB 1
and WDT devices.

Signed-o

feat(xilinx): add device node indexes

Add additional Versal NET device node indexes to the existing list
that are for new APU cores, RPU cores, OCM and TCM memories, USB 1
and WDT devices.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Iea0570ae5d81de9c5b2793329ae1e7284b6c5a3f

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fix(xilinx): initialize values to device enum members

Initialized values explicitly to device enum members to avoid
value assignment from the compiler and for better readability.

Signed-off-by: Jay

fix(xilinx): initialize values to device enum members

Initialized values explicitly to device enum members to avoid
value assignment from the compiler and for better readability.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I20f24c3b4fb47b2b011def9f1f43ea8238c66b80

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refactor(xilinx): move pm_defs.h to common place

Moved pm_defs.h file to common place so that it can be used for
Versal NET and ZynqMP. Also moved common code from zynqmp_pm_defs.h to
common place.

refactor(xilinx): move pm_defs.h to common place

Moved pm_defs.h file to common place so that it can be used for
Versal NET and ZynqMP. Also moved common code from zynqmp_pm_defs.h to
common place.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I2ee1e72258c6052cdd6467cdbcf4009afb98da49

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refactor(xilinx): move versal files to common place

Moved necessary files to common place so that it can be used for
Versal NET.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id

refactor(xilinx): move versal files to common place

Moved necessary files to common place so that it can be used for
Versal NET.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I611fa849207b082e6599acfb65c55d27b9c99435

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refactor(amu): use new AMU feature check routines

The AMU extension code was using its own feature detection routines.
Replace them with the generic CPU feature handlers (defined in
arch_features.h)

refactor(amu): use new AMU feature check routines

The AMU extension code was using its own feature detection routines.
Replace them with the generic CPU feature handlers (defined in
arch_features.h), which get updated to cover the v1p1 variant as well.

Change-Id: I8540f1e745d7b02a25a6c6cdf2a39d6f5e21f2aa
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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refactor(amu): unify ENABLE_AMU and ENABLE_FEAT_AMUv1

So far we have the ENABLE_AMU build option to include AMU register
handling code for enabling and context switch. There is also an
ENABLE_FEAT_A

refactor(amu): unify ENABLE_AMU and ENABLE_FEAT_AMUv1

So far we have the ENABLE_AMU build option to include AMU register
handling code for enabling and context switch. There is also an
ENABLE_FEAT_AMUv1 option, solely to protect the HAFGRTR_EL2 system
register handling. The latter needs some alignment with the new feature
scheme, but it conceptually overlaps with the ENABLE_AMU option.

Since there is no real need for two separate options, unify both into a
new ENABLE_FEAT_AMU name in a first step. This is mostly just renaming at
this point, a subsequent patch will make use of the new feature handling
scheme.

Change-Id: I97d8a55bdee2ed1e1509fa9f2b09fd0bdd82736e
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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feat(zynqmp): build pm code as library

Build Platform Management(PM) code as an Library.
Building PM code as library provides an option to switch to different
firmware interfaces like custom package

feat(zynqmp): build pm code as library

Build Platform Management(PM) code as an Library.
Building PM code as library provides an option to switch to different
firmware interfaces like custom packages.

Change-Id: I872d45edf55ac83a6efb86591d12a0fef7b598cb
Signed-off-by: Amit Nagal <amit.nagal@amd.com>
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>

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