fix(tc): enable the execution of both platform tests

The C preprocessor cannot compare defines against strings.
Such an expression is always evaluated to be true. Therefore,
its usage in a condition

fix(tc): enable the execution of both platform tests

The C preprocessor cannot compare defines against strings.
Such an expression is always evaluated to be true. Therefore,
its usage in a conditional expression results that always the
first branch is taken. Other branches cannot be reached by
any configuration value. The fix removes this string comparison
and instead it introduces distinct defines for all the cases.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: Ia1142b31b6778686c74e1e882fe4604fe3b6501d

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fix(tc): update the name of mbedtls config header

Recently mbedtls_cofig.h was renamed to:
- mbedtls_config-2.h
- mbedtls_config-3.h

Modify the include order to resolve the
static check failure i

fix(tc): update the name of mbedtls config header

Recently mbedtls_cofig.h was renamed to:
- mbedtls_config-2.h
- mbedtls_config-3.h

Modify the include order to resolve the
static check failure in the CI.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I424f1cde199397b8df780a9514f1042e601c6502

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feat(tegra): implement 'pwr_domain_off_early' handler

This patch implements the pwr_domain_off_early handler for
Tegra platforms.

Powering off the boot core on some Tegra platforms is not
allowed a

feat(tegra): implement 'pwr_domain_off_early' handler

This patch implements the pwr_domain_off_early handler for
Tegra platforms.

Powering off the boot core on some Tegra platforms is not
allowed and the SOC specific helper functions for Tegra194,
Tegra210 and Tegra186 implement this restriction.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Change-Id: I9d06e0eee12314764adb0422e023a5bec6ed9c1e

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Merge changes from topic "ti-sci-cleanup" into integration

* changes:
feat(ti): synchronize access to secure proxy threads
refactor(ti): remove inline directive from ti_sci and sec_proxy drivers

Merge changes from topic "ti-sci-cleanup" into integration

* changes:
feat(ti): synchronize access to secure proxy threads
refactor(ti): remove inline directive from ti_sci and sec_proxy drivers
refactor(ti): refactor ti_sci_{setup,do}_xfer to allow zero size response
feat(ti): add sub and patch version number support

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feat(allwinner): add support for Allwinner T507 SoC

The Allwinner T507 SoC is using the same die as the H616, but in a
different package. On top of this, there is at least one different die
revision

feat(allwinner): add support for Allwinner T507 SoC

The Allwinner T507 SoC is using the same die as the H616, but in a
different package. On top of this, there is at least one different die
revision out there, which uses a different CPU cluster control block.
The same die revision has been spotted in some, but not all, H313 SoCs.

Apart from that IP block, the rest of the SoC seems the same, so we can
support them using the existing H616 port. The die revision can be
auto-detected, so there is no extra build option or knowledge needed.

Provide the deviating CPU power up/down sequence for the die variant.
The new IP block uses per-core instead of per-cluster registers, but
follows the same pattern otherwise.

Since the CPU ops code is shared among all Allwinner SoCs, we need to
dummy-define the new register names for the older SoCs. The actual new
code is guarded by a predicate function, that is hard coded to return
true on the other SoCs. Since this is a static inline function in a
header file, the compiler will optimise away the unneeded branch there,
so the generated code for the other SoCs stays the same.

Change-Id: Ib5ade99d34b4ccb161ccde0e34f280ca6bd16ecd
Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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feat(allwinner): add function to detect H616 die variant

Allwinner provides a number of SoCs that use the same die as the H616.
Some of those chips apparently use a slight variation of that die, tha

feat(allwinner): add function to detect H616 die variant

Allwinner provides a number of SoCs that use the same die as the H616.
Some of those chips apparently use a slight variation of that die, that
differs in the way the CPU cores' power and reset controls are handled.
This die variation can be detected by reading the SRAM version register.

Provide a predicate function that returns false if that die variant is
used. Since the CPU power control code is shared for all supported SoCs,
we provide an instance of this function for each SoC, as a static
inline, and return true on all other SoCs. This allows to always use
this function, and still let the compiler optimise away the unneeded
branch for those older SoCs.

This function is unused for now, but is needed in the next patch.

Change-Id: I49e014b895b7e2f55b4e7dc2b3d8aa31cee711b5
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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feat(allwinner): add extra CPU control registers

The die used in several variants of the Allwinner H616 SoC (H313, T507)
seems to produced in at least two revisions. The newer one differs from
the o

feat(allwinner): add extra CPU control registers

The die used in several variants of the Allwinner H616 SoC (H313, T507)
seems to produced in at least two revisions. The newer one differs from
the original by using a different CPU control register IP block.

Add those newly used register offsets to the respective header file. The
MMIO block itself is actually present in both variants, though the
registers are different. The new registers tend to use one register per
core, in contrast to one register per cluster in the older revisions.

Change-Id: Ifbda1bdc67a6a16fbb901dbc83996e4a148b7602
Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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refactor(allwinner): consolidate sunxi_cfg.h files

The header files describing the CPU cluster configuration IP block for
the H6 and H616 are actually identical, so merge them into one file and
move

refactor(allwinner): consolidate sunxi_cfg.h files

The header files describing the CPU cluster configuration IP block for
the H6 and H616 are actually identical, so merge them into one file and
move that to a common location. There is an upcoming SoC which will
similarly share a header file with the R329 SoC, so move that to the
same location already. In Allwinner's BSP source those two SoC groups
are typically called "NCAT" and "NCAT2", so use those names for the
shared header files. No functional change.

Change-Id: I98318373577344dbe228a81fa331ce660df32b5f
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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build(fvp): reduce the number of cpu libraries included by default

The fvp build includes a very large number of cpus so that it can run on
a wide range of models. One config (HW_ASSISTED_COHERENCY=

build(fvp): reduce the number of cpu libraries included by default

The fvp build includes a very large number of cpus so that it can run on
a wide range of models. One config (HW_ASSISTED_COHERENCY=1
CTX_INCLUDE_AARCH32_REGS=0) includes an unusually large number of cpus.
Well, the list is quite arbitrary and incomplete. As we're currently out
of BL31 space on the fvp, remove all that are not routinely run in the
CI to buy us some time.

Also use the opportunity to reorder the list into something searchable.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I8c6cad41327451edf0d3a0e92c43d6c72c254aac

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feat(xilinx): sync copyright format

Use the same format in all files 's/Copyright (C)/Copyright (c)/g'.

Change-Id: I0e200eb135e7369d0e6b3b694acd406ec10ca9e7
Signed-off-by: Michal Simek <michal.sime

feat(xilinx): sync copyright format

Use the same format in all files 's/Copyright (C)/Copyright (c)/g'.

Change-Id: I0e200eb135e7369d0e6b3b694acd406ec10ca9e7
Signed-off-by: Michal Simek <michal.simek@amd.com>

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Merge "refactor(cpufeat): enable FEAT_DIT for FEAT_STATE_CHECKED" into integration

refactor(cpufeat): enable FEAT_DIT for FEAT_STATE_CHECKED

At the moment we only support FEAT_DIT to be either unconditionally
compiled in, or to be not supported at all.

Add support for runtime det

refactor(cpufeat): enable FEAT_DIT for FEAT_STATE_CHECKED

At the moment we only support FEAT_DIT to be either unconditionally
compiled in, or to be not supported at all.

Add support for runtime detection (ENABLE_DIT=2), by splitting
is_armv8_4_dit_present() into an ID register reading function and a
second function to report the support status. That function considers
both build time settings and runtime information (if needed).

We use ENABLE_DIT in two occassions in assembly code, where we just set
the DIT bit in the DIT system register.
Protect those two cases by reading the CPU ID register when ENABLE_DIT
is set to 2.

Change the FVP platform default to the now supported dynamic
option (=2), so the right decision can be made by the code at runtime.

Change-Id: I506d352f18e23c60db8cdf08edb449f60adbe098
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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Merge "refactor(morello): remove duplication of platform information struct" into integration

Merge "feat(gcs): support guarded control stack" into integration

fix(fvp): correct ehf priority for SPM_MM

PLAT_SP_PRI is used by SPM_MM and it is assigned same value as RAS
priority. Which is not allowed by exception handling framework and
causes build failure i

fix(fvp): correct ehf priority for SPM_MM

PLAT_SP_PRI is used by SPM_MM and it is assigned same value as RAS
priority. Which is not allowed by exception handling framework and
causes build failure if both SPM_MM and RAS is enabled.

To fix this problem assign SP a different priority than RAS.

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: Iff64ac547f0966c0d94ac7c3ab0eb1e3151fb314

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Merge changes from topic "mb/trusted-boot-update" into integration

* changes:
refactor(auth)!: unify REGISTER_CRYPTO_LIB
refactor(auth): replace plat_convert_pk
docs(auth): add auth_decrypt in

Merge changes from topic "mb/trusted-boot-update" into integration

* changes:
refactor(auth)!: unify REGISTER_CRYPTO_LIB
refactor(auth): replace plat_convert_pk
docs(auth): add auth_decrypt in CM chapter
feat(auth): compare platform and certificate ROTPK for authentication
docs(auth): add 'calc_hash' function's details in CM

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style(xilinx): fix AMD copyright format

There is missing comma in copyright line. It is better to have all
Copyrights align to the same style that's why fix it.

Change-Id: Ifc04b474e1a172a7243b073d

style(xilinx): fix AMD copyright format

There is missing comma in copyright line. It is better to have all
Copyrights align to the same style that's why fix it.

Change-Id: Ifc04b474e1a172a7243b073d944007cf17d76e87
Signed-off-by: Michal Simek <michal.simek@amd.com>

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Merge changes from topic "versal/xlat-v2" into integration

* changes:
feat(versal): switch to xlat_v2
fix(xilinx): remove asserts around arg0/arg1

refactor(auth)!: unify REGISTER_CRYPTO_LIB

Have only one definition for REGISTER_CRYPTO_LIB macro, with all the
possible fields. Worst case adds 4 u64 to crypto_lib_desc.
While at it, correct some M

refactor(auth)!: unify REGISTER_CRYPTO_LIB

Have only one definition for REGISTER_CRYPTO_LIB macro, with all the
possible fields. Worst case adds 4 u64 to crypto_lib_desc.
While at it, correct some MISRA violations:
MC3R1.R12.1: (advisory) The precedence of operators within expressions
should be made explicit.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I1342a20e6eef2354753182c2a81ff959e03e5c81

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refactor(auth): replace plat_convert_pk

Following discussions in the reviews of the patch that introduced
plat_convert_pk() function [1], it was decided to deprecate it to
avoid weak function declar

refactor(auth): replace plat_convert_pk

Following discussions in the reviews of the patch that introduced
plat_convert_pk() function [1], it was decided to deprecate it to
avoid weak function declaration.
A new optional function pointer convert_pk is added to crypto_lib_desc_t.
A new function crypto_mod_convert_pk() will either call
crypto_lib_desc.convert_pk() if it is defined, or do the same
as what was done by the weak function otherwise.

[1] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/17174

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I9358867f8bfd5e96b5ee238c066877da368e43c6

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Merge "fix(zynqmp): remove unused PLAT_NUM_POWER_DOMAINS" into integration

Merge "style(xilinx): replace ARM by Arm in copyrights" into integration

build: deprecate Arm rde1edge

Arm has decided to deprecate the rde1edge platform. The development
of software and fast model for this platform have been discontinued.
Hence, updated the makefile to

build: deprecate Arm rde1edge

Arm has decided to deprecate the rde1edge platform. The development
of software and fast model for this platform have been discontinued.
Hence, updated the makefile to warn about the deprecation of this
platform, and also reflected it in the documentation.

Change-Id: I0d44de4590dd5dce02c7c4b433df25dc438e6c49
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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Merge "feat(imx8): add support for debug uart on lpuart1" into integration

refactor(morello): remove duplication of platform information struct

morello_plat_info is defined identically in multiple files, definition
is moved to a header file to avoid duplication.

Signed-of

refactor(morello): remove duplication of platform information struct

morello_plat_info is defined identically in multiple files, definition
is moved to a header file to avoid duplication.

Signed-off-by: Werner Lewis <werner.lewis@arm.com>
Change-Id: I607354902c55f5c31f0732de9db60604b82aef97

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