| 9f933f60 | 18-Nov-2024 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge "fix(rme): add console name to checksum calculation" into integration |
| a4fe3846 | 15-Nov-2024 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge "fix(stm32mp2): use TOOL_ADD_IMG_PAYLOAD for BL31 DT" into integration |
| aa99881d | 15-Nov-2024 |
AlexeiFedorov <Alexei.Fedorov@arm.com> |
fix(rme): add console name to checksum calculation
The name field of console_info structure was missed in checksum calculation. This is corrected by adding a new helper checksum_calc() which compute
fix(rme): add console name to checksum calculation
The name field of console_info structure was missed in checksum calculation. This is corrected by adding a new helper checksum_calc() which computes the checksum in a field agnostic manner.
Change-Id: I5c39ee43f1fa20872c37846e3feeabd0525a47ae Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>
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| 8b27eb7d | 02-Oct-2024 |
Ziad Elhanafy <ziad.elhanafy@arm.com> |
feat(rd1ae): add support for OP-TEE SPMC
Add support for loading and booting OP-TEE as SPMC running at S-EL1 for RD-1 AE platform.
Signed-off-by: Ziad Elhanafy <ziad.elhanafy@arm.com> Change-Id: If
feat(rd1ae): add support for OP-TEE SPMC
Add support for loading and booting OP-TEE as SPMC running at S-EL1 for RD-1 AE platform.
Signed-off-by: Ziad Elhanafy <ziad.elhanafy@arm.com> Change-Id: If29f56bb19fe7f370208ef5a6f60bfff4346ea93
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| f15f1c62 | 14-Nov-2024 |
Yann Gautier <yann.gautier@st.com> |
fix(stm32mp2): use TOOL_ADD_IMG_PAYLOAD for BL31 DT
Use TOOL_ADD_IMG_PAYLOAD instead of TOOL_ADD_IMG to generate the BL31 device tree blob to be included in FIP. This allows building all TF-A binari
fix(stm32mp2): use TOOL_ADD_IMG_PAYLOAD for BL31 DT
Use TOOL_ADD_IMG_PAYLOAD instead of TOOL_ADD_IMG to generate the BL31 device tree blob to be included in FIP. This allows building all TF-A binaries and FIP in a single command. Else, as TOOL_ADD_IMG evaluate the existence of the file before building it, we have a build error.
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I72d2f70733c49792d0321ad07f5a3bbd283a36d4
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| 16a659d7 | 14-Nov-2024 |
Yann Gautier <yann.gautier@st.com> |
fix(stm32mp2): enable timer earlier in BL31
The timer is required when setting console. In BL2 the timer init is done in clock driver init. This is not the case in BL31. So initialize the generic_de
fix(stm32mp2): enable timer earlier in BL31
The timer is required when setting console. In BL2 the timer init is done in clock driver init. This is not the case in BL31. So initialize the generic_delay_timer_init() just after stm32mp2_clk_init() call. This is required after the recent changes in timer framework [1].
[1]: a6485b2b3b refactor(delay-timer): add timer callback functions
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I4e84a45fc526ed132e97b238596aa69ddfc2b058
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| 7a95759f | 12-Nov-2024 |
Chris Kay <chris.kay@arm.com> |
fix(build): ensure `$(ROT_KEY)` depends on correct directory rules
In order for directories to be automatically created when used as a dependency, they must end with a forward slash (`/`). This is b
fix(build): ensure `$(ROT_KEY)` depends on correct directory rules
In order for directories to be automatically created when used as a dependency, they must end with a forward slash (`/`). This is because we have a pattern rule (`%/`) to create a directory anywhere where a directory is required as a direct dependency.
Change-Id: Ib632d59da0745f6cadb0a839a62360aeca25c178 Signed-off-by: Chris Kay <chris.kay@arm.com>
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| 1b65be59 | 17-Oct-2024 |
Jacky Bai <ping.bai@nxp.com> |
fix(imx8m): fix imx8mq build break
Fix the build break for i.MX8MQ to make it boot with basic function enabled.
Signed-off-by: Jacky Bai <ping.bai@nxp.com> Change-Id: I2ff7976e3fb7960d6876d26fe0b4a
fix(imx8m): fix imx8mq build break
Fix the build break for i.MX8MQ to make it boot with basic function enabled.
Signed-off-by: Jacky Bai <ping.bai@nxp.com> Change-Id: I2ff7976e3fb7960d6876d26fe0b4a78e51219ae2
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| 3a36f70b | 14-Jan-2020 |
Jacky Bai <ping.bai@nxp.com> |
fix(imx8mq): fix imx8mq build break due to hab
Add the HAB secure boot support for the i.MX8MQ to fix the build break.
Signed-off-by: Jacky Bai <ping.bai@nxp.com> Change-Id: I806de2dc42806e008355cc
fix(imx8mq): fix imx8mq build break due to hab
Add the HAB secure boot support for the i.MX8MQ to fix the build break.
Signed-off-by: Jacky Bai <ping.bai@nxp.com> Change-Id: I806de2dc42806e008355cc185065e774570362f0
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| 1a571151 | 09-Nov-2024 |
Marek Vasut <marek.vasut+renesas@mailbox.org> |
fix(rcar3-drivers): disable A/B loader support by default
The A/B loader [1] meant to be used for convenient CI testing. The tool is installed into the same location as SA0, where it conveniently fi
fix(rcar3-drivers): disable A/B loader support by default
The A/B loader [1] meant to be used for convenient CI testing. The tool is installed into the same location as SA0, where it conveniently fits due to its size, and where it makes use of non-volatile PMIC registers to alternate between loading and starting A or B copy of the BL2. The PMIC registers are used because CPU registers are lost across reset.
In case the B copy is loaded, it is loaded from 8 MiB offset from start of HF. In case the B copy fails to boot, a simple reset of the system will switch back to booting previously known working A copy and allow recovery.
The A/B loader sets MFIS bit MFISBTSTSR_BOOT_PARTITION to pass the information which A/B copy is currently booting on to TFA, which then loads the follow up components from 0 MiB or 8 MiB offset, depending on whether the A or B copy is being booted.
The MFISBTSTSR_BOOT_PARTITION interferes with regular A/B switching during boot from eMMC as the boot media, where the BootROM also sets MFISBTSTSR_BOOT_PARTITION bit in case the system boots from SECOND eMMC HW BOOT partition.
Since the A/B loader is meant as a development and CI tool, isolate the A/B loader use to RPC HF only and furthermore isolate it behind new RCAR_RPC_HYPERFLASH_ABLOADER option which is disabled by default.
[1] https://github.com/marex/abloader
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Change-Id: I04ecd50fa1405b78e1ba3949d54029034d4f22d8
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| 6ce576c6 | 08-Nov-2024 |
Sieu Mun Tang <sieu.mun.tang@intel.com> |
fix(intel): add FPGA isolation trigger when reconfiguration
This change is to add in new Mailbox CMD to SDM for MPFE isolation.
Change-Id: I52c84dc227e1c8edbded63c699ded63e431d9af2 Signed-off-by: S
fix(intel): add FPGA isolation trigger when reconfiguration
This change is to add in new Mailbox CMD to SDM for MPFE isolation.
Change-Id: I52c84dc227e1c8edbded63c699ded63e431d9af2 Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
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| 42e90620 | 06-Aug-2024 |
Sieu Mun Tang <sieu.mun.tang@intel.com> |
fix(intel): redesign F2SOC bridge enable and disable flow for Agilex5
This is to redesign the flow of F2SOC bridge enable and disable.
Change-Id: I9b2a2a11fa2ad8e622765971fdf59a0738246e13 Signed-of
fix(intel): redesign F2SOC bridge enable and disable flow for Agilex5
This is to redesign the flow of F2SOC bridge enable and disable.
Change-Id: I9b2a2a11fa2ad8e622765971fdf59a0738246e13 Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
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| a5e7d5b1 | 08-Nov-2024 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge "fix(arm): load dt before updating entry point" into integration |
| f7a41fb4 | 10-Oct-2024 |
Boyan Karatotev <boyan.karatotev@arm.com> |
perf(build): be clever about uppercasing
Most of the macros in build_macros.mk get lazily evaluated. That's mostly fine, except for the fact that the `uppercase` macro needs to spawn a subshell to g
perf(build): be clever about uppercasing
Most of the macros in build_macros.mk get lazily evaluated. That's mostly fine, except for the fact that the `uppercase` macro needs to spawn a subshell to get its output. And the target for every file requires calling `uppercase` many, MANY, times, thrashing performance on even the most trivial of make commands.
We can be a little clever and only call `uppercase` a handful of times and then pass around the already uppercased strings.
The same is true about the verbosity augmentation variables. Simply changing them to simply expanded variables allows for them to be pre-processed and then used over and over again.
`make realclean` is a pretty good benchmark for this as it doesn't do much else but must process all the rules, like every other make command. On a clean checkout of TF-A on an Intel Xeon Gold 5218 (i.e. slow single-core) workstation, that command used to take about 7 seconds. With this patch it takes about 0.5.
Change-Id: I632236a12a40f169e834974ecbc73ff80aac3462 Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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| 19d52a83 | 09-Aug-2024 |
Andre Przywara <andre.przywara@arm.com> |
feat(cpufeat): add ENABLE_FEAT_LS64_ACCDATA
Armv8.6 introduced the FEAT_LS64 extension, which provides a 64 *byte* store instruction. A related instruction is ST64BV0, which will replace the lowest
feat(cpufeat): add ENABLE_FEAT_LS64_ACCDATA
Armv8.6 introduced the FEAT_LS64 extension, which provides a 64 *byte* store instruction. A related instruction is ST64BV0, which will replace the lowest 32 bits of the data with a value taken from the ACCDATA_EL1 system register (so that EL0 cannot alter them). Using that ST64BV0 instruction and accessing the ACCDATA_EL1 system register is guarded by two SCR_EL3 bits, which we should set to avoid a trap into EL3, when lower ELs use one of those.
Add the required bits and pieces to make this feature usable: - Add the ENABLE_FEAT_LS64_ACCDATA build option (defaulting to 0). - Add the CPUID and SCR_EL3 bit definitions associated with FEAT_LS64. - Add a feature check to check for the existing four variants of the LS64 feature and detect future extensions. - Add code to save and restore the ACCDATA_EL1 register on secure/non-secure context switches. - Enable the feature with runtime detection for FVP and Arm FPGA.
Please note that the *basic* FEAT_LS64 feature does not feature any trap bits, it's only the addition of the ACCDATA_EL1 system register that adds these traps and the SCR_EL3 bits.
Change-Id: Ie3e2ca2d9c4fbbd45c0cc6089accbb825579138a Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| c1c406a4 | 07-Oct-2024 |
Harrison Mutai <harrison.mutai@arm.com> |
fix(arm): load dt before updating entry point
For firmware handoff, ensure the device tree (dt) is loaded into memory before setting the entry point arguments for the next bootloader stage. This all
fix(arm): load dt before updating entry point
For firmware handoff, ensure the device tree (dt) is loaded into memory before setting the entry point arguments for the next bootloader stage. This allows the dt to be found and its address passed as an argument.
Change-Id: Ifedd7c573e2d4f6d68c596907d9d6c6a3eded317 Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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| a9fdd198 | 06-Nov-2024 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "xlnx_fix_plat_extn_decl_link" into integration
* changes: fix(versal2): variable conflicting with external linkage fix(versal-net): variable conflicting with external l
Merge changes from topic "xlnx_fix_plat_extn_decl_link" into integration
* changes: fix(versal2): variable conflicting with external linkage fix(versal-net): variable conflicting with external linkage fix(versal): variable conflicting with external linkage fix(zynqmp): variable conflicting with external linkage fix(versal2): add external declaration fix(versal): add external declaration fix(zynqmp): add external declaration
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| e053e89f | 05-Nov-2024 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge "fix(st): set no-pie option when building ST elf file" into integration |
| 34088d7d | 05-Nov-2024 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge changes I26cefbb5,I6a8b3528,I323fb741 into integration
* changes: fix(stm32mp2): set PLAT_MAX_PWR_LVL to one feat(stm32mp2): boot BL33 at EL1 or EL2 feat(stm32mp2): disable unsupported f
Merge changes I26cefbb5,I6a8b3528,I323fb741 into integration
* changes: fix(stm32mp2): set PLAT_MAX_PWR_LVL to one feat(stm32mp2): boot BL33 at EL1 or EL2 feat(stm32mp2): disable unsupported features
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| e53fc040 | 31-Oct-2024 |
Quentin Schulz <quentin.schulz@cherry.de> |
build(rk3399): m0: Makefile: respect verbosity for linkerfile
All commands in the Makefile respect the verbosity except this one, so let's be consistent and respect it for that one as well.
Signed-
build(rk3399): m0: Makefile: respect verbosity for linkerfile
All commands in the Makefile respect the verbosity except this one, so let's be consistent and respect it for that one as well.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Change-Id: I5d1af4ee321e29449b927509cfa5ece01765a99e
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| c0c908e1 | 31-Oct-2024 |
Quentin Schulz <quentin.schulz@cherry.de> |
build(rk3399): m0: fail linker and assembler on warnings
Match the top Makefile flags and fail on warnings for the linker (ld) and assembler (as).
Signed-off-by: Quentin Schulz <quentin.schulz@cher
build(rk3399): m0: fail linker and assembler on warnings
Match the top Makefile flags and fail on warnings for the linker (ld) and assembler (as).
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Change-Id: I53fbcbdbda109b1dfe39b390a41c1ef3fd7d3e04
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| 6feb164b | 31-Oct-2024 |
Quentin Schulz <quentin.schulz@cherry.de> |
build(rk3399): m0: remove redundant M0_CROSS_COMPILE
The included toolchain.mk uses M0_CROSS_COMPILE if present, or defaults to arm-none-eabi-, which is the value this variable holds in this Makefil
build(rk3399): m0: remove redundant M0_CROSS_COMPILE
The included toolchain.mk uses M0_CROSS_COMPILE if present, or defaults to arm-none-eabi-, which is the value this variable holds in this Makefile.
Let's remove it.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Change-Id: Id805703cec0f118acdf4629e345924031b2c8c4b
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| 6fbec46a | 31-Oct-2024 |
Quentin Schulz <quentin.schulz@cherry.de> |
feat(build): rk3399: m0: add support for new binutils versions
c.f. 1f49db5f25cd ("feat(build): add support for new binutils versions") for the actual reasons. This commit applies the same logic but
feat(build): rk3399: m0: add support for new binutils versions
c.f. 1f49db5f25cd ("feat(build): add support for new binutils versions") for the actual reasons. This commit applies the same logic but for the m0 FW for RK3399 since it uses a different set of flags.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Change-Id: I955b229a7d9d473892f3f3483eaf6e33ffe0e273
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| 5049f910 | 31-Oct-2024 |
Quentin Schulz <quentin.schulz@cherry.de> |
fix(rk3399): m0: Makefile: fix outside array bounds warning
Both GCC and clang actually complain about:
""" In file included from src/dram.c:12: src/dram.c: In function 'm0_main': include/rk3399_mc
fix(rk3399): m0: Makefile: fix outside array bounds warning
Both GCC and clang actually complain about:
""" In file included from src/dram.c:12: src/dram.c: In function 'm0_main': include/rk3399_mcu.h:15:34: warning: array subscript 0 is outside array bounds of 'volatile unsigned int[0]' [-Warray-bounds=] 15 | (*(volatile unsigned int *)(c)); __v; }) | ~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ include/rk3399_mcu.h:16:69: note: in definition of macro 'mmio_write_32' 16 | #define mmio_write_32(c, v) ((*(volatile unsigned int *)(c)) = (v)) | ^ src/dram.c:67:23: note: in expansion of macro 'mmio_read_32' 67 | mmio_read_32(PARAM_ADDR + PARAM_FREQ_SELECT)); | ^~~~~~~~~~~~ cc1: note: source object is likely at address zero In function 'ddr_set_pll', inlined from 'm0_main' at src/dram.c:71:2: include/rk3399_mcu.h:14:40: warning: array subscript 0 is outside array bounds of 'volatile unsigned int[0]' [-Warray-bounds=] 14 | #define mmio_read_32(c) ({unsigned int __v = \ | ^~~ include/rk3399_mcu.h:16:69: note: in definition of macro 'mmio_write_32' 16 | #define mmio_write_32(c, v) ((*(volatile unsigned int *)(c)) = (v)) | ^ src/dram.c:47:23: note: in expansion of macro 'mmio_read_32' 47 | mmio_read_32(PARAM_ADDR + PARAM_DPLL_CON0)); | ^~~~~~~~~~~~ In function 'm0_main': cc1: note: source object is likely at address zero In function 'ddr_set_pll', inlined from 'm0_main' at src/dram.c:71:2: include/rk3399_mcu.h:14:40: warning: array subscript 0 is outside array bounds of 'volatile unsigned int[0]' [-Warray-bounds=] 14 | #define mmio_read_32(c) ({unsigned int __v = \ | ^~~ include/rk3399_mcu.h:16:69: note: in definition of macro 'mmio_write_32' 16 | #define mmio_write_32(c, v) ((*(volatile unsigned int *)(c)) = (v)) | ^ src/dram.c:49:23: note: in expansion of macro 'mmio_read_32' 49 | mmio_read_32(PARAM_ADDR + PARAM_DPLL_CON1)); | ^~~~~~~~~~~~ In function 'm0_main': cc1: note: source object is likely at address zero include/rk3399_mcu.h:16:35: warning: array subscript 0 is outside array bounds of 'volatile unsigned int[0]' [-Warray-bounds=] 16 | #define mmio_write_32(c, v) ((*(volatile unsigned int *)(c)) = (v)) | ~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ src/dram.c:80:9: note: in expansion of macro 'mmio_write_32' 80 | mmio_write_32(PARAM_ADDR + PARAM_M0_DONE, M0_DONE_FLAG); | ^~~~~~~~~~~~~ cc1: note: source object is likely at address zero """
The global Makefile defines --param=min-pagesize=0 already, so let's just apply the same fix for the m0 part of the RK3399 binary.
Suggested-by: Boyan Karatotev <boyan.karatotev@arm.com> Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Change-Id: I4f29a579b9e4b01aa2540746ef46e2a382f0012e
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| efe45dd5 | 31-Oct-2024 |
Quentin Schulz <quentin.schulz@cherry.de> |
refactor(rk3399): m0: Makefile: use same tools as in build_macros.mk
This should make it easier to spot mistakes or reuse rules by comparing this Makefile with build_macros.mk.
Additionally, this a
refactor(rk3399): m0: Makefile: use same tools as in build_macros.mk
This should make it easier to spot mistakes or reuse rules by comparing this Makefile with build_macros.mk.
Additionally, this allows to provide flags that aren't supported by CC (e.g. --no-warn-rwx-segments).
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Change-Id: Iba121d53959ff4f8bd10a14280c4d93a710dc9db
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