Merge "feat(mt8196): link prebuilt library" into integration

Merge "feat(mt8196): add Mediatek EMI stub implementation for mt8196" into integration

fix(intel): update warm reset routine and bootscratch register usage

Agilex5 platform:
Boot scratch COLD6 register is meant for Customer use only.
So, use Intel specific COLD3 register with [5:2]bit

fix(intel): update warm reset routine and bootscratch register usage

Agilex5 platform:
Boot scratch COLD6 register is meant for Customer use only.
So, use Intel specific COLD3 register with [5:2]bits to
determine the warm reset and SMP boot requests.
Also handle the unaligned DEVICE/IO memory store and load
in the assembly entrypoint startup code.

Agilex, Stratix10, N5X platforms:
Use only the LSB 4bits [3:0] of the boot scratch COLD6 register
to detect the warm reset request.

Change-Id: I4fd6e63fe0bd42ddcb4a3f81c7a7295bdc8ca65f
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@altera.com>

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fix(intel): update debug messages to appropriate class

Update debug messages to VERBOSE class wherever required.

Change-Id: I44ea6b660581285290f54a507dd1131d26be2ec8
Signed-off-by: Girisha Dengi <g

fix(intel): update debug messages to appropriate class

Update debug messages to VERBOSE class wherever required.

Change-Id: I44ea6b660581285290f54a507dd1131d26be2ec8
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@altera.com>

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feat(mt8196): link prebuilt library

If MTKLIB_PATH is provided, the build will use the library provided by
MTKLIB_PATH. Otherwise, it will use stub implementation.

Change-Id: I218e724231c8bbc6cc851

feat(mt8196): link prebuilt library

If MTKLIB_PATH is provided, the build will use the library provided by
MTKLIB_PATH. Otherwise, it will use stub implementation.

Change-Id: I218e724231c8bbc6cc851a240c6bbc4f6f49f154
Signed-off-by: Gavin Liu <gavin.liu@mediatek.corp-partner.google.com>

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refactor(tc): rename TC_FPGA_ANDROID_IMG_IN_RAM

Rename TC_FPGA_ANDROID_IMG_IN_RAM to TC_FPGA_FS_IMG_IN_RAM
to use it for debian loading to ram as well.

Change-Id: I70b68b06501d17dcebbe78bee8fec0a70

refactor(tc): rename TC_FPGA_ANDROID_IMG_IN_RAM

Rename TC_FPGA_ANDROID_IMG_IN_RAM to TC_FPGA_FS_IMG_IN_RAM
to use it for debian loading to ram as well.

Change-Id: I70b68b06501d17dcebbe78bee8fec0a701106c92
Signed-off-by: Jagdish Gediya <jagdish.gediya@arm.com>
Signed-off-by: Icen.Zeyada <Icen.Zeyada2@arm.com>

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Merge changes from topic "handoff_tpm_event_log" into integration

* changes:
feat(qemu): hand off TPM event log via TL
feat(handoff): common API for TPM event log handoff
feat(handoff): transf

Merge changes from topic "handoff_tpm_event_log" into integration

* changes:
feat(qemu): hand off TPM event log via TL
feat(handoff): common API for TPM event log handoff
feat(handoff): transfer entry ID for TPM event log
fix(qemu): fix register convention in BL31 for qemu
fix(handoff): fix register convention in opteed

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fix(qemu): fix RMM manifest checksum calculation

Commit 71c4443886ff ("fix(lib/rmm_el3_ifc): add console name to checksum
calculation") on TF-RMM updated the checksum calcualtion of the RMM
manifest

fix(qemu): fix RMM manifest checksum calculation

Commit 71c4443886ff ("fix(lib/rmm_el3_ifc): add console name to checksum
calculation") on TF-RMM updated the checksum calcualtion of the RMM
manifest to include the console names.

Include console names in the QEMU manifest to remain compatible with
RMM, just like commit aa99881d3011 ("fix(rme): add console name to
checksum calculation") did for FVP.

Checksum calculation is done by adding together 64-bit values. Add a
helper that does this.

Change-Id: Ica6cab628160593830270bef1acdeb475d1c0c36
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>

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feat(tc): configure UART for TC4 FPGA

TC4 FPGA have a UART clock of 4000000 so modify the value
of TC_UARTCLK for TC4.

Change-Id: I8de84d58bce8b7277bf356136a5185c008ab4c28
Signed-off-by: Jagdish Ge

feat(tc): configure UART for TC4 FPGA

TC4 FPGA have a UART clock of 4000000 so modify the value
of TC_UARTCLK for TC4.

Change-Id: I8de84d58bce8b7277bf356136a5185c008ab4c28
Signed-off-by: Jagdish Gediya <jagdish.gediya@arm.com>
Signed-off-by: Icen.Zeyada <Icen.Zeyada2@arm.com>

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feat(mt8196): add Mediatek EMI stub implementation for mt8196

Implement stub functions for the EMI driver to ensure that the build
can pass when a prebuilt library is not available.

Change-Id: I296

feat(mt8196): add Mediatek EMI stub implementation for mt8196

Implement stub functions for the EMI driver to ensure that the build
can pass when a prebuilt library is not available.

Change-Id: I296945a3df6766a3a133cd385a1e5038ca979403
Signed-off-by: Gavin Liu <gavin.liu@mediatek.corp-partner.google.com>

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Merge changes I1f662f82,I59a3b297 into integration

* changes:
fix(build): include platform mk earlier
fix(arm): use EL3_PAS in MAP_BL2_TOTAL definition

feat(gxl): add support for booting from U-Boot SPL/with standard params

The arguments struct needs to be changed to remove a non-standard entry
(`scp_image_info[]`) and also makes use of a built-in

feat(gxl): add support for booting from U-Boot SPL/with standard params

The arguments struct needs to be changed to remove a non-standard entry
(`scp_image_info[]`) and also makes use of a built-in arguments parser.
Since the `scp_image_info[]` entry is removed in U-Boot SPL-compatible builds,
SCP_BL2 image info is hardcoded.

Change-Id: Id3cc887c61c3b940c8a21d9da7f2b6845da51af8
Signed-off-by: Ferass El Hafidi <funderscore@postmarketos.org>

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Merge "feat(tc): print ni-tower discovery tree" into integration

fix(build): include platform mk earlier

Move platform.mk inclusion in top level Makefile to permit a platform
specifying BRANCH_PROTECTION option.

Signed-off-by: Olivier Deprez <olivier.deprez@arm.

fix(build): include platform mk earlier

Move platform.mk inclusion in top level Makefile to permit a platform
specifying BRANCH_PROTECTION option.

Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: I1f662f82cd949eedfdbb61b9f66de15c46fb3106

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fix(arm): use EL3_PAS in MAP_BL2_TOTAL definition

Similarly to BL1 and BL31, use EL3_PAS macro from xlat_tables header
(depends on ENABLE_RME) in BL2 to define MAP_BL2_TOTAL.

Signed-off-by: Olivier

fix(arm): use EL3_PAS in MAP_BL2_TOTAL definition

Similarly to BL1 and BL31, use EL3_PAS macro from xlat_tables header
(depends on ENABLE_RME) in BL2 to define MAP_BL2_TOTAL.

Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: I59a3b297efd2eacd082a297de6b579b7c9052883

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feat(qemu): hand off TPM event log via TL

If TRANSFER_LIST is enabled, hand off TPM event log via TL instead
of DT; otherwise fallback to legacy way if TRANSFER_LIST is off or
errors observed.

More

feat(qemu): hand off TPM event log via TL

If TRANSFER_LIST is enabled, hand off TPM event log via TL instead
of DT; otherwise fallback to legacy way if TRANSFER_LIST is off or
errors observed.

Moreover, for updating the TL from secure to non-secure
memory before existing EL3, replace memcpy with function
transfer_list_relocate() for more accuracy.

Change-Id: I1d6bcf573f91efe99380bc89195198a8583b1def
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>

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feat(tc): print ni-tower discovery tree

print ni-tower discovery tree to understand ni-tower hierarchy which
might be useful during debugging.

Change-Id: Ib49fef9c63f7740e04b4d8371c1083bd040f6e09
S

feat(tc): print ni-tower discovery tree

print ni-tower discovery tree to understand ni-tower hierarchy which
might be useful during debugging.

Change-Id: Ib49fef9c63f7740e04b4d8371c1083bd040f6e09
Signed-off-by: Jagdish Gediya <jagdish.gediya@arm.com>
Signed-off-by: Icen.Zeyada <Icen.Zeyada2@arm.com>

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fix(tc): set console baurate to 38400 for fvp as well

Set console baurate to 38400 for fvp as well for code
simplicity.

Change-Id: I58ba6b7043541f6eb67e32257307da4eba0bb28a
Signed-off-by: Jagdish G

fix(tc): set console baurate to 38400 for fvp as well

Set console baurate to 38400 for fvp as well for code
simplicity.

Change-Id: I58ba6b7043541f6eb67e32257307da4eba0bb28a
Signed-off-by: Jagdish Gediya <jagdish.gediya@arm.com>
Signed-off-by: Icen.Zeyada <Icen.Zeyada2@arm.com>

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refactor(tc): remove redundant macro UARTCLK_FREQ

remove redundant macro UARTCLK_FREQ and replace it with TC_UARTCLK
in dts.

Change-Id: Id463a9ddc1588278e552ffca3dfb738676229ce7
Signed-off-by: Jagd

refactor(tc): remove redundant macro UARTCLK_FREQ

remove redundant macro UARTCLK_FREQ and replace it with TC_UARTCLK
in dts.

Change-Id: Id463a9ddc1588278e552ffca3dfb738676229ce7
Signed-off-by: Jagdish Gediya <jagdish.gediya@arm.com>
Signed-off-by: Icen.Zeyada <Icen.Zeyada2@arm.com>

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feat(handoff): common API for TPM event log handoff

Create a common BL2 API to add a TE for TPM event log.

Change-Id: I459e70f40069aa9ea0625977e0bad8ec316439e6
Signed-off-by: Raymond Mao <raymond.m

feat(handoff): common API for TPM event log handoff

Create a common BL2 API to add a TE for TPM event log.

Change-Id: I459e70f40069aa9ea0625977e0bad8ec316439e6
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>

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fix(qemu): fix register convention in BL31 for qemu

The commit with Change-Id:Ie417e054a7a4c192024a2679419e99efeded1705
updated the register convention r1/x1 values but missing necessary
changes in

fix(qemu): fix register convention in BL31 for qemu

The commit with Change-Id:Ie417e054a7a4c192024a2679419e99efeded1705
updated the register convention r1/x1 values but missing necessary
changes in BL31.
As a result, a system panic observed during setup for BL32 when
TRANSFER_LIST is enabled due to unexpected arguments.
This patch is to fix this issue for qemu.

Change-Id: I42e581c5026f0f66d3b114204b4dff167a9bc6ae
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>

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feat(synquacer): add support Hob creation

When StandaloneMm used with SPM_MM, TF-A should create
PHIT Hob to boot it.
This patch supports Hob creation for StandaloneMm in synquacer platform.

Signed

feat(synquacer): add support Hob creation

When StandaloneMm used with SPM_MM, TF-A should create
PHIT Hob to boot it.
This patch supports Hob creation for StandaloneMm in synquacer platform.

Signed-off-by: Levi Yun <yeoreum.yun@arm.com>
Change-Id: Ifa3ae1f0aa37f389aabb14f48be307502ae6fc2c

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fix(fvp): exclude extend memory map TZC regions

The commit
192287523350 ("fix(spm-mm): carve out NS buffer TZC400 region")
removes overlaps of ns shared buffer in secure memory region.
Unfortunate

fix(fvp): exclude extend memory map TZC regions

The commit
192287523350 ("fix(spm-mm): carve out NS buffer TZC400 region")
removes overlaps of ns shared buffer in secure memory region.
Unfortunately, this separation increases 1 region and over maximum
number of TZC programmable regions when they include
extended memory map regions (DRAM3 to DRAM6).

This causes boot failure of StandaloneMm with spmc_el3 && sp_el0 with

ASSERT: drivers/arm/tzc/tzc400.c:256.

To fix this, like SPM_MM, exclude setting extended memory map regions when
it uses SPMC_AT_EL3 && SPC_AT_EL3_SEL0_SP.

Signed-off-by: Levi Yun <yeoreum.yun@arm.com>
Change-Id: I2d40bea066ca030050dfe951218cd17171010676

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feat(fvp): add StandaloneMm manifest in fvp

Support StandaloneMm running with FF-A as S-EL0 SP
when TF-A is built with EL3 SPMC partition manager.

For this
1. add manifest file describing Stand

feat(fvp): add StandaloneMm manifest in fvp

Support StandaloneMm running with FF-A as S-EL0 SP
when TF-A is built with EL3 SPMC partition manager.

For this
1. add manifest file describing StandaloneMm partition.
2. add number of page mapping area.
3. StandaloneMm should use SRAM with 512K.

while enabling, StandaloneMm, BL1 image requires more size:
aarch64-none-elf/bin/ld: BL31 image has exceeded its limit.
aarch64-none-elf/bin/ld: region `RAM' overflowed by 16384 bytes

So, when using SRAM size with 512K configuration,
increase size limit of BL1 binary.

Signed-off-by: Levi Yun <yeoreum.yun@arm.com>
Change-Id: Idaa1db510340ebb812cfd13588610b2eea941918

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fix(morello): remove stray white-space in 'morello/platform.mk'

Stray white-space in 'morello/platform.mk' to fix the
following compilation error:

$ make PLAT=morello TARGET_PLATFORM=2 all
plat/a

fix(morello): remove stray white-space in 'morello/platform.mk'

Stray white-space in 'morello/platform.mk' to fix the
following compilation error:

$ make PLAT=morello TARGET_PLATFORM=2 all
plat/arm/board/morello/platform.mk:9: *** recipe commences
before first target. Stop.

Fix the same.

While at it also update the year range in the
'Copyright' field.

Change-Id: Id05e4968952049df5ffbe0d25dd17f3aa3a035f7
Signed-off-by: Bhupesh Sharma <Bhupesh.Sharma@arm.com>

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