Merge changes from topic "Id18b0341353ffc00e44e2d3c643ccdd05cc20c4f" into integration

* changes:
fix(rk3399): fix unquoted .incbin for clang
fix(rk3399): mark INCBIN-generated sections as SHF_AL

Merge changes from topic "Id18b0341353ffc00e44e2d3c643ccdd05cc20c4f" into integration

* changes:
fix(rk3399): fix unquoted .incbin for clang
fix(rk3399): mark INCBIN-generated sections as SHF_ALLOC

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Merge "fix(rdv3): add console name to checksum calculation on RD-V3" into integration

feat(qemu): add hob support for qemu platforms

This change introduces the hob support for both qemu platforms (virt and
sbsa).

As the hob list feature relies on transfer list, the transfer list
sup

feat(qemu): add hob support for qemu platforms

This change introduces the hob support for both qemu platforms (virt and
sbsa).

As the hob list feature relies on transfer list, the transfer list
support is promoted to common qemu build configuration. The platforms
specific definitions are updated accordingly.

Change-Id: I473d83388fe95408d34515bf7bcbdd64ce4e777d
Signed-off-by: Kun Qin <kuqin@microsoft.com>

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fix(zynqmp): fix length of clock name

The CLK_NAME_LEN variable is set to 15 but with more
hardening we get the following error for the
pss_alt_ref_clk name so bump the length slightly
to take all t

fix(zynqmp): fix length of clock name

The CLK_NAME_LEN variable is set to 15 but with more
hardening we get the following error for the
pss_alt_ref_clk name so bump the length slightly
to take all the requirements into account.

plat/xilinx/zynqmp/pm_service/pm_api_clock.c:2248:25: error: initializer-string for array of ‘char’ is too long [-Werror=unterminated-string-initialization]
2248 | .name = "pss_alt_ref_clk",
| ^~~~~~~~~~~~~~~~~
cc1: all warnings being treated as errors

Fixes: caae497df ("zynqmp: pm: Add clock control EEMI API and ioctl functions")
Change-Id: I399271dd257c6e40a2d319c47f2588a958a5491b
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>

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Merge "fix(versal-net): remove_redundant_lock_defs" into integration

feat(mt8196): turn on APU smpu protection

1. Turn on APU SMPU protection on MT8196.
2. Remove unused header file.

Change-Id: I58637b8dda4bf68253bc2329580963a8bd9cca8b
Signed-off-by: Karl Li <karl.l

feat(mt8196): turn on APU smpu protection

1. Turn on APU SMPU protection on MT8196.
2. Remove unused header file.

Change-Id: I58637b8dda4bf68253bc2329580963a8bd9cca8b
Signed-off-by: Karl Li <karl.li@mediatek.com>

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feat(mt8196): enable APU spmi operation

Enable APU spmi operation after spmi module ready

Change-Id: I4bb1a50a635e8798b049295dbbf98967daff5997
Signed-off-by: Karl Li <karl.li@mediatek.com>

feat(mt8196): add Mediatek MMinfra stub implementation

Implement stub functions for the MMinfra (Multimedia Infrastructure)
driver to ensure that the build can pass when a prebuilt library is
not av

feat(mt8196): add Mediatek MMinfra stub implementation

Implement stub functions for the MMinfra (Multimedia Infrastructure)
driver to ensure that the build can pass when a prebuilt library is
not available.

Change-Id: Iadac654950c868d3743b13a1d6f7ab5d1015fb86
Signed-off-by: Yong Wu <yong.wu@mediatek.com>

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feat(mt8196): enable cirq for MediaTek MT8196

- Add CIRQ related information.

Signed-off-by: ot_chhao.chang <ot_chhao.chang@mediatek.com>
Change-Id: I758e933f9d53f7bfb16e3d7feb1c7f53516b1da6

Merge "feat(mediatek): add gic driver" into integration

Merge "refactor(mediatek): refactor the data type of the return value" into integration

Merge "fix(tc): fix compilation error" into integration

Merge "fix(xilinx): remove unused write_icc_asgi1r_el1()" into integration

fix(xilinx): remove unused write_icc_asgi1r_el1()

The commit 427e46ddea1e ("fix(xilinx): fix sending sgi to linux")
removed code which called write_icc_asgi1r_el1() but function itself
wasn't remove

fix(xilinx): remove unused write_icc_asgi1r_el1()

The commit 427e46ddea1e ("fix(xilinx): fix sending sgi to linux")
removed code which called write_icc_asgi1r_el1() but function itself
wasn't removed.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Change-Id: I95a1424b0546f3f4a5e4611de34441b96e70b7d3

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fix(tc): fix compilation error

When the SPD_spmd configuration is disabled, the compiler complaints:

plat/arm/board/tc/tc_bl2_dpe.c:234:22: error: unused variable 'array_size' [-Werror=unused-varia

fix(tc): fix compilation error

When the SPD_spmd configuration is disabled, the compiler complaints:

plat/arm/board/tc/tc_bl2_dpe.c:234:22: error: unused variable 'array_size' [-Werror=unused-variable]
234 | const size_t array_size = ARRAY_SIZE(tc_dpe_metadata);
| ^~~~~~~~~~
plat/arm/board/tc/tc_bl2_dpe.c:233:16: error: unused variable 'i' [-Werror=unused-variable]
233 | size_t i;
| ^
cc1: all warnings being treated as errors

Move variable declarations into the code chunk protected by the SPD_spmd
configuration.

Change-Id: I1a3889938e2d4ec5efec516e9ef54034f9d711b2
Signed-off-by: Leo Yan <leo.yan@arm.com>

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Merge changes I3f63d597,I40fc21f5 into integration

* changes:
feat(mt8196): add mtcmos driver
feat(mt8196): add DCM driver

Merge changes I1126311e,I6ae5b5b4,I1b907256,I9facb6bf,Ie51cffeb, ... into integration

* changes:
feat(mt8196): add vcore dvfs drivers
feat(mt8196): add LPM v2 support
feat(mt8196): add SPM com

Merge changes I1126311e,I6ae5b5b4,I1b907256,I9facb6bf,Ie51cffeb, ... into integration

* changes:
feat(mt8196): add vcore dvfs drivers
feat(mt8196): add LPM v2 support
feat(mt8196): add SPM common version support
feat(mt8196): add SPM common driver support
feat(mt8196): add SPM basic features support
feat(mt8196): add SPM features support
feat(mt8196): enable PMIC low power setting
feat(mt8196): add mcdi driver
feat(mt8196): add pwr_ctrl module for CPU power management
feat(mt8196): add mcusys moudles for power management
feat(mt8196): add CPC module for power management
feat(mt8196): add topology module for power management
feat(mt8196): add SPMI driver
feat(mt8196): add PMIC driver

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feat(mt8196): add mtcmos driver

add mtcmos driver for ufs power control

Signed-off-by: Guangjie Song <guangjie.song@mediatek.com>
Change-Id: I3f63d5976906aaca91a71a147497e9345339774d

feat(mt8196): add DCM driver

DCM means dynamic clock management, and it can dynamically slow down
or gate clocks during CPU or bus idle.

Add MCUSYS or bus related DCM drivers.
Enable MCUSYS or bus

feat(mt8196): add DCM driver

DCM means dynamic clock management, and it can dynamically slow down
or gate clocks during CPU or bus idle.

Add MCUSYS or bus related DCM drivers.
Enable MCUSYS or bus related DCM by default.

Signed-off-by: Guangjie Song <guangjie.song@mediatek.com>
Change-Id: I40fc21f5808962ca46870a2f3b9963dc8088f877

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Merge "fix(rdv3): fix comment for DRAM1 carveout size" into integration

Merge changes from topic "upstream_sp_num" into integration

* changes:
fix(tc): enable certificate on the last secure partition
feat(sptool): populate secure partition number in makefile

fix(tc): enable certificate on the last secure partition

Distros (e.g. Buildroot and Android) can have different secure partition
layout.

This commit iterates the DPE metadata table and finds index

fix(tc): enable certificate on the last secure partition

Distros (e.g. Buildroot and Android) can have different secure partition
layout.

This commit iterates the DPE metadata table and finds index (i) for the
first entry of the secure partition, connecting with the defined secure
partition number NUM_SP, so the last secure partition index is:

i + NUM_SP - 1

Instead of setting the certificate in hard code, dynamically enables the
certificate for the last secure partition base on calculated index.

Signed-off-by: Ben Horgan <ben.horgan@arm.com>
Signed-off-by: Leo Yan <leo.yan@arm.com>
Change-Id: Idd11b4f463bf5ccc8d82cd06bd21deeebbda67d9

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fix(stm32mp2): correct early/crash console init

The previous code used 64-bit registers as the target and source for
load and store operations on 32-bit hardware registers. In certain
cases (e.g., w

fix(stm32mp2): correct early/crash console init

The previous code used 64-bit registers as the target and source for
load and store operations on 32-bit hardware registers. In certain
cases (e.g., when using USART1 as the debug console), this could result
in deadlocks where the A35 gets stuck in a permanent loop due to test
conditions that are never fulfilled.

To resolve this issue, 32-bit registers are now used for these
operations.

Change-Id: Id2c03a1df26738fe815079da042cc2dd989f4f8e
Signed-off-by: Boerge Struempfel <boerge.struempfel@gmail.com>

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fix(rdv3): fix comment for DRAM1 carveout size

Corrected the comment for the size of NRD_CSS_DRAM1_CARVEOUT_SIZE
(0x0C000000) from 117MB to 192MB

Signed-off-by: Rakshit Goyal <rakshit.goyal@arm.com

fix(rdv3): fix comment for DRAM1 carveout size

Corrected the comment for the size of NRD_CSS_DRAM1_CARVEOUT_SIZE
(0x0C000000) from 117MB to 192MB

Signed-off-by: Rakshit Goyal <rakshit.goyal@arm.com>
Change-Id: I289d37f50e70b936f717d4579d73882fac28ee95

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Merge changes Ided750de,Id3cc887c into integration

* changes:
docs(gxl): add build instructions for booting BL31 from U-Boot SPL
feat(gxl): add support for booting from U-Boot SPL/with standard

Merge changes Ided750de,Id3cc887c into integration

* changes:
docs(gxl): add build instructions for booting BL31 from U-Boot SPL
feat(gxl): add support for booting from U-Boot SPL/with standard params

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