feat(zynqmp): make stack size configurable

If PLATFORM_STACK_SIZE not already defined, use the default value of
PLATFORM_STACK_SIZE.
This makes the stack size value configurable for different interf

feat(zynqmp): make stack size configurable

If PLATFORM_STACK_SIZE not already defined, use the default value of
PLATFORM_STACK_SIZE.
This makes the stack size value configurable for different interface
like custom packages.

Signed-off-by: Amit Nagal <amit.nagal@amd.com>
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>
Change-Id: I87e9fcbfb4c4092378b1ac0ff8fb6d084495d320

show more ...

feat(zynqmp): add hooks for custom runtime setup

Add runtime setup hooks (via custom_runtime_setup()) for low level
operations related to setting up the system to correct state.

Change-Id: I4af7050

feat(zynqmp): add hooks for custom runtime setup

Add runtime setup hooks (via custom_runtime_setup()) for low level
operations related to setting up the system to correct state.

Change-Id: I4af7050dba2ee2446366d482bef5f5c5dde4bddf
Signed-off-by: Amit Nagal <amit.nagal@amd.com>
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>

show more ...

refactor(xilinx): move enum to common place

Moved IOCTL enum from ZynqMP to common place so that it can be used
for all the platforms.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Cha

refactor(xilinx): move enum to common place

Moved IOCTL enum from ZynqMP to common place so that it can be used
for all the platforms.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I6ad992da30f2def9f46c8ba79753d79ed00fe024

show more ...

refactor(xilinx): move pm_defs.h to common place

Moved pm_defs.h file to common place so that it can be used for
Versal NET and ZynqMP. Also moved common code from zynqmp_pm_defs.h to
common place.

refactor(xilinx): move pm_defs.h to common place

Moved pm_defs.h file to common place so that it can be used for
Versal NET and ZynqMP. Also moved common code from zynqmp_pm_defs.h to
common place.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I2ee1e72258c6052cdd6467cdbcf4009afb98da49

show more ...

refactor(xilinx): move versal files to common place

Moved necessary files to common place so that it can be used for
Versal NET.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id

refactor(xilinx): move versal files to common place

Moved necessary files to common place so that it can be used for
Versal NET.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I611fa849207b082e6599acfb65c55d27b9c99435

show more ...

feat(zynqmp): build pm code as library

Build Platform Management(PM) code as an Library.
Building PM code as library provides an option to switch to different
firmware interfaces like custom package

feat(zynqmp): build pm code as library

Build Platform Management(PM) code as an Library.
Building PM code as library provides an option to switch to different
firmware interfaces like custom packages.

Change-Id: I872d45edf55ac83a6efb86591d12a0fef7b598cb
Signed-off-by: Amit Nagal <amit.nagal@amd.com>
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>

show more ...

chore(zynqmp): print entry address to Secure and NS world

The base address for BL32 and BL33 is read from the FSBL to TF-A
handoff params.
Print the base address for BL32 and BL33 as entry to the se

chore(zynqmp): print entry address to Secure and NS world

The base address for BL32 and BL33 is read from the FSBL to TF-A
handoff params.
Print the base address for BL32 and BL33 as entry to the secure and
non-secure world respectively in the release build.

Change-Id: Icc976fccb56b565f78001d87b02180ced6437a43
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>

show more ...

fix(xilinx): handle CRC failure in IPI callback

Currently, if CRC validation fails during IPI communication,
pm_ipi_buff_read_callb() logs error message but don't return
error code to upper layers.

fix(xilinx): handle CRC failure in IPI callback

Currently, if CRC validation fails during IPI communication,
pm_ipi_buff_read_callb() logs error message but don't return
error code to upper layers.

Added CRC failure specific error code which will be returned by
pm_ipi_buff_read_callb() if CRC validation fails.

Signed-off-by: Naman Trivedi Manojbhai <naman.trivedimanojbhai@amd.com>
Change-Id: I2eaca073e2bf325a8c86b1820bdd7cca487b783e

show more ...

fix(xilinx): handle CRC failure in IPI

Currently, if CRC validation fails during IPI communication,
pm_ipi_buff_read() logs error message but don't return error
code to upper layers.

Added CRC fail

fix(xilinx): handle CRC failure in IPI

Currently, if CRC validation fails during IPI communication,
pm_ipi_buff_read() logs error message but don't return error
code to upper layers.

Added CRC failure specific error code which will be returned by
pm_ipi_buff_read() if CRC validation fails.

Signed-off-by: Naman Trivedi Manojbhai <naman.trivedimanojbhai@amd.com>
Change-Id: I33be330f276973471f4ce4115d1e1609ed8fb754

show more ...

fix(zynqmp): conditional reservation of memory in DTB

When the TF-A is placed in DDR memory range, the DDR memory range is
getting explicitly reserved in the default device tree by TF-A.
This create

fix(zynqmp): conditional reservation of memory in DTB

When the TF-A is placed in DDR memory range, the DDR memory range is
getting explicitly reserved in the default device tree by TF-A.
This creates an error condition in the use case where Device tree is
not present or it is present at a different location.

To fix this, a new build time parameter, XILINX_OF_BOARD_DTB_ADDR, is
introduced. The TF-A will reserve the DDR memory only when a valid
DTB address is provided to XILINX_OF_BOARD_DTB_ADDR during build.

Now the user has options, either manually reserve the desired
DDR address range for TF-A in device tree or let TF-A access and modify
the device tree, to reserve the DDR address range, in runtime using
the build parameter.

Change-Id: I846fa373ba9f7c984eda3a55ccaaa622082cad81
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>

show more ...

revert(zynqmp): remove EM SMC handler

EM support was out of SMC SIP range that's why has been moved to SIP
range 0x3000 by commit acbae3998bd8 ("fix(zynqmp): move EM SMC range
to SIP range").
But af

revert(zynqmp): remove EM SMC handler

EM support was out of SMC SIP range that's why has been moved to SIP
range 0x3000 by commit acbae3998bd8 ("fix(zynqmp): move EM SMC range
to SIP range").
But after another investigation was found that this interface has no
user in any our SW and likely never adopted by anybody else. That's
why simply remove it. If there is any user it can be added back but
as TF-A size is challenging removing unused code is very welcome.
Origin code was added by commit 504925f99da0 ("xilinx: zynqmp: Add
support for Error Management").

Change-Id: I2d9222d7dde507400893e06f7f12e1713ce6bc9a
Signed-off-by: Michal Simek <michal.simek@amd.com>

show more ...

feat(zynqmp): add hooks for mmap and early setup

Add early setup hooks (via custom_early_setup()) and provide a way
to cover custom memory mapping which includes extending memory map
via custom_mmap

feat(zynqmp): add hooks for mmap and early setup

Add early setup hooks (via custom_early_setup()) and provide a way
to cover custom memory mapping which includes extending memory map
via custom_mmap_add().

This likely also require to align MAX_XLAT_TABLE, MAX_XLAT_TABLES
macros. It can be done for example by defining these macros in
custom_pkg.mk
MAX_MMAP_REGIONS := XY
$(eval $(call add_define,MAX_MMAP_REGIONS))
MAX_XLAT_TABLES := XZ
$(eval $(call add_define,MAX_XLAT_TABLES))

custom_early_setup() can be used for early low level operations
related to setting up the system to correct state.

Signed-off-by: Amit Nagal <amit.nagal@amd.com>
Change-Id: I61df6f9ba5af0bc97c430974fb10a2edde44f23d

show more ...

fix(zynqmp): add bitmask for get_op_char API

As per the current functionality, there are a couple of types like
PM_OPCHAR_TYPE_TEMP, PM_OPCHAR_TYPE_POWER and PM_OPCHAR_TYPE_LATENCY
for the PM_GET_OP

fix(zynqmp): add bitmask for get_op_char API

As per the current functionality, there are a couple of types like
PM_OPCHAR_TYPE_TEMP, PM_OPCHAR_TYPE_POWER and PM_OPCHAR_TYPE_LATENCY
for the PM_GET_OP_CHARACTERISTIC EEMI API which is mismatched across
the Versal and ZynqMP platforms.

So added the bitmask functionality for PM_GET_OP_CHARACTERISTIC API
in feature check in the firmware and as part of that the firmware fill
up payload[1] with the bitmask value of supported types of the
PM_GET_OP_CHARACTERISTIC EEMI API but from TF-A based on the current
codebase it is just returning the version. So filling up the bitmask
buffer which is received from the firmware and returned the same to
the user.

Signed-off-by: Ronak Jain <ronak.jain@amd.com>
Change-Id: I2c55f3e902a5f89eed899e99a97ad9b3f0a12796

show more ...

Merge "fix(zynqmp): panic w/o handoff structure in !JTAG" into integration

fix(zynqmp): panic w/o handoff structure in !JTAG

In case that FSBL (or SPL) doesn't provide valid handoff structure don't
fallback to default image location. In non JTAG boot mode all the time
stru

fix(zynqmp): panic w/o handoff structure in !JTAG

In case that FSBL (or SPL) doesn't provide valid handoff structure don't
fallback to default image location. In non JTAG boot mode all the time
structure should be passed. If it is not it can be opportunity to inject
any code to default locations and start it. That's why panic in all
these cases.

Change-Id: Ib3e11e2ae9ffec7406002cce4997b12b97bdc396
Signed-off-by: Michal Simek <michal.simek@amd.com>

show more ...

fix(zynqmp): move EM SMC range to SIP range

EM SMC where out of SIP range which is 15:0 bits only. EM was used 19:17
bits which is wrong but no code was checking it. That's why vove EM SMC
to SIP ra

fix(zynqmp): move EM SMC range to SIP range

EM SMC where out of SIP range which is 15:0 bits only. EM was used 19:17
bits which is wrong but no code was checking it. That's why vove EM SMC
to SIP range.

Change-Id: I83f998a17a8b82b2c25ea8c9b247e42642c82178
Signed-off-by: Michal Simek <michal.simek@amd.com>

show more ...

Merge changes from topic "zynqmp-smc" into integration

* changes:
fix(zynqmp): check smc_fid 23:16 bits
fix(zynqmp): separate EM from PM SMCs

Merge "feat(zynqmp): add support for custom sip service" into integration

Merge "fix(zynqmp): update the conflicting EEMI API IDs" into integration

Merge changes from topic "xlnx_zynqmp_debug" into integration

* changes:
fix(zynqmp): with DEBUG=1 move bl31 to DDR range
fix(zynqmp): update MAX_XLAT_TABLES for DDR memory range

Merge changes from topic "versal-ipi" into integration

* changes:
fix(versal): fix incorrect regbase for PMC IPI
fix(versal): sync location based on IPI_ID macros
fix(xilinx): remove unused ma

Merge changes from topic "versal-ipi" into integration

* changes:
fix(versal): fix incorrect regbase for PMC IPI
fix(versal): sync location based on IPI_ID macros
fix(xilinx): remove unused mailbox macros

show more ...

feat(zynqmp): add support for custom sip service

Add support for custom sip service.
Bare minimum implementation for custom_smc_handler is provided
by platform. Actual definition for custom_smc_hand

feat(zynqmp): add support for custom sip service

Add support for custom sip service.
Bare minimum implementation for custom_smc_handler is provided
by platform. Actual definition for custom_smc_handler will be provided
by custom pkg.

This feature is going to be used by external libraries. For example
for checking it's status.

The similar approach is also used by qti/{sc7180,sc7280} platforms
by providing a way to select QTISECLIB_PATH.

This code is providing a generic way how to wire any code
via custom $(CUSTOM_PKG_PATH)/custom_pkg.mk makefile with also an
option to wire custom SMC. SMC functionality depends on "package".

Change-Id: Icedffd582f76f89fc399b0bb2e05cdaee9b743a0
Signed-off-by: Amit Nagal <amit.nagal@amd.com>

show more ...

fix(zynqmp): check smc_fid 23:16 bits

23:16 bits when they gets to SMC handler should be all zeros but be
inside SIP Service Calls range which is defined as 0x82000000-0x8200ffff
or 0xc2000000-0xc20

fix(zynqmp): check smc_fid 23:16 bits

23:16 bits when they gets to SMC handler should be all zeros but be
inside SIP Service Calls range which is defined as 0x82000000-0x8200ffff
or 0xc2000000-0xc200ffff. That's why make sure that code won't handle
any SMCs in SIP range out of predefined range. Because EM SMC is out of
this range already on this SOC check it after it (EMC SMC will be
handled separately).
Also fix MASK values to check the same range for PM/IPI/EM calls to make
sure that masking covers all required bits including 23:16. Bits 15:12
are used for different class of requests.

Change-Id: If23ac769c91d206e47758aeaa1f14e8b9c3dc7bb
Signed-off-by: Michal Simek <michal.simek@amd.com>

show more ...

fix(zynqmp): separate EM from PM SMCs

There is no reason to use else and concatenate EM SMCs with PM SMCs via
if/else pair. Also synchronize comment location.

Change-Id: I147f9d193574c2417c9d92d41a

fix(zynqmp): separate EM from PM SMCs

There is no reason to use else and concatenate EM SMCs with PM SMCs via
if/else pair. Also synchronize comment location.

Change-Id: I147f9d193574c2417c9d92d41a675e35ba282c9f
Signed-off-by: Michal Simek <michal.simek@amd.com>

show more ...

fix(zynqmp): fix bl31_zynqmp_setup.c coding style

Fix trivial coding style violations.

Change-Id: I6bbabd58da641a3b823a3b43adc7921b923ecdcb
Signed-off-by: Michal Simek <michal.simek@amd.com>