fix(xilinx): avoid unexpected variable update

The commit 50ab13577fd5 ("fix(xilinx): typecast expression to match
data type") introduced a change where the isenabler1 variable is
modified within the

fix(xilinx): avoid unexpected variable update

The commit 50ab13577fd5 ("fix(xilinx): typecast expression to match
data type") introduced a change where the isenabler1 variable is
modified within the loop iterating over GICD_ISENABLER registers.
Instead of computing the offset from the base address for each
register, the offset is accumulated incorrectly, leading to an
incorrect register read.

As a result, some GIC enablers, including the RTC device were missed,
so pm_set_wakeup_source was not called for them and the
suspend-resume use case was failed because of that.

Fix the logic to ensure the correct offset calculation for each
iteration, preserving the intended behavior.

Fixes: 50ab13577fd5 fix(xilinx): typecast expression to match data type
Change-Id: Iec5bafcbde21078545a37259b2cf0353585ef1fa
Signed-off-by: Madhav Bhatt <madhav.bhatt@amd.com>
Signed-off-by: Ronak Jain <ronak.jain@amd.com>

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fix(xilinx): remove unused write_icc_asgi1r_el1()

The commit 427e46ddea1e ("fix(xilinx): fix sending sgi to linux")
removed code which called write_icc_asgi1r_el1() but function itself
wasn't remove

fix(xilinx): remove unused write_icc_asgi1r_el1()

The commit 427e46ddea1e ("fix(xilinx): fix sending sgi to linux")
removed code which called write_icc_asgi1r_el1() but function itself
wasn't removed.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Change-Id: I95a1424b0546f3f4a5e4611de34441b96e70b7d3

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Merge changes from topic "xlnx_fix_plat_single_ret" into integration

* changes:
fix(versal2): modify function to have single return
fix(versal-net): modify function to have single return
fix(v

Merge changes from topic "xlnx_fix_plat_single_ret" into integration

* changes:
fix(versal2): modify function to have single return
fix(versal-net): modify function to have single return
fix(versal): modify function to have single return
fix(xilinx): modify function to have single return
fix(zynqmp): modify function to have single return
fix(versal-net): add unsigned suffix to match data type
fix(versal): add unsigned suffix to match data type
fix(versal2): add missing curly braces
fix(versal-net): add missing curly braces
fix(zynqmp): add missing curly braces

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fix(xilinx): modify function to have single return

This corrects the MISRA violation C2012-15.5:
A function should have a single point of exit at the end.
Introduced a temporary variable to store th

fix(xilinx): modify function to have single return

This corrects the MISRA violation C2012-15.5:
A function should have a single point of exit at the end.
Introduced a temporary variable to store the return value to
ensure single return for the function.

Change-Id: Ice3eb939664ffc62c1f586b641e37481f10ffff6
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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perf(psci): pass my_core_pos around instead of calling it repeatedly

On some platforms plat_my_core_pos is a nontrivial function that takes a
bit of time and the compiler really doesn't like to inli

perf(psci): pass my_core_pos around instead of calling it repeatedly

On some platforms plat_my_core_pos is a nontrivial function that takes a
bit of time and the compiler really doesn't like to inline. In the PSCI
library, at least, we have no need to keep repeatedly calling it and we
can instead pass it around as an argument. This saves on a lot of
redundant calls, speeding the library up a bit.

Change-Id: I137f69bea80d7cac90d7a20ffe98e1ba8d77246f
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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fix(xilinx): typecast operands to match data type

This corrects the MISRA violation C2012-10.3:
The value of an expression shall not be assigned to an object with a
narrower essential type or of a d

fix(xilinx): typecast operands to match data type

This corrects the MISRA violation C2012-10.3:
The value of an expression shall not be assigned to an object with a
narrower essential type or of a different essential type category.
The condition is explicitly checked against 0U, appending 'U' and
typecasting for unsigned comparison.

Change-Id: I1606422aadfd64b283fd9948b6dadcddecdf61e0
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(xilinx): typecast expressions to match data type

This corrects the MISRA violation C2012-10.4:
Both operands of an operator in which the usual arithmetic conversions
are performed shall have the

fix(xilinx): typecast expressions to match data type

This corrects the MISRA violation C2012-10.4:
Both operands of an operator in which the usual arithmetic conversions
are performed shall have the same essential type category.
The condition is explicitly checked against 0U, appending 'U' and
typecasting for unsigned comparison.

Change-Id: I9110ea86f5ee49af0b21be78fd0890742ef95ddf
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(xilinx): typecast expression to match data type

This corrects the MISRA violation C2012-10.6:
The value of a composite expression shall not be assigned to an
object with wider essential type.
Ex

fix(xilinx): typecast expression to match data type

This corrects the MISRA violation C2012-10.6:
The value of a composite expression shall not be assigned to an
object with wider essential type.
Explicitly type casted to match the data type of composite
expression.

Change-Id: I0fd845496b4d6ac702027eb2075a23b15849f7d6
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(xilinx): avoid altering function parameters

This corrects the MISRA violation C2012-17.8:
A function parameter should not be modified.
Local variable is declared and used to process the value
fr

fix(xilinx): avoid altering function parameters

This corrects the MISRA violation C2012-17.8:
A function parameter should not be modified.
Local variable is declared and used to process the value
from the argument.

Change-Id: I96b4381c3e05f7065d824592e7b5e5929f6b3627
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(xilinx): explicitly check operators precedence

This corrects the MISRA violation C2012-12.1:
The precedence of operators within expressions should be
made explicit.
Enclosed the subexpression in

fix(xilinx): explicitly check operators precedence

This corrects the MISRA violation C2012-12.1:
The precedence of operators within expressions should be
made explicit.
Enclosed the subexpression in parentheses to maintain
the precedence.

Change-Id: I7d68bcd0daec1c5fe448ce889bb5a74dc8a5cc91
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(versal): add const qualifier

This correct the MISRA violation C2012-8.13:
A pointer should point to a const-qualified type whenever possible.
Added const qualifier to pointer variables and funct

fix(versal): add const qualifier

This correct the MISRA violation C2012-8.13:
A pointer should point to a const-qualified type whenever possible.
Added const qualifier to pointer variables and function arguments.

Change-Id: I33cc594816809a118bff369d98d5689a96f6867f
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(xilinx): declare unused parameters as void

This corrects the MISRA violation C2012-2.7:
There should be no unused parameters in functions.
Declared unused function parameters as void.

Change-Id

fix(xilinx): declare unused parameters as void

This corrects the MISRA violation C2012-2.7:
There should be no unused parameters in functions.
Declared unused function parameters as void.

Change-Id: I1d369d977e0f2749024736d53fbb5c7d5555f6cb
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

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fix(xilinx): optimize logic to read IPI response

Optimize logic to read IPI response from firmware and avoid using
temporary buffer. Also, use pointer instead of array as per standard
format to pass

fix(xilinx): optimize logic to read IPI response

Optimize logic to read IPI response from firmware and avoid using
temporary buffer. Also, use pointer instead of array as per standard
format to pass by reference in function.

Change-Id: I45ebaeacc932a11bbfd4b7d9b9c43b4ee8ee7df2
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>

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fix(xilinx): fix OVERRUN coverity violation

This change fixes below MISRA violation:
CID 441243: Memory - corruptions (OVERRUN)
Overrunning callee's array of size 7 by passing argument "7UL" in ca

fix(xilinx): fix OVERRUN coverity violation

This change fixes below MISRA violation:
CID 441243: Memory - corruptions (OVERRUN)
Overrunning callee's array of size 7 by passing argument "7UL" in call to
"pm_ipi_send_sync".

Change-Id: Ie7fd9ccad058e97eb4b36c4f0e77be8bfb3e6006
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>

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feat(xilinx): add feature check function for TF-A specific APIs

Currently, there is common feature check function for firmware APIs
and TF-A specific APIs. This should be separate from firmware APIs

feat(xilinx): add feature check function for TF-A specific APIs

Currently, there is common feature check function for firmware APIs
and TF-A specific APIs. This should be separate from firmware APIs.
So add new TF-A API for feature check of TF-A specific APIs.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I5585d17fb6aa1e98989d935117cca10bdb85133e

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feat(xilinx): update TF-A to passthrough all PLM commands

Currently, the IDs used in PLM CMD header are mixed with SMC IDs in
TF-A which is restricting the range of IDs that can be used by PLM.
Also

feat(xilinx): update TF-A to passthrough all PLM commands

Currently, the IDs used in PLM CMD header are mixed with SMC IDs in
TF-A which is restricting the range of IDs that can be used by PLM.
Also, the SMC call from firmware driver is passing all 7 32-bit
words in request but TF-A is not passing all of them to firmware and
TF-A passes only 4 32-bit words from firmware to Linux in response.

So, update TF-A to passthrough all PLM commands by having a single
fixed SMC ID for all PLM commands and keep the PLM header in subsequent
SMC arguments. Also, enhance size of payload argument count to support
maximum payloads in request and response buffers to transmit all the
IPI command properly.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I2601caba849bce3f294177b63baa1ad688e3c5bb

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fix(xilinx): fix logic to read ipi response

Currently, PLM IPI command supports total 8 32-bit payloads. But existing
logic to read IPI response in TF-A is trying to read 9 32-bit payloads
(ret stat

fix(xilinx): fix logic to read ipi response

Currently, PLM IPI command supports total 8 32-bit payloads. But existing
logic to read IPI response in TF-A is trying to read 9 32-bit payloads
(ret status + 8 ret payloads) in case of IPI_CRC_CHECK enabled which is
incorrect.

So, fix logic to read only 8 32-bit payloads (ret status + 6 ret payloads + CRC)
in case when IPI_CRC_CHECK is enabled and read 7 32-bit payloads
(ret status + 5 ret payloads + CRC) in case when IPI_CRC_CHECK is disabled.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I0abca2f787cc7a66fdd5522e6bd15a9771029071

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fix(xilinx): handle power down event if SGI not registered

Currently, if SGI is not registered by Linux and power down event from
firmware is received then it's not getting handled in TF-A and core

fix(xilinx): handle power down event if SGI not registered

Currently, if SGI is not registered by Linux and power down event from
firmware is received then it's not getting handled in TF-A and core power
down is not happening. Because of that subsystem restart or force power
down without Linux boot is not happening. So, handle power down event in
TF-A if Linux not registered SGI.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I0c23792daba6ae47004ae99e232c77e17230bcfb

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fix(xilinx): register for idle callback

Currently, only Linux registering for getting idle callback during
subsystem restart or force power down. Because of that if Linux boot
hang or someone wants

fix(xilinx): register for idle callback

Currently, only Linux registering for getting idle callback during
subsystem restart or force power down. Because of that if Linux boot
hang or someone wants to do subsystem restart before Linux boot then
it's not working. So, register for idle callback in TF-A to get idle
callback during subsystem restart or force power down to do ARM
specific steps for proper power down of core.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: If7c01f79be6958678243be844bcfdc50d59b0fb8

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feat(xilinx): remove PM_IOCTL and PM_QUERY_DATA APIs

Today, the PM_IOCTL and PM_QUERY_DATA APIs are there to maintain
backward compatibility. Now, the usage of these APIs on the Linux
side and the f

feat(xilinx): remove PM_IOCTL and PM_QUERY_DATA APIs

Today, the PM_IOCTL and PM_QUERY_DATA APIs are there to maintain
backward compatibility. Now, the usage of these APIs on the Linux
side and the firmware side is updated. Hence remove the deprecated
PM_IOCTL and PM_QUERY_DATA EEMI API from the TF-A to make TF-A pass
through.

Note: Only use the newer kernel to access the deprecated features in
this patch. Otherwise, the system may not function correctly.

Change-Id: I23effb7ff62e7f83563c2b422ea64a0289fd880f
Signed-off-by: Ronak Jain <ronak.jain@amd.com>

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feat(xilinx): send SGI to mailbox driver

Generate SGI to mailbox driver if IPI FIQ occurs due to agents
other than PMC.

Change-Id: Ieefb9f0db4009fe0179b18d30da153ce3f9e134c
Signed-off-by: Tanmay Sh

feat(xilinx): send SGI to mailbox driver

Generate SGI to mailbox driver if IPI FIQ occurs due to agents
other than PMC.

Change-Id: Ieefb9f0db4009fe0179b18d30da153ce3f9e134c
Signed-off-by: Tanmay Shah <tanmay.shah@amd.com>

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fix(xilinx): add console_flush() before shutdown

Add console_flush() call before shutting down in order to
ensure that console output is flushed.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@a

fix(xilinx): add console_flush() before shutdown

Add console_flush() call before shutting down in order to
ensure that console output is flushed.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I5397105d2d7bf317f199b6326593bdb1c3cc75e2

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fix(xilinx): fix sending sgi to linux

Currently in Versal NET TF-A writing 32 bits in icc_asgi1r_el1 register
to raise SGI to Linux but this register is of 64 bits. Also its writing
only CPU number

fix(xilinx): fix sending sgi to linux

Currently in Versal NET TF-A writing 32 bits in icc_asgi1r_el1 register
to raise SGI to Linux but this register is of 64 bits. Also its writing
only CPU number and SGI number to this register but along with that it
needs to write cluster number and other information. Which is not happening
currently. So use generic function plat_ic_raise_ns_sgi() to raise SGI to
Linux.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I6f5146c8315a321b705ed2ef79e2dc927b805ffb

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feat(xilinx): request cpu power down from reset

Send subsystem restart notification to firmware when TF-A receives
system reset PSCI call. On receiving subsystem restart call, firmware
will send CPU

feat(xilinx): request cpu power down from reset

Send subsystem restart notification to firmware when TF-A receives
system reset PSCI call. On receiving subsystem restart call, firmware
will send CPU idle callback to TF-A for powering down all cores. Wait
for CPU idle callback from firmware and raise power down request to
all cores after it receives CPU idle callback to power down core.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I50f417ae228017f38b648740dc90b2e8f1872620

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feat(xilinx): power down all cores on receiving cpu pwrdwn req

On receiving CPU power down request from firmware, TF-A raises SGI
interrupt to all active cores for entering in power down state. So a

feat(xilinx): power down all cores on receiving cpu pwrdwn req

On receiving CPU power down request from firmware, TF-A raises SGI
interrupt to all active cores for entering in power down state. So add support
for power down core on receiving CPU power down request. PWRDWN_WAIT_TIMEOUT
is the timeout value in milliseconds for the other cores to transition to
power down state.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I29760a2098852c546fa5a1324262a62c3d75b391

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