xref: /rk3399_ARM-atf/plat/imx/imx8m/imx8mp/platform.mk (revision 924f8ce2e966d2ffdb2c0f29c72cb3a68d293b45)
1#
2# Copyright 2019-2022 NXP
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7PLAT_INCLUDES		:=	-Iplat/imx/common/include		\
8				-Iplat/imx/imx8m/include		\
9				-Iplat/imx/imx8m/imx8mp/include		\
10				-Idrivers/imx/usdhc			\
11				-Iinclude/common/tbbr
12# Translation tables library
13include lib/xlat_tables_v2/xlat_tables.mk
14
15# Include GICv3 driver files
16include drivers/arm/gic/v3/gicv3.mk
17
18IMX_DRAM_SOURCES	:=	plat/imx/imx8m/ddr/dram.c		\
19				plat/imx/imx8m/ddr/clock.c		\
20				plat/imx/imx8m/ddr/dram_retention.c	\
21				plat/imx/imx8m/ddr/ddr4_dvfs.c		\
22				plat/imx/imx8m/ddr/lpddr4_dvfs.c
23
24IMX_GIC_SOURCES		:=	${GICV3_SOURCES}			\
25				plat/common/plat_gicv3.c		\
26				plat/common/plat_psci_common.c		\
27				plat/imx/common/plat_imx8_gic.c
28
29BL31_SOURCES		+=	common/desc_image_load.c			\
30				plat/imx/common/imx8_helpers.S			\
31				plat/imx/imx8m/gpc_common.c			\
32				plat/imx/imx8m/imx_hab.c			\
33				plat/imx/imx8m/imx_aipstz.c			\
34				plat/imx/imx8m/imx_rdc.c			\
35				plat/imx/imx8m/imx8m_caam.c			\
36				plat/imx/imx8m/imx8m_ccm.c			\
37				plat/imx/imx8m/imx8m_csu.c			\
38				plat/imx/imx8m/imx8m_psci_common.c		\
39				plat/imx/imx8m/imx8m_snvs.c			\
40				plat/imx/imx8m/imx8mp/imx8mp_bl31_setup.c	\
41				plat/imx/imx8m/imx8mp/imx8mp_psci.c		\
42				plat/imx/imx8m/imx8mp/gpc.c			\
43				plat/imx/common/imx8_topology.c			\
44				plat/imx/common/imx_sip_handler.c		\
45				plat/imx/common/imx_sip_svc.c			\
46				plat/imx/common/imx_common.c			\
47				plat/imx/common/imx_uart_console.S		\
48				lib/cpus/aarch64/cortex_a53.S			\
49				drivers/arm/tzc/tzc380.c			\
50				drivers/delay_timer/delay_timer.c		\
51				drivers/delay_timer/generic_delay_timer.c	\
52				${IMX_DRAM_SOURCES}				\
53				${IMX_GIC_SOURCES}				\
54				${XLAT_TABLES_LIB_SRCS}
55
56ifeq (${NEED_BL2},yes)
57BL2_SOURCES		+=	common/desc_image_load.c			\
58				plat/imx/common/imx8_helpers.S			\
59				plat/imx/common/imx_uart_console.S		\
60				plat/imx/imx8m/imx8mp/imx8mp_bl2_el3_setup.c	\
61				plat/imx/imx8m/imx8mp/gpc.c			\
62				plat/imx/imx8m/imx_aipstz.c			\
63				plat/imx/imx8m/imx_rdc.c			\
64				plat/imx/imx8m/imx8m_caam.c			\
65				plat/common/plat_psci_common.c			\
66				lib/cpus/aarch64/cortex_a53.S			\
67				drivers/arm/tzc/tzc380.c			\
68				drivers/delay_timer/delay_timer.c		\
69				drivers/delay_timer/generic_delay_timer.c	\
70				${PLAT_GIC_SOURCES}				\
71				${PLAT_DRAM_SOURCES}				\
72				${XLAT_TABLES_LIB_SRCS}				\
73				drivers/mmc/mmc.c				\
74				drivers/io/io_block.c				\
75				drivers/io/io_fip.c				\
76				drivers/io/io_memmap.c				\
77				drivers/io/io_storage.c				\
78				drivers/imx/usdhc/imx_usdhc.c			\
79				plat/imx/imx8m/imx8mp/imx8mp_bl2_mem_params_desc.c	\
80				plat/imx/common/imx_io_storage.c		\
81				plat/imx/imx8m/imx8m_image_load.c		\
82				lib/optee/optee_utils.c
83endif
84
85# Add the build options to pack BLx images and kernel device tree
86# in the FIP if the platform requires.
87ifneq ($(BL2),)
88RESET_TO_BL31		:=	0
89$(eval $(call TOOL_ADD_PAYLOAD,${BUILD_PLAT}/tb_fw.crt,--tb-fw-cert))
90endif
91ifneq ($(BL32_EXTRA1),)
92$(eval $(call TOOL_ADD_IMG,BL32_EXTRA1,--tos-fw-extra1))
93endif
94ifneq ($(BL32_EXTRA2),)
95$(eval $(call TOOL_ADD_IMG,BL32_EXTRA2,--tos-fw-extra2))
96endif
97ifneq ($(HW_CONFIG),)
98$(eval $(call TOOL_ADD_IMG,HW_CONFIG,--hw-config))
99endif
100
101ifeq (${NEED_BL2},yes)
102$(eval $(call add_define,NEED_BL2))
103LOAD_IMAGE_V2		:=	1
104# Non-TF Boot ROM
105RESET_TO_BL2		:=	1
106endif
107
108ifneq (${TRUSTED_BOARD_BOOT},0)
109
110include drivers/auth/mbedtls/mbedtls_crypto.mk
111include drivers/auth/mbedtls/mbedtls_x509.mk
112
113AUTH_SOURCES	:=	drivers/auth/auth_mod.c			\
114			drivers/auth/crypto_mod.c		\
115			drivers/auth/img_parser_mod.c		\
116			drivers/auth/tbbr/tbbr_cot_common.c     \
117			drivers/auth/tbbr/tbbr_cot_bl2.c
118
119BL2_SOURCES		+=	${AUTH_SOURCES}					\
120				plat/common/tbbr/plat_tbbr.c			\
121				plat/imx/imx8m/imx8mp/imx8mp_trusted_boot.c	\
122				plat/imx/imx8m/imx8mp/imx8mp_rotpk.S
123
124ROT_KEY             = $(BUILD_PLAT)/rot_key.pem
125ROTPK_HASH          = $(BUILD_PLAT)/rotpk_sha256.bin
126
127$(eval $(call add_define_val,ROTPK_HASH,'"$(ROTPK_HASH)"'))
128$(eval $(call MAKE_LIB_DIRS))
129
130$(BUILD_PLAT)/bl2/imx8mp_rotpk.o: $(ROTPK_HASH)
131
132certificates: $(ROT_KEY)
133
134$(ROT_KEY): | $(BUILD_PLAT)
135	@echo "  OPENSSL $@"
136	@if [ ! -f $(ROT_KEY) ]; then \
137		${OPENSSL_BIN_PATH}/openssl genrsa 2048 > $@ 2>/dev/null; \
138	fi
139
140$(ROTPK_HASH): $(ROT_KEY)
141	@echo "  OPENSSL $@"
142	$(Q)${OPENSSL_BIN_PATH}/openssl rsa -in $< -pubout -outform DER 2>/dev/null |\
143	${OPENSSL_BIN_PATH}/openssl dgst -sha256 -binary > $@ 2>/dev/null
144endif
145
146ENABLE_PIE		:=	1
147USE_COHERENT_MEM	:=	1
148RESET_TO_BL31		:=	1
149A53_DISABLE_NON_TEMPORAL_HINT := 0
150
151ERRATA_A53_835769	:=	1
152ERRATA_A53_843419	:=	1
153ERRATA_A53_855873	:=	1
154
155ifneq (${PRELOADED_BL33_BASE},)
156$(eval $(call add_define_val,PLAT_NS_IMAGE_OFFSET,${PRELOADED_BL33_BASE}))
157endif
158
159BL32_BASE		?=	0x56000000
160$(eval $(call add_define,BL32_BASE))
161
162BL32_SIZE		?=	0x2000000
163$(eval $(call add_define,BL32_SIZE))
164
165IMX_BOOT_UART_BASE	?=	0x30890000
166ifeq (${IMX_BOOT_UART_BASE},auto)
167    override IMX_BOOT_UART_BASE	:=	0
168endif
169$(eval $(call add_define,IMX_BOOT_UART_BASE))
170
171EL3_EXCEPTION_HANDLING := $(SDEI_SUPPORT)
172ifeq (${SDEI_SUPPORT}, 1)
173BL31_SOURCES 		+= 	plat/imx/common/imx_ehf.c	\
174				plat/imx/common/imx_sdei.c
175endif
176
177ifeq (${SPD},trusty)
178	BL31_CFLAGS    +=      -DPLAT_XLAT_TABLES_DYNAMIC=1
179endif
180