feat(stm32mp1): add define for external scratch buffer for nand devices

Override the default platform function to use an external buffer
on STM32MP13 platform.
It allows to use a temporary buffer lo

feat(stm32mp1): add define for external scratch buffer for nand devices

Override the default platform function to use an external buffer
on STM32MP13 platform.
It allows to use a temporary buffer located at the SRAM1 memory end.

Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Change-Id: Ibd84bb336c60af24608268916b3a18bb5a0fa3db

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feat(stm32mp1): manage STM32MP13 rev.Y

The new SoC version for STM32MP13 is the revision Y. The register
SYSCFG_IDC is updated for this new version with the value 0x1003.
The function stm32mp_get_so

feat(stm32mp1): manage STM32MP13 rev.Y

The new SoC version for STM32MP13 is the revision Y. The register
SYSCFG_IDC is updated for this new version with the value 0x1003.
The function stm32mp_get_soc_name() should also be updated to manage
this new SoC revision.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I4f2fa5f1503f17db93d8413c79c2b7a18d279f9b

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feat(st): enable MMC_FLAG_SD_CMD6 for SD-cards

This flag allows switching to High-Speed mode on SD-cards.
The gain is ~44ms when using SP_min, and ~55ms with OP-TEE.

Change-Id: Ic396c6a14201580b5e5

feat(st): enable MMC_FLAG_SD_CMD6 for SD-cards

This flag allows switching to High-Speed mode on SD-cards.
The gain is ~44ms when using SP_min, and ~55ms with OP-TEE.

Change-Id: Ic396c6a14201580b5e5627e6174b85b437b87cae
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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Merge changes from topic "st_fip_uuid" into integration

* changes:
feat(stm32mp1): retrieve FIP partition by type UUID
feat(guid-partition): allow to find partition by type UUID
refactor(stm32

Merge changes from topic "st_fip_uuid" into integration

* changes:
feat(stm32mp1): retrieve FIP partition by type UUID
feat(guid-partition): allow to find partition by type UUID
refactor(stm32mp1): update PLAT_PARTITION_MAX_ENTRIES

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fix(stm32mp13): correct USART addresses

On STM32MP13, USART1 and USART2 addresses are 0x4C000000 and 0x4C001000.
Whereas on STM32MP15, the addresses were 0x5C000000 and 0x4000E000.
Use dedicated fla

fix(stm32mp13): correct USART addresses

On STM32MP13, USART1 and USART2 addresses are 0x4C000000 and 0x4C001000.
Whereas on STM32MP15, the addresses were 0x5C000000 and 0x4000E000.
Use dedicated flags to choose the correct address, that could be use
for early or crash console.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I98bd97a0ac8b0408a50376801e2a1961b241a3d6

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feat(stm32mp13): change BL33 memory mapping

U-Boot is loaded at the beginning of the DDR:
STM32MP_DDR_BASE = 0xC0000000.

This patch remove the need to use the 0x100000 offset, reserved
on STM32MP15

feat(stm32mp13): change BL33 memory mapping

U-Boot is loaded at the beginning of the DDR:
STM32MP_DDR_BASE = 0xC0000000.

This patch remove the need to use the 0x100000 offset, reserved
on STM32MP15 for flashlayout.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I8d0a93f4db411cf59838e635a315c729cccee269

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feat(stm32mp1): retrieve FIP partition by type UUID

Modify the function to retrieve the FIP partition looking
the UUID type define for FIP. If not defined, compatibility
used to find the FIP partiti

feat(stm32mp1): retrieve FIP partition by type UUID

Modify the function to retrieve the FIP partition looking
the UUID type define for FIP. If not defined, compatibility
used to find the FIP partition by name.

Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Change-Id: I76634dea891f51d913a549fb9a077cf7284d5cb2

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refactor(stm32mp1): update PLAT_PARTITION_MAX_ENTRIES

Fix the maximum partition number to a default value. It must
also take care of the extra partition when FWU feature is enabled.

Change-Id: Ib64

refactor(stm32mp1): update PLAT_PARTITION_MAX_ENTRIES

Fix the maximum partition number to a default value. It must
also take care of the extra partition when FWU feature is enabled.

Change-Id: Ib64b1f19f1f0514f7e89d35fc367facd6df54bed
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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feat(stm32mp15): manage OP-TEE shared memory

On STM32MP15, there is currently an OP-TEE shared memory area at the end
of the DDR. But this area will in term be removed. To allow a smooth
transition,

feat(stm32mp15): manage OP-TEE shared memory

On STM32MP15, there is currently an OP-TEE shared memory area at the end
of the DDR. But this area will in term be removed. To allow a smooth
transition, a new flag is added (STM32MP15_OPTEE_RSV_SHM). It reflects
the OP-TEE flag: CFG_CORE_RESERVED_SHM. The flag is enabled by default
(no behavior change). It will be set to 0 when OP-TEE is aligned, and
then later be removed.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I91146cd8a26a24be22143c212362294c1e880264

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Merge "feat(stm32mp1): save boot auth status and partition info" into integration

feat(stm32mp1): save boot auth status and partition info

Introduce a functionality for saving/restoring boot auth status
and partition used for booting (FSBL partition on which the boot
was successf

feat(stm32mp1): save boot auth status and partition info

Introduce a functionality for saving/restoring boot auth status
and partition used for booting (FSBL partition on which the boot
was successful).

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Change-Id: I4d7f153b70dfc49dad8c1c3fa71111a350caf1ee

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feat(stm32mp1): optionally use paged OP-TEE

STM32MP13 can encrypt the DDR. OP-TEE is then fully in DDR, and there
is no need for paged image on STM32MP13. The management of the paged
OP-TEE is made

feat(stm32mp1): optionally use paged OP-TEE

STM32MP13 can encrypt the DDR. OP-TEE is then fully in DDR, and there
is no need for paged image on STM32MP13. The management of the paged
OP-TEE is made conditional, and will be kept only for STM32MP15.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I85ac7aaf6a172c4ee529736113ed40fe66835fd7

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Merge changes from topic "stm32mp-emmc-boot-fip" into integration

* changes:
feat(stm32mp1): extend STM32MP_EMMC_BOOT support to FIP format
refactor(mmc): replace magic value with new PART_CFG_B

Merge changes from topic "stm32mp-emmc-boot-fip" into integration

* changes:
feat(stm32mp1): extend STM32MP_EMMC_BOOT support to FIP format
refactor(mmc): replace magic value with new PART_CFG_BOOT_PARTITION_NO_ACCESS
refactor(mmc): export user/boot partition switch functions

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feat(st): search pinctrl node by compatible

Instead of searching pinctrl node with its name, search with its
compatible. This will be necessary before pin-controller name changes
to pinctrl due to k

feat(st): search pinctrl node by compatible

Instead of searching pinctrl node with its name, search with its
compatible. This will be necessary before pin-controller name changes
to pinctrl due to kernel yaml changes.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I00590414fa65e193c6a72941a372bcecac673f60

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feat(stm32mp1): extend STM32MP_EMMC_BOOT support to FIP format

STM32MP_EMMC_BOOT allowed placing SSBL into the eMMC boot
partition along with FSBL. This allows atomic update of both
FSBL and SSBL at

feat(stm32mp1): extend STM32MP_EMMC_BOOT support to FIP format

STM32MP_EMMC_BOOT allowed placing SSBL into the eMMC boot
partition along with FSBL. This allows atomic update of both
FSBL and SSBL at the same time. Previously, this was only
possible for the FSBL, as the eMMC layout expected by TF-A
had a single SSBL GPT partition in the eMMC user area.
TEE binaries remained in dedicated GPT partitions whether
STM32MP_EMMC_BOOT was on or off.

The new FIP format collects SSBL and TEE partitions into
a single binary placed into a GPT partition.
Extend STM32MP_EMMC_BOOT, so eMMC-booted TF-A first uses
a FIP image placed at offset 256K into the active eMMC boot
partition. If no FIP magic is detected at that offset or if
STM32MP_EMMC_BOOT is disabled, the GPT on the eMMC user area
will be consulted as before.

This allows power fail-safe update of all firmware using the
built-in eMMC boot selector mechanism, provided it fits into
the boot partition - SZ_256K. SZ_256K was chosen because it's
the same offset used with the legacy format and because it's
the size of the on-chip SRAM, where the STM32MP15x BootROM
loads TF-A into. As such, TF-A may not exceed this size limit
for existing SoCs.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Change-Id: Id7bec45652b3a289ca632d38d4b51316c5efdf8d

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build(stm32mp1): platform changes for verifying gpt header crc

This change makes the necessary additions to makefile of
platforms using partition driver.

Signed-off-by: Rohit Ner <rohitner@google.c

build(stm32mp1): platform changes for verifying gpt header crc

This change makes the necessary additions to makefile of
platforms using partition driver.

Signed-off-by: Rohit Ner <rohitner@google.com>
Change-Id: I66f6daaa0deac984b0aa5f2a182385410189ba8a

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fix(stm32mp1): include assert.h to fix build failure

stm32mp1 platform build failed with the error [1] in the coverity, to
fix it included assert.h file.

Including bl32/sp_min/sp_min.mk
plat/st/stm

fix(stm32mp1): include assert.h to fix build failure

stm32mp1 platform build failed with the error [1] in the coverity, to
fix it included assert.h file.

Including bl32/sp_min/sp_min.mk
plat/st/stm32mp1/plat_image_load.c: In function
'plat_get_bl_image_load_info':
plat/st/stm32mp1/plat_image_load.c:30:2: error: implicit declaration of
function 'assert' [-Werror=implicit-function-declaration]
30 | assert(bl33 != NULL);
| ^~~~~~
plat/st/stm32mp1/plat_image_load.c:9:1: note: 'assert' is defined in
header '<assert.h>'; did you forget to '#include <assert.h>'?
8 | #include <plat/common/platform.h>
+++ |+#include <assert.h>
9 |
cc1: all warnings being treated as errors

Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com>
Change-Id: I486bd695298798c05008158545668020babb3eca

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Merge "fix(st): add missing header include" into integration

fix(st): add missing header include

This issue is triggered when enabling -Wmissing-prototypes:
plat/st/common/bl2_io_storage.c:114:5: warning: no previous prototype
for 'open_fip' [-Wmissing-proto

fix(st): add missing header include

This issue is triggered when enabling -Wmissing-prototypes:
plat/st/common/bl2_io_storage.c:114:5: warning: no previous prototype
for 'open_fip' [-Wmissing-prototypes]
114 | int open_fip(const uintptr_t spec)
| ^~~~~~~~
plat/st/common/bl2_io_storage.c:119:5: warning: no previous prototype
for 'open_storage' [-Wmissing-prototypes]
119 | int open_storage(const uintptr_t spec)
| ^~~~~~~~~~~~

Add missing stm32mp_io_storage.h header include, where those functions
prototypes are defined.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I2af69fadfc4780553f41b338cd93b731210672a6

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fix(st): fix NULL pointer dereference issues

The get_bl_mem_params_node() function could return NULL. Add asserts to
check the return value is not NULL.
This corrects coverity issues:
pager_mem_par

fix(st): fix NULL pointer dereference issues

The get_bl_mem_params_node() function could return NULL. Add asserts to
check the return value is not NULL.
This corrects coverity issues:
pager_mem_params = get_bl_mem_params_node(BL32_EXTRA1_IMAGE_ID);
>>> CID 378360: (NULL_RETURNS)
>>> Dereferencing "pager_mem_params", which is known to be "NULL".

paged_mem_params = get_bl_mem_params_node(BL32_EXTRA2_IMAGE_ID);
>>> CID 378360: (NULL_RETURNS)
>>> Dereferencing "paged_mem_params", which is known to be "NULL".

tos_fw_mem_params = get_bl_mem_params_node(TOS_FW_CONFIG_ID);
>>> CID 378360: (NULL_RETURNS)
>>> Dereferencing "tos_fw_mem_params", which is known to be "NULL".


Do the same for other occurrences of get_bl_mem_params_node() return not
checked, in the functions plat_get_bl_image_load_info() and
bl2_plat_handle_pre_image_load().

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I79165b1628fcee3da330f2db4ee5e1dafcb1b21f

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refactor(st): update set_config_info function call

Pass NS-load address as ~0UL to the 'set_config_info' function while
updating FW_CONFIG device tree information since it is always loaded
into secu

refactor(st): update set_config_info function call

Pass NS-load address as ~0UL to the 'set_config_info' function while
updating FW_CONFIG device tree information since it is always loaded
into secure memory.

Change-Id: Ieeaf9c97085128d7b7339d34495bdd58cd9fcf8a
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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Merge changes from topic "st_fwu_bkp_reg" into integration

* changes:
feat(stm32mp1): retry 3 times FWU trial boot
refactor(stm32mp1): update backup reg for FWU

fix(stm32mp1): correct dtc version check

Depending on the shell used, the grep command can fail, leading to
a wrong dtc version detection. Correct that by adding quotes.

Signed-off-by: Yann Gautier

fix(stm32mp1): correct dtc version check

Depending on the shell used, the grep command can fail, leading to
a wrong dtc version detection. Correct that by adding quotes.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I329ec929559c94bf1bf99b127662c9d978e067cf

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Merge changes from topic "st_nvmem_layout" into integration

* changes:
refactor(stm32mp1-fdts): remove nvmem_layout node
refactor(stm32mp1): drop the "st,stm32-nvmem-layout" node
refactor(st):

Merge changes from topic "st_nvmem_layout" into integration

* changes:
refactor(stm32mp1-fdts): remove nvmem_layout node
refactor(stm32mp1): drop the "st,stm32-nvmem-layout" node
refactor(st): remove useless includes

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fix(st): remove extra chars from dtc version

In some implementations of dtc tool (e.g. with yocto), there can be a 'v'
at the beginning of the version, and a '+' at the end. Just keep numbers
then,

fix(st): remove extra chars from dtc version

In some implementations of dtc tool (e.g. with yocto), there can be a 'v'
at the beginning of the version, and a '+' at the end. Just keep numbers
then, with a grep -o.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I180e97ab75ba3e5ceacb4b1961a1f22788b428a3

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